| /external/oboe/samples/RhythmGame/third_party/glm/simd/ |
| D | integer.h | 12 glm_uvec4 const Mask2 = _mm_set1_epi32(0x0F0F0F0F); in glm_i128_interleave() local
40 Reg1 = _mm_and_si128(Reg1, Mask2); in glm_i128_interleave()
66 glm_uvec4 const Mask2 = _mm_set1_epi32(0x0F0F0F0F); in glm_i128_interleave2() local
93 Reg1 = _mm_and_si128(Reg1, Mask2); in glm_i128_interleave2()
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| /external/llvm-project/llvm/test/tools/llvm-readobj/ELF/ |
| D | mips-options-sec.test | 14 # CHECK-NEXT: Co-Proc Mask2: 0x1EFFEEDD
22 # CHECK-NEXT: Co-Proc Mask2: 0x0
42 # NAME-ERR-FOUND-NEXT: Co-Proc Mask2: 0x1EFFEEDD
50 # NAME-ERR-FOUND-NEXT: Co-Proc Mask2: 0x0
135 # KIND-NEXT: Co-Proc Mask2: 0x0
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| D | mips-reginfo.test | 12 # OPTIONS-NEXT: Co-Proc Mask2: 0x1EFFEEDD
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| /external/llvm/test/tools/llvm-readobj/ |
| D | mips-reginfo.test | 8 CHECK-NEXT: Co-Proc Mask2: 0x0
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| D | mips-options-sec.test | 9 CHECK-NEXT: Co-Proc Mask2: 0x0
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| /external/llvm-project/lld/test/ELF/ |
| D | mips-reginfo.s | 23 # CHECK-NEXT: Co-Proc Mask2: 0x0
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| D | mips-options.s | 40 # CHECK-NEXT: Co-Proc Mask2: 0x0
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | GCNRegBankReassign.cpp | 545 unsigned Mask2 = OperandMasks[J].Mask; in collectCandidates() local
547 unsigned Size2 = countPopulation(Mask2); in collectCandidates()
558 unsigned FreeBanks2 = getFreeBanks(Reg2, SubReg2, Mask2, UsedBanks); in collectCandidates()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | GCNRegBankReassign.cpp | 607 unsigned Mask2 = OperandMasks[J].Mask; in collectCandidates() local
609 unsigned Size2 = countPopulation(Mask2); in collectCandidates()
620 unsigned FreeBanks2 = getFreeBanks(Reg2, SubReg2, Mask2, UsedBanks); in collectCandidates()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsExpandPseudo.cpp | 106 Register Mask2 = I->getOperand(4).getReg(); in expandAtomicCmpSwapSubword() local
159 .addReg(Mask2); in expandAtomicCmpSwapSubword()
414 Register Mask2 = I->getOperand(4).getReg(); in expandAtomicBinOpSubword() local
534 .addReg(OldVal).addReg(Mask2); in expandAtomicBinOpSubword()
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| D | MipsISelLowering.cpp | 1667 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1799 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicBinaryPartword()
1813 .addReg(Mask2) in emitAtomicBinaryPartword()
1916 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1986 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicCmpSwapPartword()
2005 .addReg(Mask2) in emitAtomicCmpSwapPartword()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsExpandPseudo.cpp | 106 Register Mask2 = I->getOperand(4).getReg(); in expandAtomicCmpSwapSubword() local
159 .addReg(Mask2); in expandAtomicCmpSwapSubword()
414 Register Mask2 = I->getOperand(4).getReg(); in expandAtomicBinOpSubword() local
534 .addReg(OldVal).addReg(Mask2); in expandAtomicBinOpSubword()
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| D | MipsISelLowering.cpp | 1665 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1797 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicBinaryPartword()
1811 .addReg(Mask2) in emitAtomicBinaryPartword()
1914 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1984 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicCmpSwapPartword()
2003 .addReg(Mask2) in emitAtomicCmpSwapPartword()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMSystemRegister.td | 45 // Mask1 Mask2 Mask3 Enc12, Name
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| D | ARMISelLowering.cpp | 5564 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN() local
5568 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
5577 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
12347 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombineToBFI() local
12352 (Mask == ~Mask2)) { in PerformORCombineToBFI()
12359 unsigned amt = countTrailingZeros(Mask2); in PerformORCombineToBFI()
12369 (~Mask == Mask2)) { in PerformORCombineToBFI()
12373 (Mask2 == 0xffff || Mask2 == 0xffff0000)) in PerformORCombineToBFI()
12380 DAG.getConstant(Mask2, DL, MVT::i32)); in PerformORCombineToBFI()
12696 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
[all …]
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMSystemRegister.td | 45 // Mask1 Mask2 Mask3 Enc12, Name
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| D | ARMISelLowering.cpp | 5811 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN() local
5815 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
5824 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
13161 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombineToBFI() local
13166 (Mask == ~Mask2)) { in PerformORCombineToBFI()
13173 unsigned amt = countTrailingZeros(Mask2); in PerformORCombineToBFI()
13183 (~Mask == Mask2)) { in PerformORCombineToBFI()
13187 (Mask2 == 0xffff || Mask2 == 0xffff0000)) in PerformORCombineToBFI()
13194 DAG.getConstant(Mask2, DL, MVT::i32)); in PerformORCombineToBFI()
13517 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
[all …]
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 685 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in SimplifyDemandedUseBits() local
686 if (SimplifyDemandedBits(I->getOperandUse(0), Mask2, LHSKnownZero, in SimplifyDemandedUseBits()
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| /external/llvm-project/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 685 APInt Mask2 = LowBits | APInt::getSignMask(BitWidth); in SimplifyDemandedUseBits() local
686 if (SimplifyDemandedBits(I, 0, Mask2, LHSKnown, Depth + 1)) in SimplifyDemandedUseBits()
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| D | InstCombineCompares.cpp | 3118 APInt Mask2 = IsTrailing in foldICmpEqIntrinsicWithConstant() local
3123 ConstantInt::get(Ty, Mask2)); in foldICmpEqIntrinsicWithConstant()
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| /external/llvm/lib/Transforms/Vectorize/ |
| D | BBVectorize.cpp | 2854 std::vector<Constant *> Mask1(numElemI), Mask2(numElemI); in replaceOutputsOfPair() local
2857 Mask2[v] = ConstantInt::get(Type::getInt32Ty(Context), numElemJ + v); in replaceOutputsOfPair()
2869 std::vector<Constant *> Mask1(numElemJ), Mask2(numElemJ); in replaceOutputsOfPair() local
2872 Mask2[v] = ConstantInt::get(Type::getInt32Ty(Context), numElemI + v); in replaceOutputsOfPair()
2876 ConstantVector::get(Mask2), in replaceOutputsOfPair()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 642 APInt Mask2 = LowBits | APInt::getSignMask(BitWidth); in SimplifyDemandedUseBits() local
643 if (SimplifyDemandedBits(I, 0, Mask2, LHSKnown, Depth + 1)) in SimplifyDemandedUseBits()
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| D | InstCombineCompares.cpp | 3054 APInt Mask2 = IsTrailing in foldICmpEqIntrinsicWithConstant() local
3058 Cmp.setOperand(1, ConstantInt::get(Ty, Mask2)); in foldICmpEqIntrinsicWithConstant()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1248 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1323 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicBinaryPartword()
1366 .addReg(OldVal).addReg(Mask2); in emitAtomicBinaryPartword()
1503 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1586 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicCmpSwapPartword()
1614 .addReg(OldVal).addReg(Mask2); in emitAtomicCmpSwapPartword()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4306 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN() local
4310 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
4319 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
9400 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombine() local
9405 (Mask == ~Mask2)) { in PerformORCombine()
9412 unsigned amt = countTrailingZeros(Mask2); in PerformORCombine()
9421 (~Mask == Mask2)) { in PerformORCombine()
9425 (Mask2 == 0xffff || Mask2 == 0xffff0000)) in PerformORCombine()
9432 DAG.getConstant(Mask2, DL, MVT::i32)); in PerformORCombine()
9570 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
[all …]
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