| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 960 SmallVectorImpl<MachineInstr*> &NewMIs, in StoreRegToStackSlot() argument
968 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) in StoreRegToStackSlot()
974 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) in StoreRegToStackSlot()
979 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFD)) in StoreRegToStackSlot()
984 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFS)) in StoreRegToStackSlot()
989 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CR)) in StoreRegToStackSlot()
995 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CRBIT)) in StoreRegToStackSlot()
1001 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STVX)) in StoreRegToStackSlot()
1007 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STXVD2X)) in StoreRegToStackSlot()
1013 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STXSDX)) in StoreRegToStackSlot()
[all …]
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| D | PPCInstrInfo.h | 74 SmallVectorImpl<MachineInstr*> &NewMIs,
79 SmallVectorImpl<MachineInstr *> &NewMIs,
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| /external/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 1305 SmallVector<MachineInstr *, 2> NewMIs; in tryInstructionTransform() local
1308 /*UnfoldStore=*/false, NewMIs)) { in tryInstructionTransform()
1312 assert(NewMIs.size() == 2 && in tryInstructionTransform()
1315 NewMIs[1]->addRegisterKilled(Reg, TRI); in tryInstructionTransform()
1319 MBB->insert(mi, NewMIs[0]); in tryInstructionTransform()
1320 MBB->insert(mi, NewMIs[1]); in tryInstructionTransform()
1322 DEBUG(dbgs() << "2addr: NEW LOAD: " << *NewMIs[0] in tryInstructionTransform()
1323 << "2addr: NEW INST: " << *NewMIs[1]); in tryInstructionTransform()
1326 unsigned NewDstIdx = NewMIs[1]->findRegisterDefOperandIdx(regA); in tryInstructionTransform()
1327 unsigned NewSrcIdx = NewMIs[1]->findRegisterUseOperandIdx(regB); in tryInstructionTransform()
[all …]
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| D | MachineLICM.cpp | 1178 SmallVector<MachineInstr *, 2> NewMIs; in ExtractHoistableLoad() local
1181 /*UnfoldStore=*/false, NewMIs); in ExtractHoistableLoad()
1186 assert(NewMIs.size() == 2 && in ExtractHoistableLoad()
1190 MBB->insert(Pos, NewMIs[0]); in ExtractHoistableLoad()
1191 MBB->insert(Pos, NewMIs[1]); in ExtractHoistableLoad()
1194 if (!IsLoopInvariantInst(*NewMIs[0]) || !IsProfitableToHoist(*NewMIs[0])) { in ExtractHoistableLoad()
1195 NewMIs[0]->eraseFromParent(); in ExtractHoistableLoad()
1196 NewMIs[1]->eraseFromParent(); in ExtractHoistableLoad()
1201 UpdateRegPressure(NewMIs[1]); in ExtractHoistableLoad()
1205 return NewMIs[0]; in ExtractHoistableLoad()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 1365 SmallVector<MachineInstr *, 2> NewMIs; in tryInstructionTransform() local
1368 /*UnfoldStore=*/false, NewMIs)) { in tryInstructionTransform()
1372 assert(NewMIs.size() == 2 && in tryInstructionTransform()
1375 NewMIs[1]->addRegisterKilled(Reg, TRI); in tryInstructionTransform()
1379 MBB->insert(mi, NewMIs[0]); in tryInstructionTransform()
1380 MBB->insert(mi, NewMIs[1]); in tryInstructionTransform()
1382 LLVM_DEBUG(dbgs() << "2addr: NEW LOAD: " << *NewMIs[0] in tryInstructionTransform()
1383 << "2addr: NEW INST: " << *NewMIs[1]); in tryInstructionTransform()
1386 unsigned NewDstIdx = NewMIs[1]->findRegisterDefOperandIdx(regA); in tryInstructionTransform()
1387 unsigned NewSrcIdx = NewMIs[1]->findRegisterUseOperandIdx(regB); in tryInstructionTransform()
[all …]
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| D | MachineLICM.cpp | 1344 SmallVector<MachineInstr *, 2> NewMIs; in ExtractHoistableLoad() local
1347 /*UnfoldStore=*/false, NewMIs); in ExtractHoistableLoad()
1352 assert(NewMIs.size() == 2 && in ExtractHoistableLoad()
1356 MBB->insert(Pos, NewMIs[0]); in ExtractHoistableLoad()
1357 MBB->insert(Pos, NewMIs[1]); in ExtractHoistableLoad()
1360 if (!IsLoopInvariantInst(*NewMIs[0]) || !IsProfitableToHoist(*NewMIs[0])) { in ExtractHoistableLoad()
1361 NewMIs[0]->eraseFromParent(); in ExtractHoistableLoad()
1362 NewMIs[1]->eraseFromParent(); in ExtractHoistableLoad()
1367 UpdateRegPressure(NewMIs[1]); in ExtractHoistableLoad()
1371 return NewMIs[0]; in ExtractHoistableLoad()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 1220 SmallVector<MachineInstr *, 2> NewMIs; in tryInstructionTransform() local
1223 /*UnfoldStore=*/false, NewMIs)) { in tryInstructionTransform()
1227 assert(NewMIs.size() == 2 && in tryInstructionTransform()
1230 NewMIs[1]->addRegisterKilled(Reg, TRI); in tryInstructionTransform()
1234 MBB->insert(mi, NewMIs[0]); in tryInstructionTransform()
1235 MBB->insert(mi, NewMIs[1]); in tryInstructionTransform()
1237 LLVM_DEBUG(dbgs() << "2addr: NEW LOAD: " << *NewMIs[0] in tryInstructionTransform()
1238 << "2addr: NEW INST: " << *NewMIs[1]); in tryInstructionTransform()
1241 unsigned NewDstIdx = NewMIs[1]->findRegisterDefOperandIdx(regA); in tryInstructionTransform()
1242 unsigned NewSrcIdx = NewMIs[1]->findRegisterUseOperandIdx(regB); in tryInstructionTransform()
[all …]
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| D | MachineLICM.cpp | 1363 SmallVector<MachineInstr *, 2> NewMIs; in ExtractHoistableLoad() local
1366 /*UnfoldStore=*/false, NewMIs); in ExtractHoistableLoad()
1371 assert(NewMIs.size() == 2 && in ExtractHoistableLoad()
1375 MBB->insert(Pos, NewMIs[0]); in ExtractHoistableLoad()
1376 MBB->insert(Pos, NewMIs[1]); in ExtractHoistableLoad()
1379 if (!IsLoopInvariantInst(*NewMIs[0]) || !IsProfitableToHoist(*NewMIs[0])) { in ExtractHoistableLoad()
1380 NewMIs[0]->eraseFromParent(); in ExtractHoistableLoad()
1381 NewMIs[1]->eraseFromParent(); in ExtractHoistableLoad()
1386 UpdateRegPressure(NewMIs[1]); in ExtractHoistableLoad()
1395 return NewMIs[0]; in ExtractHoistableLoad()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | Legalizer.cpp | 91 SmallVector<MachineInstr *, 4> NewMIs; member in __anon8dfedcab0111::LegalizerWorkListManager
112 LLVM_DEBUG(NewMIs.push_back(&MI)); in createdInstr()
118 for (const auto *MI : NewMIs) in printNewInstrs()
120 NewMIs.clear(); in printNewInstrs()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | Legalizer.cpp | 116 SmallVector<MachineInstr *, 4> NewMIs; member in __anon840773370111::LegalizerWorkListManager
136 LLVM_DEBUG(NewMIs.push_back(&MI)); in createdInstr()
142 for (const auto *MI : NewMIs) in printNewInstrs()
144 NewMIs.clear(); in printNewInstrs()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 343 SmallVectorImpl<MachineInstr*> &NewMIs) const;
356 SmallVectorImpl<MachineInstr*> &NewMIs) const;
386 SmallVectorImpl<MachineInstr *> &NewMIs) const override;
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86CmovConversion.cpp | 760 SmallVector<MachineInstr *, 4> NewMIs; in convertCmovInstsToBranches() local
763 /*UnfoldStore*/ false, NewMIs); in convertCmovInstsToBranches()
769 auto *NewCMOV = NewMIs.pop_back_val(); in convertCmovInstsToBranches()
779 for (auto *NewMI : NewMIs) { in convertCmovInstsToBranches()
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| D | X86SpeculativeLoadHardening.cpp | 912 SmallVector<MachineInstr *, 2> NewMIs; in unfoldCallAndJumpLoads() local
917 /*UnfoldStore*/ false, NewMIs); in unfoldCallAndJumpLoads()
922 for (auto *NewMI : NewMIs) in unfoldCallAndJumpLoads()
932 for (auto *NewMI : NewMIs) { in unfoldCallAndJumpLoads()
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| D | X86InstrInfo.h | 400 SmallVectorImpl<MachineInstr *> &NewMIs) const override;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CmovConversion.cpp | 760 SmallVector<MachineInstr *, 4> NewMIs; in convertCmovInstsToBranches() local
763 /*UnfoldStore*/ false, NewMIs); in convertCmovInstsToBranches()
769 auto *NewCMOV = NewMIs.pop_back_val(); in convertCmovInstsToBranches()
779 for (auto *NewMI : NewMIs) { in convertCmovInstsToBranches()
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| D | X86InstrInfo.h | 361 SmallVectorImpl<MachineInstr *> &NewMIs) const override;
|
| D | X86SpeculativeLoadHardening.cpp | 911 SmallVector<MachineInstr *, 2> NewMIs; in unfoldCallAndJumpLoads() local
916 /*UnfoldStore*/ false, NewMIs); in unfoldCallAndJumpLoads()
921 for (auto *NewMI : NewMIs) in unfoldCallAndJumpLoads()
926 for (auto *NewMI : NewMIs) { in unfoldCallAndJumpLoads()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 118 SmallVectorImpl<MachineInstr *> &NewMIs) const;
122 SmallVectorImpl<MachineInstr *> &NewMIs) const;
|
| D | PPCInstrInfo.cpp | 1202 SmallVectorImpl<MachineInstr *> &NewMIs) const { in StoreRegToStackSlot()
1209 NewMIs.push_back(addFrameReference( in StoreRegToStackSlot()
1231 SmallVector<MachineInstr *, 4> NewMIs; in storeRegToStackSlot() local
1242 StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs); in storeRegToStackSlot()
1244 for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) in storeRegToStackSlot()
1245 MBB.insert(MI, NewMIs[i]); in storeRegToStackSlot()
1252 NewMIs.back()->addMemOperand(MF, MMO); in storeRegToStackSlot()
1258 SmallVectorImpl<MachineInstr *> &NewMIs) in LoadRegFromStackSlot()
1261 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(Opcode), DestReg), in LoadRegFromStackSlot()
1283 SmallVector<MachineInstr*, 4> NewMIs; in loadRegFromStackSlot() local
[all …]
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 196 SmallVectorImpl<MachineInstr *> &NewMIs) const;
200 SmallVectorImpl<MachineInstr *> &NewMIs) const;
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| D | PPCInstrInfo.cpp | 1475 SmallVectorImpl<MachineInstr *> &NewMIs) const { in StoreRegToStackSlot()
1482 NewMIs.push_back(addFrameReference( in StoreRegToStackSlot()
1499 SmallVector<MachineInstr *, 4> NewMIs; in storeRegToStackSlotNoUpd() local
1501 StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs); in storeRegToStackSlotNoUpd()
1503 for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) in storeRegToStackSlotNoUpd()
1504 MBB.insert(MI, NewMIs[i]); in storeRegToStackSlotNoUpd()
1511 NewMIs.back()->addMemOperand(MF, MMO); in storeRegToStackSlotNoUpd()
1534 SmallVectorImpl<MachineInstr *> &NewMIs) in LoadRegFromStackSlot()
1537 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(Opcode), DestReg), in LoadRegFromStackSlot()
1554 SmallVector<MachineInstr*, 4> NewMIs; in loadRegFromStackSlotNoUpd() local
[all …]
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 760 SmallPtrSetImpl<MachineInstr *> &NewMIs,
975 SmallVectorImpl<MachineInstr *> &NewMIs) const { in unfoldMemoryOperand() argument
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 917 SmallPtrSetImpl<MachineInstr *> &NewMIs,
1193 SmallVectorImpl<MachineInstr *> &NewMIs) const { in unfoldMemoryOperand() argument
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 220 std::vector<MachineInstr*> NewMIs; in convertToThreeAddress() local
235 NewMIs.push_back(MemMI); in convertToThreeAddress()
236 NewMIs.push_back(UpdateMI); in convertToThreeAddress()
253 NewMIs.push_back(UpdateMI); in convertToThreeAddress()
254 NewMIs.push_back(MemMI); in convertToThreeAddress()
273 MachineInstr *NewMI = NewMIs[j]; in convertToThreeAddress()
287 MFI->insert(MBBI, NewMIs[1]); in convertToThreeAddress()
288 MFI->insert(MBBI, NewMIs[0]); in convertToThreeAddress()
289 return NewMIs[0]; in convertToThreeAddress()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 926 SmallPtrSetImpl<MachineInstr *> &NewMIs,
1216 SmallVectorImpl<MachineInstr *> &NewMIs) const { in unfoldMemoryOperand() argument
|