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Searched refs:NumMicroOps (Results 1 – 25 of 130) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SchedA57WriteRes.td58 let NumMicroOps = 2;
64 let NumMicroOps = 2;
69 let NumMicroOps = 2;
74 let NumMicroOps = 2;
78 let NumMicroOps = 2;
82 let NumMicroOps = 2;
86 let NumMicroOps = 2;
90 let NumMicroOps = 2;
94 let NumMicroOps = 2;
99 let NumMicroOps = 2;
[all …]
DAArch64SchedKryoDetails.td16 let Latency = 3; let NumMicroOps = 2;
23 let Latency = 3; let NumMicroOps = 2;
30 let Latency = 4; let NumMicroOps = 3;
36 let Latency = 4; let NumMicroOps = 4;
42 let Latency = 3; let NumMicroOps = 4;
48 let Latency = 3; let NumMicroOps = 2;
54 let Latency = 3; let NumMicroOps = 2;
60 let Latency = 3; let NumMicroOps = 2;
66 let Latency = 3; let NumMicroOps = 2;
72 let Latency = 3; let NumMicroOps = 2;
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/external/llvm/lib/Target/AArch64/
DAArch64SchedA57WriteRes.td59 let NumMicroOps = 2;
65 let NumMicroOps = 2;
70 let NumMicroOps = 2;
75 let NumMicroOps = 2;
79 let NumMicroOps = 2;
83 let NumMicroOps = 2;
87 let NumMicroOps = 2;
91 let NumMicroOps = 2;
95 let NumMicroOps = 2;
100 let NumMicroOps = 2;
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DAArch64SchedKryoDetails.td17 let Latency = 3; let NumMicroOps = 2;
24 let Latency = 3; let NumMicroOps = 2;
31 let Latency = 4; let NumMicroOps = 3;
37 let Latency = 4; let NumMicroOps = 4;
43 let Latency = 3; let NumMicroOps = 4;
49 let Latency = 3; let NumMicroOps = 2;
55 let Latency = 3; let NumMicroOps = 2;
61 let Latency = 3; let NumMicroOps = 2;
67 let Latency = 3; let NumMicroOps = 2;
73 let Latency = 3; let NumMicroOps = 2;
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/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SchedA57WriteRes.td58 let NumMicroOps = 2;
64 let NumMicroOps = 2;
69 let NumMicroOps = 2;
74 let NumMicroOps = 2;
78 let NumMicroOps = 2;
82 let NumMicroOps = 2;
86 let NumMicroOps = 2;
90 let NumMicroOps = 2;
94 let NumMicroOps = 2;
99 let NumMicroOps = 2;
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DAArch64SchedKryoDetails.td16 let Latency = 3; let NumMicroOps = 2;
23 let Latency = 3; let NumMicroOps = 2;
30 let Latency = 4; let NumMicroOps = 3;
36 let Latency = 4; let NumMicroOps = 4;
42 let Latency = 3; let NumMicroOps = 4;
48 let Latency = 3; let NumMicroOps = 2;
54 let Latency = 3; let NumMicroOps = 2;
60 let Latency = 3; let NumMicroOps = 2;
66 let Latency = 3; let NumMicroOps = 2;
72 let Latency = 3; let NumMicroOps = 2;
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DAArch64SchedThunderX3T110.td120 let NumMicroOps = 2;
126 let NumMicroOps = 2;
132 let NumMicroOps = 2;
138 let NumMicroOps = 3;
145 let NumMicroOps = 4;
152 let NumMicroOps = 4;
158 let NumMicroOps = 2;
164 let NumMicroOps = 3;
170 let NumMicroOps = 2;
176 let NumMicroOps = 3;
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DAArch64SchedFalkorDetails.td36 let NumMicroOps = 0;
40 let NumMicroOps = 0;
44 let NumMicroOps = 0;
48 let NumMicroOps = 0;
94 let NumMicroOps = 2;
98 let NumMicroOps = 2;
102 let NumMicroOps = 2;
106 let NumMicroOps = 2;
110 let NumMicroOps = 2;
114 let NumMicroOps = 2;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMScheduleA57WriteRes.td88 let NumMicroOps = 2;
94 let NumMicroOps = 2;
99 let NumMicroOps = 2;
104 let NumMicroOps = 2;
109 let NumMicroOps = 2;
114 let NumMicroOps = 2;
118 let NumMicroOps = 2;
122 let NumMicroOps = 2;
126 let NumMicroOps = 2;
130 let NumMicroOps = 2;
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/external/llvm-project/llvm/lib/Target/ARM/
DARMScheduleA57WriteRes.td91 let NumMicroOps = 2;
97 let NumMicroOps = 2;
102 let NumMicroOps = 2;
107 let NumMicroOps = 2;
112 let NumMicroOps = 2;
117 let NumMicroOps = 2;
121 let NumMicroOps = 2;
125 let NumMicroOps = 2;
129 let NumMicroOps = 2;
133 let NumMicroOps = 2;
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/external/llvm/lib/Target/X86/
DX86SchedHaswell.td279 let NumMicroOps = 2;
285 let NumMicroOps = 3;
292 let NumMicroOps = 2;
295 let NumMicroOps = 3;
301 let NumMicroOps = 2;
307 let NumMicroOps = 2;
313 let NumMicroOps = 3;
318 let NumMicroOps = 2;
322 let NumMicroOps = 3;
336 let NumMicroOps = 5;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86SchedHaswell.td104 let NumMicroOps = UOps;
112 let NumMicroOps = !add(UOps, 1);
172 let NumMicroOps = 3;
464 let NumMicroOps = 2;
469 let NumMicroOps = 2;
475 let NumMicroOps = 2;
479 let NumMicroOps = 3;
487 let NumMicroOps = 3;
492 let NumMicroOps = 4;
499 let NumMicroOps = 9;
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DX86SchedSkylakeClient.td98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, 1);
165 let NumMicroOps = 3;
413 let NumMicroOps = 2;
418 let NumMicroOps = 2;
424 let NumMicroOps = 2;
428 let NumMicroOps = 3;
478 let NumMicroOps = 3;
483 let NumMicroOps = 4;
490 let NumMicroOps = 9;
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DX86SchedBroadwell.td99 let NumMicroOps = UOps;
107 let NumMicroOps = !add(UOps, 1);
168 let NumMicroOps = 3;
423 let NumMicroOps = 2;
428 let NumMicroOps = 2;
433 let NumMicroOps = 2;
437 let NumMicroOps = 3;
487 let NumMicroOps = 3;
492 let NumMicroOps = 4;
499 let NumMicroOps = 9;
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DX86SchedSkylakeServer.td98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, 1);
166 let NumMicroOps = 3;
414 let NumMicroOps = 2;
419 let NumMicroOps = 2;
425 let NumMicroOps = 2;
429 let NumMicroOps = 3;
479 let NumMicroOps = 3;
484 let NumMicroOps = 4;
491 let NumMicroOps = 9;
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DX86SchedSandyBridge.td94 let NumMicroOps = UOps;
102 let NumMicroOps = !add(UOps, 1);
167 let NumMicroOps = 3;
434 let NumMicroOps = 2;
438 let NumMicroOps = 2;
443 let NumMicroOps = 2;
447 let NumMicroOps = 3;
469 let NumMicroOps = 3;
474 let NumMicroOps = 4;
491 let NumMicroOps = 3;
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DX86ScheduleBdVer2.td196 let NumMicroOps = UOps;
276 def : WriteRes<WriteSTMXCSR, [PdStore]> { let NumMicroOps = 2; let ResourceCycles = [18]; }
311 let NumMicroOps = 45;
329 let NumMicroOps = 1;
336 let NumMicroOps = 4;
343 let NumMicroOps = 2;
355 let NumMicroOps = 2;
380 let NumMicroOps = 3;
387 let NumMicroOps = 5;
394 let NumMicroOps = 6;
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/external/llvm-project/llvm/lib/Target/X86/
DX86SchedHaswell.td104 let NumMicroOps = UOps;
112 let NumMicroOps = !add(UOps, 1);
172 let NumMicroOps = 3;
467 let NumMicroOps = 2;
472 let NumMicroOps = 2;
478 let NumMicroOps = 2;
482 let NumMicroOps = 3;
490 let NumMicroOps = 3;
495 let NumMicroOps = 4;
502 let NumMicroOps = 9;
[all …]
DX86SchedSkylakeClient.td98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, 1);
165 let NumMicroOps = 3;
416 let NumMicroOps = 2;
421 let NumMicroOps = 2;
427 let NumMicroOps = 2;
431 let NumMicroOps = 3;
481 let NumMicroOps = 3;
486 let NumMicroOps = 4;
493 let NumMicroOps = 9;
[all …]
DX86SchedBroadwell.td99 let NumMicroOps = UOps;
107 let NumMicroOps = !add(UOps, 1);
168 let NumMicroOps = 3;
426 let NumMicroOps = 2;
431 let NumMicroOps = 2;
436 let NumMicroOps = 2;
440 let NumMicroOps = 3;
490 let NumMicroOps = 3;
495 let NumMicroOps = 4;
502 let NumMicroOps = 9;
[all …]
DX86SchedSkylakeServer.td98 let NumMicroOps = UOps;
106 let NumMicroOps = !add(UOps, 1);
166 let NumMicroOps = 3;
417 let NumMicroOps = 2;
422 let NumMicroOps = 2;
428 let NumMicroOps = 2;
432 let NumMicroOps = 3;
482 let NumMicroOps = 3;
487 let NumMicroOps = 4;
494 let NumMicroOps = 9;
[all …]
DX86SchedSandyBridge.td94 let NumMicroOps = UOps;
102 let NumMicroOps = !add(UOps, 1);
167 let NumMicroOps = 3;
437 let NumMicroOps = 2;
441 let NumMicroOps = 2;
446 let NumMicroOps = 2;
450 let NumMicroOps = 3;
472 let NumMicroOps = 3;
477 let NumMicroOps = 4;
494 let NumMicroOps = 3;
[all …]
DX86ScheduleBdVer2.td196 let NumMicroOps = UOps;
276 def : WriteRes<WriteSTMXCSR, [PdStore]> { let NumMicroOps = 2; let ResourceCycles = [18]; }
311 let NumMicroOps = 45;
329 let NumMicroOps = 1;
336 let NumMicroOps = 4;
343 let NumMicroOps = 2;
355 let NumMicroOps = 2;
380 let NumMicroOps = 3;
387 let NumMicroOps = 5;
394 let NumMicroOps = 6;
[all …]
/external/llvm-project/llvm/lib/MCA/Stages/
DDispatchStage.cpp63 const unsigned NumMicroOps = IR.getInstruction()->getNumMicroOps(); in checkRCU() local
64 if (RCU.isAvailable(NumMicroOps)) in checkRCU()
82 const unsigned NumMicroOps = IS.getNumMicroOps(); in dispatch() local
83 if (NumMicroOps > DispatchWidth) { in dispatch()
86 CarryOver = NumMicroOps - DispatchWidth; in dispatch()
89 assert(AvailableEntries >= NumMicroOps); in dispatch()
90 AvailableEntries -= NumMicroOps; in dispatch()
134 std::min(DispatchWidth, NumMicroOps)); in dispatch()
160 unsigned NumMicroOps = Inst.getNumMicroOps(); in isAvailable() local
162 unsigned Required = std::min(NumMicroOps, DispatchWidth); in isAvailable()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/Stages/
DDispatchStage.cpp63 const unsigned NumMicroOps = IR.getInstruction()->getNumMicroOps(); in checkRCU() local
64 if (RCU.isAvailable(NumMicroOps)) in checkRCU()
82 const unsigned NumMicroOps = IS.getNumMicroOps(); in dispatch() local
83 if (NumMicroOps > DispatchWidth) { in dispatch()
86 CarryOver = NumMicroOps - DispatchWidth; in dispatch()
89 assert(AvailableEntries >= NumMicroOps); in dispatch()
90 AvailableEntries -= NumMicroOps; in dispatch()
134 std::min(DispatchWidth, NumMicroOps)); in dispatch()
160 unsigned NumMicroOps = Inst.getNumMicroOps(); in isAvailable() local
162 unsigned Required = std::min(NumMicroOps, DispatchWidth); in isAvailable()

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