/external/llvm-project/llvm/lib/Target/Mips/ |
D | MipsRegisterBankInfo.h | 75 bool isAmbiguous_64(InstType InstTy, unsigned OpSize) const { in isAmbiguous_64() argument 76 if (InstTy == InstType::Ambiguous && OpSize == 64) in isAmbiguous_64() 81 bool isAmbiguous_32(InstType InstTy, unsigned OpSize) const { in isAmbiguous_32() argument 82 if (InstTy == InstType::Ambiguous && OpSize == 32) in isAmbiguous_32() 87 bool isAmbiguous_32or64(InstType InstTy, unsigned OpSize) const { in isAmbiguous_32or64() argument 88 if (InstTy == InstType::Ambiguous && (OpSize == 32 || OpSize == 64)) in isAmbiguous_32or64() 94 unsigned OpSize) const { in isAmbiguousWithMergeOrUnmerge_64() argument 95 if (InstTy == InstType::AmbiguousWithMergeOrUnmerge && OpSize == 64) in isAmbiguousWithMergeOrUnmerge_64() 100 bool isFloatingPoint_32or64(InstType InstTy, unsigned OpSize) const { in isFloatingPoint_32or64() argument 101 if (InstTy == InstType::FloatingPoint && (OpSize == 32 || OpSize == 64)) in isFloatingPoint_32or64() [all …]
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/external/llvm/utils/TableGen/ |
D | X86RecognizableInstr.h | 51 uint8_t OpSize; variable 122 bool hasREX_WPrefix, uint8_t OpSize); 133 uint8_t OpSize); 138 uint8_t OpSize); 143 uint8_t OpSize); 145 uint8_t OpSize); 147 uint8_t OpSize); 149 uint8_t OpSize); 151 uint8_t OpSize); 153 uint8_t OpSize); [all …]
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D | X86RecognizableInstr.cpp | 211 OpSize = byteFromRec(Rec, "OpSizeBits"); in RecognizableInstr() 419 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)) in insnContext() 423 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext() 425 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext() 427 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext() 429 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext() 446 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext() 448 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext() 450 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext() 452 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext() [all …]
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/external/llvm-project/llvm/utils/TableGen/ |
D | X86RecognizableInstr.h | 177 uint8_t OpSize; variable 248 bool hasREX_WPrefix, uint8_t OpSize); 259 uint8_t OpSize); 264 uint8_t OpSize); 269 uint8_t OpSize); 271 uint8_t OpSize); 273 uint8_t OpSize); 275 uint8_t OpSize); 277 uint8_t OpSize); 279 uint8_t OpSize); [all …]
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D | X86RecognizableInstr.cpp | 82 OpSize = byteFromRec(Rec, "OpSizeBits"); in RecognizableInstr() 295 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)) in insnContext() 299 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext() 301 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext() 305 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext() 307 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext() 324 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext() 326 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext() 334 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext() 336 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext() [all …]
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/external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 44 uint32_t getLitEncoding(const MCOperand &MO, unsigned OpSize) const; 164 unsigned OpSize) const { in getLitEncoding() 183 if (OpSize == 4) in getLitEncoding() 186 assert(OpSize == 8); in getLitEncoding()
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMLegalizerInfo.cpp | 399 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in legalizeCustom() local 404 auto Libcalls = getFCmpLibcalls(Predicate, OpSize); in legalizeCustom() 416 assert((OpSize == 32 || OpSize == 64) && "Unsupported operand size"); in legalizeCustom() 417 auto *ArgTy = OpSize == 32 ? Type::getFloatTy(Ctx) : Type::getDoubleTy(Ctx); in legalizeCustom()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMLegalizerInfo.cpp | 400 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in legalizeCustom() local 405 auto Libcalls = getFCmpLibcalls(Predicate, OpSize); in legalizeCustom() 417 assert((OpSize == 32 || OpSize == 64) && "Unsupported operand size"); in legalizeCustom() 418 auto *ArgTy = OpSize == 32 ? Type::getFloatTy(Ctx) : Type::getDoubleTy(Ctx); in legalizeCustom()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
D | Metadata.cpp | 481 size_t OpSize = NumOps * sizeof(MDOperand); in operator new() local 484 OpSize = alignTo(OpSize, alignof(uint64_t)); in operator new() 485 void *Ptr = reinterpret_cast<char *>(::operator new(OpSize + Size)) + OpSize; in operator new() 496 size_t OpSize = N->NumOperands * sizeof(MDOperand); in operator delete() local 497 OpSize = alignTo(OpSize, alignof(uint64_t)); in operator delete() 502 ::operator delete(reinterpret_cast<char *>(Mem) - OpSize); in operator delete()
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/external/llvm/lib/IR/ |
D | Metadata.cpp | 445 size_t OpSize = NumOps * sizeof(MDOperand); in operator new() local 448 OpSize = alignTo(OpSize, llvm::alignOf<uint64_t>()); in operator new() 449 void *Ptr = reinterpret_cast<char *>(::operator new(OpSize + Size)) + OpSize; in operator new() 458 size_t OpSize = N->NumOperands * sizeof(MDOperand); in operator delete() local 459 OpSize = alignTo(OpSize, llvm::alignOf<uint64_t>()); in operator delete() 464 ::operator delete(reinterpret_cast<char *>(Mem) - OpSize); in operator delete()
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/external/llvm-project/llvm/lib/IR/ |
D | Metadata.cpp | 482 size_t OpSize = NumOps * sizeof(MDOperand); in operator new() local 485 OpSize = alignTo(OpSize, alignof(uint64_t)); in operator new() 486 void *Ptr = reinterpret_cast<char *>(::operator new(OpSize + Size)) + OpSize; in operator new() 497 size_t OpSize = N->NumOperands * sizeof(MDOperand); in operator delete() local 498 OpSize = alignTo(OpSize, alignof(uint64_t)); in operator delete() 503 ::operator delete(reinterpret_cast<char *>(Mem) - OpSize); in operator delete()
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/external/llvm/test/CodeGen/X86/ |
D | rotate4.ll | 4 ; a << (b & (OpSize-1)) | a >> ((0 - b) & (OpSize-1))
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/external/llvm/include/llvm/Analysis/ |
D | TargetTransformInfoImpl.h | 76 unsigned OpSize = OpTy->getScalarSizeInBits(); in getOperationCost() local 77 if (DL.isLegalInteger(OpSize) && in getOperationCost() 78 OpSize <= DL.getPointerTypeSizeInBits(Ty)) in getOperationCost()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.h | 376 bool isInlineConstant(const MachineOperand &MO, unsigned OpSize) const; 377 bool isLiteralConstant(const MachineOperand &MO, unsigned OpSize) const; 389 unsigned OpSize) const;
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D | SIFoldOperands.cpp | 317 unsigned OpSize = TII->getOpSize(MI, 1); in runOnMachineFunction() local 329 if (FoldingImm && !TII->isInlineConstant(OpToFold, OpSize) && in runOnMachineFunction()
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D | SIInstrInfo.cpp | 1501 unsigned OpSize) const { in isInlineConstant() 1509 unsigned BitSize = 8 * OpSize; in isInlineConstant() 1517 unsigned OpSize) const { in isLiteralConstant() 1518 return MO.isImm() && !isInlineConstant(MO, OpSize); in isLiteralConstant() 1548 unsigned OpSize = RI.getRegClass(OpInfo.RegClass)->getSize(); in isImmOperandLegal() local 1549 if (isLiteralConstant(MO, OpSize)) in isImmOperandLegal() 1579 unsigned OpSize) const { in usesConstantBus() 1581 if (isLiteralConstant(MO, OpSize)) in usesConstantBus()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64RegisterBankInfo.cpp | 616 SmallVector<unsigned, 4> OpSize(NumOperands); in getInstrMapping() local 624 OpSize[Idx] = Ty.getSizeInBits(); in getInstrMapping() 667 OpSize[0]); in getInstrMapping() 842 auto Mapping = getValueMapping(OpRegBankIdx[Idx], OpSize[Idx]); in getInstrMapping()
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D | AArch64InstructionSelector.cpp | 477 unsigned OpSize) { in selectBinaryOp() argument 480 if (OpSize == 32) { in selectBinaryOp() 491 } else if (OpSize == 64) { in selectBinaryOp() 507 switch (OpSize) { in selectBinaryOp() 548 unsigned OpSize) { in selectLoadStoreUIOp() argument 552 switch (OpSize) { in selectLoadStoreUIOp() 564 switch (OpSize) { in selectLoadStoreUIOp() 878 unsigned OpSize = MRI.getType(I.getOperand(2).getReg()).getSizeInBits(); in selectFCMPOpc() local 879 if (OpSize != 32 && OpSize != 64) in selectFCMPOpc() 883 return CmpOpcTbl[ShouldUseImm][OpSize == 64]; in selectFCMPOpc() [all …]
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/external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
D | AArch64RegisterBankInfo.cpp | 643 SmallVector<unsigned, 4> OpSize(NumOperands); in getInstrMapping() local 651 OpSize[Idx] = Ty.getSizeInBits(); in getInstrMapping() 704 OpSize[0]); in getInstrMapping() 909 auto Mapping = getValueMapping(OpRegBankIdx[Idx], OpSize[Idx]); in getInstrMapping()
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D | AArch64InstructionSelector.cpp | 636 unsigned OpSize) { in selectBinaryOp() argument 639 if (OpSize == 32) { in selectBinaryOp() 650 } else if (OpSize == 64) { in selectBinaryOp() 666 switch (OpSize) { in selectBinaryOp() 707 unsigned OpSize) { in selectLoadStoreUIOp() argument 711 switch (OpSize) { in selectLoadStoreUIOp() 723 switch (OpSize) { in selectLoadStoreUIOp() 2690 const unsigned OpSize = Ty.getSizeInBits(); in select() local 2695 const unsigned NewOpc = selectBinaryOp(I.getOpcode(), RB.getID(), OpSize); in select() 4190 unsigned OpSize = Ty.getSizeInBits(); in emitFPCompare() local [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Analysis/ |
D | TargetTransformInfoImpl.h | 76 unsigned OpSize = OpTy->getScalarSizeInBits(); in getOperationCost() local 77 if (DL.isLegalInteger(OpSize) && in getOperationCost() 78 OpSize <= DL.getPointerTypeSizeInBits(Ty)) in getOperationCost()
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/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | GISelKnownBits.cpp | 418 unsigned OpSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in computeKnownBitsImpl() local 424 Known.insertBits(SrcOpKnown, I * OpSize); in computeKnownBitsImpl()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetInstrInfo.cpp | 556 int64_t OpSize = MFI.getObjectSize(FI); in foldMemoryOperand() local 561 OpSize = SubRegSize / 8; in foldMemoryOperand() 564 MemSize = std::max(MemSize, OpSize); in foldMemoryOperand()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | TargetInstrInfo.cpp | 587 int64_t OpSize = MFI.getObjectSize(FI); in foldMemoryOperand() local 592 OpSize = SubRegSize / 8; in foldMemoryOperand() 595 MemSize = std::max(MemSize, OpSize); in foldMemoryOperand()
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/external/llvm-project/llvm/lib/ObjectYAML/ |
D | DWARFEmitter.cpp | 837 if (Expected<uint64_t> OpSize = in writeListEntry() local 839 DescriptionsLength += *OpSize; in writeListEntry() 841 return OpSize.takeError(); in writeListEntry()
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