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Searched refs:OpSize16 (Results 1 – 25 of 42) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86InstrSystem.td79 "in{w}\t{%dx, %ax|ax, dx}", [], IIC_IN_RR>, OpSize16;
89 "in{w}\t{$port, %ax|ax, $port}", [], IIC_IN_RI>, OpSize16;
99 "out{w}\t{%ax, %dx|dx, ax}", [], IIC_OUT_RR>, OpSize16;
109 "out{w}\t{%ax, $port|$port, ax}", [], IIC_OUT_IR>, OpSize16;
171 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize16;
178 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize16;
185 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize16;
192 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize16;
207 OpSize16;
210 OpSize16;
[all …]
DX86InstrControl.td32 [], IIC_RET>, OpSize16;
43 [], IIC_RET_IMM>, OpSize16;
49 "{l}ret{w|f}", [], IIC_RET>, OpSize16;
55 "{l}ret{w|f}\t$amt", [], IIC_RET>, OpSize16;
61 OpSize16;
77 "jmp\t$dst", [], IIC_JMP_REL>, OpSize16;
90 [], IIC_Jcc>, OpSize16, TB;
137 OpSize16, Sched<[WriteJump]>;
140 Requires<[Not64BitMode]>, OpSize16, Sched<[WriteJumpLd]>;
160 IIC_JMP_FAR_PTR>, OpSize16, Sched<[WriteJump]>;
[all …]
DX86InstrShiftRotate.td25 [(set GR16:$dst, (shl GR16:$src1, CL))], IIC_SR>, OpSize16;
42 OpSize16;
60 "shl{w}\t$dst", [], IIC_SR>, OpSize16;
79 OpSize16;
95 IIC_SR>, OpSize16;
113 IIC_SR>, OpSize16;
131 [(set GR16:$dst, (srl GR16:$src1, CL))], IIC_SR>, OpSize16;
146 IIC_SR>, OpSize16;
161 [(set GR16:$dst, (srl GR16:$src1, (i8 1)))], IIC_SR>, OpSize16;
179 OpSize16;
[all …]
DX86InstrExtension.td17 "{cbtw|cbw}", [], IIC_CBW>, OpSize16; // AX = signext(AL)
24 "{cwtd|cwd}", [], IIC_CBW>, OpSize16; // DX:AX = signext(AX)
45 TB, OpSize16, Sched<[WriteALU]>;
49 TB, OpSize16, Sched<[WriteALULd]>;
71 TB, OpSize16, Sched<[WriteALU]>;
75 TB, OpSize16, Sched<[WriteALULd]>;
DX86InstrInfo.td1062 "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16;
1095 IIC_POP_REG16>, OpSize16;
1099 IIC_POP_REG>, OpSize16;
1101 IIC_POP_MEM>, OpSize16;
1110 IIC_PUSH_REG>, OpSize16;
1114 IIC_PUSH_REG>, OpSize16;
1119 "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16;
1121 "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16;
1133 IIC_PUSH_MEM>, OpSize16;
1169 OpSize16;
[all …]
DX86InstrArithmetic.td21 "lea{w}\t{$src|$dst}, {$dst|$src}", [], IIC_LEA_16>, OpSize16;
71 [], IIC_MUL16_REG>, OpSize16, Sched<[WriteIMul]>;
98 [], IIC_MUL16_MEM>, OpSize16, SchedLoadReg<WriteIMulLd>;
118 IIC_IMUL16_RR>, OpSize16, Sched<[WriteIMul]>;
136 "imul{w}\t$src", [], IIC_IMUL16_MEM>, OpSize16,
161 TB, OpSize16;
183 TB, OpSize16;
212 IIC_IMUL16_RRI>, OpSize16;
218 IIC_IMUL16_RRI>, OpSize16;
253 OpSize16;
[all …]
DX86InstrTSX.td28 "xbegin\t$dst", []>, OpSize16, Requires<[HasRTM]>;
DX86InstrCMovSetCC.td25 IIC_CMOV16_RR>, TB, OpSize16;
47 TB, OpSize16;
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrControl.td28 "ret{w}", []>, OpSize16;
34 "ret{w}\t$amt", []>, OpSize16;
40 "{l}ret{w|f}", []>, OpSize16;
46 "{l}ret{w|f}\t$amt", []>, OpSize16;
52 OpSize16;
66 "jmp\t$dst", []>, OpSize16;
83 []>, OpSize16, TB;
129 OpSize16, Sched<[WriteJump]>;
132 OpSize16, Sched<[WriteJumpLd]>;
163 OpSize16, Sched<[WriteJump]>, NOTRACK;
[all …]
DX86InstrSystem.td28 "ud1{w} {$src2, $src1|$src1, $src2}", []>, TB, OpSize16;
35 "ud1{w} {$src2, $src1|$src1, $src2}", []>, TB, OpSize16;
88 OpSize16;
98 "in{w}\t{$port, %ax|ax, $port}", []>, OpSize16;
107 OpSize16;
117 "out{w}\t{%ax, $port|$port, ax}", []>, OpSize16;
180 "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize16;
190 "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize16;
210 OpSize16, NotMemoryFoldable;
213 OpSize16, NotMemoryFoldable;
[all …]
DX86InstrExtension.td16 "{cbtw|cbw}", []>, OpSize16, Sched<[WriteALU]>;
28 "{cwtd|cwd}", []>, OpSize16, Sched<[WriteALU]>;
41 TB, OpSize16, Sched<[WriteALU]>;
45 TB, OpSize16, Sched<[WriteALULd]>;
67 TB, OpSize16, Sched<[WriteALU]>;
71 TB, OpSize16, Sched<[WriteALULd]>;
96 []>, TB, OpSize16, Sched<[WriteALU]>, NotMemoryFoldable;
99 []>, TB, OpSize16, Sched<[WriteALU]>, NotMemoryFoldable;
103 []>, OpSize16, TB, Sched<[WriteALULd]>, NotMemoryFoldable;
106 []>, TB, OpSize16, Sched<[WriteALULd]>, NotMemoryFoldable;
[all …]
DX86InstrShiftRotate.td24 [(set GR16:$dst, (shl GR16:$src1, CL))]>, OpSize16;
41 OpSize16;
58 "shl{w}\t$dst", []>, OpSize16;
75 OpSize16;
93 OpSize16;
110 OpSize16;
128 [(set GR16:$dst, (srl GR16:$src1, CL))]>, OpSize16;
143 OpSize16;
158 [(set GR16:$dst, (srl GR16:$src1, (i8 1)))]>, OpSize16;
175 OpSize16;
[all …]
DX86InstrInfo.td1264 "nop{w}\t$zero", []>, TB, OpSize16, NotMemoryFoldable;
1272 "nop{w}\t$zero", []>, TB, OpSize16, NotMemoryFoldable;
1307 OpSize16;
1313 OpSize16, NotMemoryFoldable;
1320 OpSize16;
1327 OpSize16;
1333 OpSize16, NotMemoryFoldable;
1339 "push{w}\t$imm", []>, OpSize16;
1341 "push{w}\t$imm", []>, OpSize16;
1353 OpSize16;
[all …]
DX86InstrArithmetic.td20 "lea{w}\t{$src|$dst}, {$dst|$src}", []>, OpSize16;
70 []>, OpSize16, Sched<[WriteIMul16]>;
96 "mul{w}\t$src", []>, OpSize16, SchedLoadReg<WriteIMul16>;
116 OpSize16, Sched<[WriteIMul16]>;
134 "imul{w}\t$src", []>, OpSize16, SchedLoadReg<WriteIMul16>;
158 Sched<[WriteIMul16Reg]>, TB, OpSize16;
178 Sched<[WriteIMul16Reg.Folded, WriteIMul16Reg.ReadAfterFold]>, TB, OpSize16;
206 Sched<[WriteIMul16Imm]>, OpSize16;
212 Sched<[WriteIMul16Imm]>, OpSize16;
245 Sched<[WriteIMul16Imm.Folded]>, OpSize16;
[all …]
DX86InstrTSX.td29 "xbegin\t$dst", []>, OpSize16;
DX86InstrCMovSetCC.td24 TB, OpSize16;
44 timm:$cond, EFLAGS))]>, TB, OpSize16;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrControl.td28 "ret{w}", []>, OpSize16;
34 "ret{w}\t$amt", []>, OpSize16;
40 "{l}ret{w|f}", []>, OpSize16;
46 "{l}ret{w|f}\t$amt", []>, OpSize16;
52 OpSize16;
66 "jmp\t$dst", []>, OpSize16;
83 []>, OpSize16, TB;
129 OpSize16, Sched<[WriteJump]>;
132 OpSize16, Sched<[WriteJumpLd]>;
163 OpSize16, Sched<[WriteJump]>, NOTRACK;
[all …]
DX86InstrShiftRotate.td24 [(set GR16:$dst, (shl GR16:$src1, CL))]>, OpSize16;
41 OpSize16;
58 "shl{w}\t$dst", []>, OpSize16;
75 OpSize16;
93 OpSize16;
110 OpSize16;
128 [(set GR16:$dst, (srl GR16:$src1, CL))]>, OpSize16;
143 OpSize16;
158 [(set GR16:$dst, (srl GR16:$src1, (i8 1)))]>, OpSize16;
175 OpSize16;
[all …]
DX86InstrSystem.td74 OpSize16;
84 "in{w}\t{$port, %ax|ax, $port}", []>, OpSize16;
93 OpSize16;
103 "out{w}\t{%ax, $port|$port, ax}", []>, OpSize16;
166 "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize16;
176 "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize16;
196 OpSize16, NotMemoryFoldable;
199 OpSize16, NotMemoryFoldable;
220 OpSize16, NotMemoryFoldable;
223 OpSize16, NotMemoryFoldable;
[all …]
DX86InstrExtension.td16 "{cbtw|cbw}", []>, OpSize16, Sched<[WriteALU]>;
28 "{cwtd|cwd}", []>, OpSize16, Sched<[WriteALU]>;
41 TB, OpSize16, Sched<[WriteALU]>;
45 TB, OpSize16, Sched<[WriteALULd]>;
67 TB, OpSize16, Sched<[WriteALU]>;
71 TB, OpSize16, Sched<[WriteALULd]>;
96 []>, TB, OpSize16, Sched<[WriteALU]>, NotMemoryFoldable;
99 []>, TB, OpSize16, Sched<[WriteALU]>, NotMemoryFoldable;
103 []>, OpSize16, TB, Sched<[WriteALULd]>, NotMemoryFoldable;
106 []>, TB, OpSize16, Sched<[WriteALULd]>, NotMemoryFoldable;
[all …]
DX86InstrInfo.td1209 "nop{w}\t$zero", []>, TB, OpSize16, NotMemoryFoldable;
1217 "nop{w}\t$zero", []>, TB, OpSize16, NotMemoryFoldable;
1252 OpSize16;
1258 OpSize16, NotMemoryFoldable;
1265 OpSize16;
1272 OpSize16;
1278 OpSize16, NotMemoryFoldable;
1284 "push{w}\t$imm", []>, OpSize16;
1286 "push{w}\t$imm", []>, OpSize16;
1298 OpSize16;
[all …]
DX86InstrArithmetic.td20 "lea{w}\t{$src|$dst}, {$dst|$src}", []>, OpSize16;
70 []>, OpSize16, Sched<[WriteIMul16]>;
96 "mul{w}\t$src", []>, OpSize16, SchedLoadReg<WriteIMul16>;
116 OpSize16, Sched<[WriteIMul16]>;
134 "imul{w}\t$src", []>, OpSize16, SchedLoadReg<WriteIMul16>;
158 Sched<[WriteIMul16Reg]>, TB, OpSize16;
178 Sched<[WriteIMul16Reg.Folded, WriteIMul16Reg.ReadAfterFold]>, TB, OpSize16;
206 Sched<[WriteIMul16Imm]>, OpSize16;
212 Sched<[WriteIMul16Imm]>, OpSize16;
245 Sched<[WriteIMul16Imm.Folded]>, OpSize16;
[all …]
DX86InstrTSX.td29 "xbegin\t$dst", []>, OpSize16;
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp131 OpSize16 = 1, OpSize32 = 2 enumerator
419 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)) in insnContext()
423 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
425 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
427 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext()
429 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
446 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
448 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
450 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext()
452 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
[all …]
/external/llvm-project/llvm/utils/TableGen/
DX86RecognizableInstr.cpp295 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)) in insnContext()
299 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
301 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
305 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext()
307 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
324 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
326 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
334 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext()
336 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
864 if(OpSize == X86Local::OpSize16) { in typeFromString()
[all …]

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