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Searched refs:PSEUDO (Results 1 – 25 of 65) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrCall.td42 "PSEUDO CALL INDIRECT\t$callee",
43 "PSEUDO CALL INDIRECT\t$callee">,
90 "PSEUDO CALL INDIRECT\t$callee",
91 "PSEUDO CALL INDIRECT\t$callee">;
114 "PSEUDO RET_CALL INDIRECT\t$callee",
115 "PSEUDO RET_CALL INDIRECT\t$callee">,
/external/mesa3d/src/amd/compiler/
Daco_reduce_assign.cpp70 …d{create_instruction<Instruction>(aco_opcode::p_end_linear_vgpr, Format::PSEUDO, vtmp_in_loop ? 2 … in setup_reduce_temp()
99 …ate{create_instruction<Pseudo_instruction>(aco_opcode::p_start_linear_vgpr, Format::PSEUDO, 0, 1)}; in setup_reduce_temp()
139 …ate{create_instruction<Pseudo_instruction>(aco_opcode::p_start_linear_vgpr, Format::PSEUDO, 0, 1)}; in setup_reduce_temp()
Daco_spill.cpp246 …ormat::VOP1 && instr->format != Format::SOP1 && instr->format != Format::PSEUDO && instr->format !… in should_rematerialize()
249 if (instr->format == Format::PSEUDO && instr->opcode != aco_opcode::p_create_vector && in should_rematerialize()
273 …ormat::VOP1 || instr->format == Format::SOP1 || instr->format == Format::PSEUDO || instr->format =… in do_reload()
274 …assert((instr->format != Format::PSEUDO || instr->opcode == aco_opcode::p_create_vector || instr->… in do_reload()
282 } else if (instr->format == Format::PSEUDO) { in do_reload()
299 …uction> reload{create_instruction<Pseudo_instruction>(aco_opcode::p_reload, Format::PSEUDO, 1, 1)}; in do_reload()
863 …truction> spill{create_instruction<Pseudo_instruction>(aco_opcode::p_spill, Format::PSEUDO, 2, 0)}; in add_coupling_code()
915 …truction> spill{create_instruction<Pseudo_instruction>(aco_opcode::p_spill, Format::PSEUDO, 2, 0)}; in add_coupling_code()
1034 …_instruction> phi{create_instruction<Pseudo_instruction>(opcode, Format::PSEUDO, preds.size(), 1)}; in add_coupling_code()
1182 …truction> spill{create_instruction<Pseudo_instruction>(aco_opcode::p_spill, Format::PSEUDO, 2, 0)}; in process_block()
[all …]
Daco_ssa_elimination.cpp81 …eate_instruction<Pseudo_instruction>(aco_opcode::p_parallelcopy, Format::PSEUDO, entry.second.size… in insert_parallelcopies()
100 …eate_instruction<Pseudo_instruction>(aco_opcode::p_parallelcopy, Format::PSEUDO, entry.second.size… in insert_parallelcopies()
Daco_lower_phis.cpp94 …on> phi{create_instruction<Pseudo_instruction>(aco_opcode::p_linear_phi, Format::PSEUDO, pred, 1)}; in get_ssa()
240 …hi{create_instruction<Pseudo_instruction>(aco_opcode::p_linear_phi, Format::PSEUDO, num_preds, 1)}; in lower_divergent_bool_phi()
Daco_validate.cpp225 …check(instr->format == Format::PSEUDO || instr->definitions[i].bytes() <= 4, "Only Pseudo instruct… in validate_ir()
329 case Format::PSEUDO: { in validate_ir()
571 if (instr->format == Format::PSEUDO && chip >= GFX8) in validate_subdword_operand()
621 if (instr->format == Format::PSEUDO && chip >= GFX8) in validate_subdword_definition()
652 if (instr->format == Format::PSEUDO) in get_subdword_bytes_written()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonIICScalar.td15 InstrItinData<PSEUDO, [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>],
DHexagonDepInstrInfo.td26198 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26209 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26219 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26230 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26240 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26251 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26261 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26272 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26282 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26293 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
[all …]
DHexagonScheduleV55.td12 InstrItinData<PSEUDO, [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>],
DHexagonScheduleV5.td14 InstrItinData<PSEUDO, [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
DHexagonSchedule.td48 def PSEUDO : InstrItinClass;
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonIICScalar.td15 InstrItinData<PSEUDO, [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>],
DHexagonScheduleV55.td12 InstrItinData<PSEUDO, [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>],
DHexagonScheduleV5.td14 InstrItinData<PSEUDO, [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
DHexagonDepInstrInfo.td26527 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26539 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26550 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26562 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26573 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26585 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26596 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26608 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26619 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
26631 PSEUDO, TypeMAPPING>, Requires<[UseHVXV60]> {
[all …]
DHexagonScheduleV67T.td11 InstrItinData<PSEUDO, [InstrStage<1, [SLOT0, SLOT2, SLOT3]>], [2, 1, 1],
DHexagonSchedule.td48 def PSEUDO : InstrItinClass;
/external/llvm/lib/Target/X86/
DX86InstrCompiler.td524 "#CMOV_"#NAME#" PSEUDO!",
870 "#BINOP "#NAME#"8mi PSEUDO!",
874 "#BINOP "#NAME#"8mr PSEUDO!",
880 "#BINOP "#NAME#"32mi PSEUDO!",
884 "#BINOP "#NAME#"32mr PSEUDO!",
888 "#BINOP "#NAME#"64mi32 PSEUDO!",
892 "#BINOP "#NAME#"64mr PSEUDO!",
912 "#BINOP "#NAME#"32mr PSEUDO!",
918 "#BINOP "#NAME#"64mr PSEUDO!",
930 "#UNOP "#NAME#"8m PSEUDO!",
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonScheduleV4.td37 def PSEUDO : InstrItinClass;
192 InstrItinData<PSEUDO , [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.td560 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
565 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
570 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
575 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
580 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
585 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
590 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
595 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
/external/llvm-project/llvm/lib/Target/BPF/
DBPFInstrInfo.td560 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
565 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
570 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
575 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
580 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
585 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
590 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
595 "# Select PSEUDO $dst = $lhs $imm $rhs ? $src : $src2",
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRInstrInfo.td1932 "# Select8 PSEUDO",
1939 "# Select16 PSEUDO",
1946 "# Lsl8 PSEUDO",
1953 "# Lsl16 PSEUDO",
1960 "# Lsr8 PSEUDO",
1967 "# Lsr16 PSEUDO",
1974 "# Rol8 PSEUDO",
1981 "# Rol16 PSEUDO",
1988 "# Ror8 PSEUDO",
1995 "# Ror16 PSEUDO",
[all …]
/external/llvm-project/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td184 "# ADDframe PSEUDO", []>;
190 "# Select8 PSEUDO",
194 "# Select16 PSEUDO",
200 "# Shl8 PSEUDO",
203 "# Shl16 PSEUDO",
206 "# Sra8 PSEUDO",
209 "# Sra16 PSEUDO",
212 "# Srl8 PSEUDO",
215 "# Srl16 PSEUDO",
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td184 "# ADDframe PSEUDO", []>;
190 "# Select8 PSEUDO",
194 "# Select16 PSEUDO",
200 "# Shl8 PSEUDO",
203 "# Shl16 PSEUDO",
206 "# Sra8 PSEUDO",
209 "# Sra16 PSEUDO",
212 "# Srl8 PSEUDO",
215 "# Srl16 PSEUDO",
/external/llvm-project/llvm/lib/Target/AVR/
DAVRInstrInfo.td1948 "# Select8 PSEUDO",
1955 "# Select16 PSEUDO",
1962 "# Lsl8 PSEUDO",
1969 "# Lsl16 PSEUDO",
1976 "# Lsr8 PSEUDO",
1983 "# Lsr16 PSEUDO",
1990 "# Rol8 PSEUDO",
1997 "# Rol16 PSEUDO",
2004 "# Ror8 PSEUDO",
2011 "# Ror16 PSEUDO",
[all …]

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