| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SILoadStoreOptimizer.cpp | 214 const CombineInfo &Paired);
216 CombineInfo &Paired, bool Modify = false);
218 const CombineInfo &Paired);
219 static unsigned getNewOpcode(const CombineInfo &CI, const CombineInfo &Paired);
221 const CombineInfo &Paired);
223 const CombineInfo &Paired);
225 bool checkAndPrepareMerge(CombineInfo &CI, CombineInfo &Paired,
231 CombineInfo &Paired,
237 mergeWrite2Pair(CombineInfo &CI, CombineInfo &Paired,
240 mergeImagePair(CombineInfo &CI, CombineInfo &Paired,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SILoadStoreOptimizer.cpp | 211 const CombineInfo &Paired);
213 CombineInfo &Paired);
215 const CombineInfo &Paired);
216 static unsigned getNewOpcode(const CombineInfo &CI, const CombineInfo &Paired);
218 const CombineInfo &Paired);
220 const CombineInfo &Paired);
222 bool findMatchingInst(CombineInfo &CI, CombineInfo &Paired);
226 MachineBasicBlock::iterator mergeRead2Pair(CombineInfo &CI, CombineInfo &Paired);
230 MachineBasicBlock::iterator mergeWrite2Pair(CombineInfo &CI, CombineInfo &Paired);
231 MachineBasicBlock::iterator mergeImagePair(CombineInfo &CI, CombineInfo &Paired);
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SILoadStoreOptimizer.cpp | 74 MachineBasicBlock::iterator Paired,
79 MachineBasicBlock::iterator Paired,
194 MachineBasicBlock::iterator Paired, in mergeRead2Pair() argument
203 const MachineOperand *Dest1 = TII->getNamedOperand(*Paired, AMDGPU::OpName::vdst); in mergeRead2Pair()
208 = TII->getNamedOperand(*Paired, AMDGPU::OpName::offset)->getImm() & 0xffff; in mergeRead2Pair()
241 .addMemOperand(*Paired->memoperands_begin()); in mergeRead2Pair()
260 SlotIndex PairedIndex = LIS->getInstructionIndex(*Paired); in mergeRead2Pair()
268 LIS->ReplaceMachineInstrInMaps(*Paired, *Copy1); in mergeRead2Pair()
271 Paired->eraseFromParent(); in mergeRead2Pair()
289 MachineBasicBlock::iterator Paired, in mergeWrite2Pair() argument
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 150 MachineBasicBlock::iterator Paired,
783 MachineBasicBlock::iterator Paired, in mergePairedInsns() argument
791 if (NextI == Paired) in mergePairedInsns()
857 std::next(I), std::next(Paired))) in mergePairedInsns()
870 MachineBasicBlock::iterator InsertionPoint = MergeForward ? Paired : I; in mergePairedInsns()
874 MergeForward ? getLdStBaseOp(*Paired) : getLdStBaseOp(*I); in mergePairedInsns()
877 int PairedOffset = getLdStOffsetOp(*Paired).getImm(); in mergePairedInsns()
878 bool PairedIsUnscaled = TII->isUnscaledLdSt(Paired->getOpcode()); in mergePairedInsns()
883 int MemSize = TII->getMemScale(*Paired); in mergePairedInsns()
887 assert(!(PairedOffset % TII->getMemScale(*Paired)) && in mergePairedInsns()
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| D | AArch64.td | 181 "Paired128IsSlow", "true", "Paired 128 bit loads and stores are slow">;
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 151 MachineBasicBlock::iterator Paired,
783 MachineBasicBlock::iterator Paired, in mergePairedInsns() argument
791 if (NextI == Paired) in mergePairedInsns()
857 std::next(I), std::next(Paired))) in mergePairedInsns()
870 MachineBasicBlock::iterator InsertionPoint = MergeForward ? Paired : I; in mergePairedInsns()
874 MergeForward ? getLdStBaseOp(*Paired) : getLdStBaseOp(*I); in mergePairedInsns()
877 int PairedOffset = getLdStOffsetOp(*Paired).getImm(); in mergePairedInsns()
878 bool PairedIsUnscaled = TII->isUnscaledLdSt(Paired->getOpcode()); in mergePairedInsns()
883 int MemSize = TII->getMemScale(*Paired); in mergePairedInsns()
887 assert(!(PairedOffset % TII->getMemScale(*Paired)) && in mergePairedInsns()
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| D | AArch64.td | 204 "Paired128IsSlow", "true", "Paired 128 bit loads and stores are slow">;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 280 unsigned Paired = Hint.second; in getRegAllocationHints() local
281 if (Paired == 0) in getRegAllocationHints()
285 if (TargetRegisterInfo::isPhysicalRegister(Paired)) { in getRegAllocationHints()
286 PairedPhys = Paired; in getRegAllocationHints()
287 } else if (VRM && VRM->hasPhys(Paired)) { in getRegAllocationHints()
288 PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this); in getRegAllocationHints()
302 unsigned Paired = getPairedGPR(Reg, !Odd, this); in getRegAllocationHints() local
303 if (!Paired || MRI.isReserved(Paired)) in getRegAllocationHints()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 326 unsigned Paired = Hint.second; in getRegAllocationHints() local
327 if (Paired == 0) in getRegAllocationHints()
331 if (Register::isPhysicalRegister(Paired)) { in getRegAllocationHints()
332 PairedPhys = Paired; in getRegAllocationHints()
333 } else if (VRM && VRM->hasPhys(Paired)) { in getRegAllocationHints()
334 PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this); in getRegAllocationHints()
346 unsigned Paired = getPairedGPR(Reg, !Odd, this); in getRegAllocationHints() local
347 if (!Paired || MRI.isReserved(Paired)) in getRegAllocationHints()
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| D | ARMParallelDSP.cpp | 67 bool Paired = false; member
147 Mul0->Paired = true; in AddMulPair()
148 Mul1->Paired = true; in AddMulPair()
601 if (PMul0->Paired) in CreateParallelPairs()
609 if (PMul1->Paired) in CreateParallelPairs()
674 if (MulCand->Paired) in InsertParallelMACs()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 123 MachineBasicBlock::iterator Paired,
797 MachineBasicBlock::iterator Paired, in mergePairedInsns() argument
805 if (NextI == Paired) in mergePairedInsns()
817 MachineBasicBlock::iterator InsertionPoint = MergeForward ? Paired : I; in mergePairedInsns()
821 MergeForward ? getLdStBaseOp(*Paired) : getLdStBaseOp(*I); in mergePairedInsns()
824 int PairedOffset = getLdStOffsetOp(*Paired).getImm(); in mergePairedInsns()
825 bool PairedIsUnscaled = TII->isUnscaledLdSt(Paired->getOpcode()); in mergePairedInsns()
830 int MemSize = getMemScale(*Paired); in mergePairedInsns()
834 assert(!(PairedOffset % getMemScale(*Paired)) && in mergePairedInsns()
845 RtMI = &*Paired; in mergePairedInsns()
[all …]
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 345 Register Paired = Hint.second; in getRegAllocationHints() local
346 if (!Paired) in getRegAllocationHints()
350 if (Paired.isPhysical()) { in getRegAllocationHints()
351 PairedPhys = Paired; in getRegAllocationHints()
352 } else if (VRM && VRM->hasPhys(Paired)) { in getRegAllocationHints()
353 PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this); in getRegAllocationHints()
365 MCPhysReg Paired = getPairedGPR(Reg, !Odd, this); in getRegAllocationHints() local
366 if (!Paired || MRI.isReserved(Paired)) in getRegAllocationHints()
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| D | ARMParallelDSP.cpp | 68 bool Paired = false; member
148 Mul0->Paired = true; in AddMulPair()
149 Mul1->Paired = true; in AddMulPair()
606 if (PMul0->Paired) in CreateParallelPairs()
614 if (PMul1->Paired) in CreateParallelPairs()
679 if (MulCand->Paired) in InsertParallelMACs()
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| /external/cldr/tools/java/org/unicode/cldr/draft/ |
| D | ManualChanges.txt | 25 Punctuation;Paired;Add;[（﹙⁽₍ ）﹚⁾₎ ［ ］ ｛﹛ ｝﹜ ｟ ｠ 〈-「｢ 」｣ 『-】 〔﹝ 〕﹞ 〖-〛 ⌈-⌋ ⎴ ⎵ ⏜-⏡]
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| D | GeneratePickerData.txt | 40 Punctuation:(Open|Close|Initial|Final)(.*)>Punctuation:Paired
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCScheduleP9.td | 149 // Paired ('P') - certain cracked and expanded iops are paired such that they
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCScheduleP9.td | 150 // Paired ('P') - certain cracked and expanded iops are paired such that they
|
| D | PPCInstrPrefix.td | 1658 // Intrinsics for Paired Vector Loads.
1664 // Intrinsics for Paired Vector Stores.
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| /external/tensorflow/tensorflow/compiler/xla/ |
| D | xla_data.proto | 61 C64 = 15; // Paired F32 (real, imag), as in std::complex<float>.
62 C128 = 18; // Paired F64 (real, imag), as in std::complex<double>.
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | diagnostics.s | 456 @ Paired load/store of pc
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSubtargetInfo.inc | 300 …{ "slow-paired-128", "Paired 128 bit loads and stores are slow", AArch64::FeatureSlowPaired128, { …
|
| /external/icu/icu4c/source/data/unidata/ |
| D | ppucd.txt | 5255 # Paired punctuation
10129 # Paired arrows and harpoons
11838 # Paired punctuation
12285 # Paired harpoons
12897 # Paired triangle-headed arrows
|