/external/libffi/src/tile/ |
D | tile.S | 32 #define REG_SIZE FFI_SIZEOF_ARG macro 41 #define LINKAGE_SIZE (2 * REG_SIZE) 97 addi TMP, sp, -REG_SIZE 101 REG_SIZE + REG_SIZE + LINKAGE_SIZE + 7 107 addi TMP2, sp, -(REG_SIZE * 2) 112 .cfi_offset r52, -REG_SIZE 121 addi TMP, sp, REG_SIZE 140 addi INCOMING_STACK_ARGS, INCOMING_STACK_ARGS, REG_SIZE 145 addi OUTGOING_STACK_ARGS, OUTGOING_STACK_ARGS, REG_SIZE 146 addi STACK_ARG_BYTES, STACK_ARG_BYTES, -REG_SIZE [all …]
|
/external/python/cpython2/Modules/_ctypes/libffi/src/tile/ |
D | tile.S | 32 #define REG_SIZE FFI_SIZEOF_ARG macro 41 #define LINKAGE_SIZE (2 * REG_SIZE) 97 addi TMP, sp, -REG_SIZE 101 REG_SIZE + REG_SIZE + LINKAGE_SIZE + 7 107 addi TMP2, sp, -(REG_SIZE * 2) 112 .cfi_offset r52, -REG_SIZE 121 addi TMP, sp, REG_SIZE 140 addi INCOMING_STACK_ARGS, INCOMING_STACK_ARGS, REG_SIZE 145 addi OUTGOING_STACK_ARGS, OUTGOING_STACK_ARGS, REG_SIZE 146 addi STACK_ARG_BYTES, STACK_ARG_BYTES, -REG_SIZE [all …]
|
/external/mesa3d/src/intel/compiler/ |
D | brw_fs_register_coalesce.cpp | 58 dst.offset += (i < inst->header_size ? REG_SIZE : in is_nop_mov() 235 const int offset = inst->src[0].offset / REG_SIZE; in register_coalesce() 246 for (unsigned i = 0; i < MAX2(inst->size_written / REG_SIZE, 1); i++) in register_coalesce() 247 dst_reg_offset[offset + i] = inst->dst.offset / REG_SIZE + i; in register_coalesce() 307 scan_inst->dst.offset = scan_inst->dst.offset % REG_SIZE + in register_coalesce() 308 dst_reg_offset[scan_inst->dst.offset / REG_SIZE] * REG_SIZE; in register_coalesce() 315 scan_inst->src[j].offset = scan_inst->src[j].offset % REG_SIZE + in register_coalesce() 316 dst_reg_offset[scan_inst->src[j].offset / REG_SIZE] * REG_SIZE; in register_coalesce()
|
D | brw_ir_vec4.h | 79 reg->nr += suboffset / REG_SIZE; in add_byte_offset() 80 reg->offset = suboffset % REG_SIZE; in add_byte_offset() 87 reg->nr += suboffset / REG_SIZE; in add_byte_offset() 88 reg->subnr = suboffset % REG_SIZE; in add_byte_offset() 235 (r.file == UNIFORM ? 16 : REG_SIZE) + r.offset + in reg_offset() 255 t1.offset += 4 * REG_SIZE; in regions_overlap() 420 return DIV_ROUND_UP(reg_offset(inst->dst) % REG_SIZE + inst->size_written, in regs_written() 421 REG_SIZE); in regs_written() 434 inst->src[i].file == UNIFORM || inst->src[i].file == IMM ? 16 : REG_SIZE; in regs_read()
|
D | brw_vec4_copy_propagation.cpp | 49 inst->dst.offset % REG_SIZE == 0 && in is_direct_copy() 76 return regions_overlap(*src, REG_SIZE, inst->dst, inst->size_written) && in is_channel_updated() 323 if (inst->size_written > REG_SIZE && is_uniform(value)) in try_copy_propagate() 344 if (inst->src[arg].offset % REG_SIZE || value.offset % REG_SIZE) in try_copy_propagate() 489 if (inst->size_read(i) != REG_SIZE || in opt_copy_propagation() 490 inst->src[i].offset % REG_SIZE) in opt_copy_propagation() 494 inst->src[i].offset / REG_SIZE); in opt_copy_propagation() 506 alloc.offsets[inst->dst.nr] + inst->dst.offset / REG_SIZE; in opt_copy_propagation()
|
D | brw_ir_fs.h | 85 reg.nr += suboffset / REG_SIZE; in byte_offset() 86 reg.offset = suboffset % REG_SIZE; in byte_offset() 92 reg.nr += suboffset / REG_SIZE; in byte_offset() 93 reg.subnr = suboffset % REG_SIZE; in byte_offset() 184 (r.file == UNIFORM ? 4 : REG_SIZE) + r.offset + in reg_offset() 217 regions_overlap(byte_offset(t, 4 * REG_SIZE), dr / 2, s, ds); in regions_overlap() 444 return DIV_ROUND_UP(reg_offset(inst->dst) % REG_SIZE + in regs_written() 447 REG_SIZE); in regs_written() 462 const unsigned reg_size = inst->src[i].file == UNIFORM ? 4 : REG_SIZE; in regs_read() 669 alloc.sizes[inst->src[0].nr] * REG_SIZE == inst->size_written; in is_coalescing_payload()
|
D | brw_fs_reg_allocate.cpp | 40 reg->nr = reg_hw_locations[reg->nr] + reg->offset / REG_SIZE; in assign_reg() 41 reg->offset %= REG_SIZE; in assign_reg() 879 REG_SIZE; in emit_unspill() 897 unspill_inst->size_written = reg_size * REG_SIZE; in emit_unspill() 906 } else if (devinfo->gen >= 7 && spill_offset < (1 << 12) * REG_SIZE) { in emit_unspill() 924 dst.offset += reg_size * REG_SIZE; in emit_unspill() 925 spill_offset += reg_size * REG_SIZE; in emit_unspill() 935 REG_SIZE; in emit_spill() 973 src.offset += reg_size * REG_SIZE; in emit_spill() 974 spill_offset += reg_size * REG_SIZE; in emit_spill() [all …]
|
D | brw_fs_lower_regioning.cpp | 114 if (reg_offset(inst->src[i]) % REG_SIZE != in required_dst_byte_offset() 115 reg_offset(inst->dst) % REG_SIZE) in required_dst_byte_offset() 119 return reg_offset(inst->dst) % REG_SIZE; in required_dst_byte_offset() 146 reg_offset(inst->src[i]) % REG_SIZE > 0 && in has_invalid_src_region() 154 const unsigned dst_byte_offset = reg_offset(inst->dst) % REG_SIZE; in has_invalid_src_region() 155 const unsigned src_byte_offset = reg_offset(inst->src[i]) % REG_SIZE; in has_invalid_src_region() 175 const unsigned dst_byte_offset = reg_offset(inst->dst) % REG_SIZE; in has_invalid_dst_region()
|
D | brw_fs_validate.cpp | 47 fsv_assert(inst->dst.offset / REG_SIZE + regs_written(inst) <= in validate() 53 fsv_assert(inst->src[i].offset / REG_SIZE + regs_read(inst, i) <= in validate()
|
D | brw_vec4.cpp | 202 return size_written > REG_SIZE; in has_source_and_destination_hazard() 216 return mlen * REG_SIZE; in size_read() 220 return mlen * REG_SIZE; in size_read() 1077 int reg = inst->src[i].nr + inst->src[i].offset / REG_SIZE; in opt_set_dependency_control() 1096 int reg = inst->dst.nr + inst->dst.offset / REG_SIZE; in opt_set_dependency_control() 1568 inst->dst.offset / REG_SIZE != 0) { in split_virtual_grfs() 1570 inst->dst.offset / REG_SIZE - 1); in split_virtual_grfs() 1571 inst->dst.offset %= REG_SIZE; in split_virtual_grfs() 1575 inst->src[i].offset / REG_SIZE != 0) { in split_virtual_grfs() 1577 inst->src[i].offset / REG_SIZE - 1); in split_virtual_grfs() [all …]
|
D | brw_fs_generator.cpp | 78 const unsigned reg_width = REG_SIZE / (reg->stride * type_sz(reg->type)); in brw_reg_from_fs_reg() 98 assert(reg->stride * type_sz(reg->type) <= REG_SIZE); in brw_reg_from_fs_reg() 329 const unsigned rlen = dst_is_null ? 0 : inst->size_written / REG_SIZE; in generate_send() 443 assert(inst->size_written % REG_SIZE == 0); in generate_fb_read() 449 inst->header_size, inst->size_written / REG_SIZE, in generate_fb_read() 464 unsigned imm_byte_offset = reg.nr * REG_SIZE + reg.subnr; in generate_mov_indirect() 469 reg.nr = imm_byte_offset / REG_SIZE; in generate_mov_indirect() 470 reg.subnr = imm_byte_offset % REG_SIZE; in generate_mov_indirect() 653 uint32_t src_start_offset = src.nr * REG_SIZE + src.subnr; in generate_shuffle() 815 assert(inst->size_written % REG_SIZE == 0); in generate_urb_read() [all …]
|
D | brw_ir_performance.cpp | 125 td(inst->dst.type), sd(DIV_ROUND_UP(inst->size_written, REG_SIZE)), in instruction_info() 134 ss = DIV_ROUND_UP(inst->size_read(2), REG_SIZE) + in instruction_info() 135 DIV_ROUND_UP(inst->size_read(3), REG_SIZE); in instruction_info() 138 ss = MAX2(ss, DIV_ROUND_UP(inst->size_read(i), REG_SIZE)); in instruction_info() 142 sx = DIV_ROUND_UP(inst->exec_size * type_sz(tx), REG_SIZE); in instruction_info() 156 td(inst->dst.type), sd(DIV_ROUND_UP(inst->size_written, REG_SIZE)), in instruction_info() 162 ss = MAX2(ss, DIV_ROUND_UP(inst->size_read(i), REG_SIZE)); in instruction_info() 165 sx = DIV_ROUND_UP(inst->exec_size * type_sz(tx), REG_SIZE); in instruction_info() 1176 const unsigned i = r.nr + r.offset / REG_SIZE + delta; in reg_dependency_id() 1187 r.nr + r.offset / REG_SIZE + delta; in reg_dependency_id() [all …]
|
D | brw_fs.cpp | 738 this->dst.offset % REG_SIZE != 0); in is_partial_write() 955 return mlen * REG_SIZE; in size_read() 957 return ex_mlen * REG_SIZE; in size_read() 965 return src[0].file == BAD_FILE ? 0 : 2 * REG_SIZE; in size_read() 967 return mlen * REG_SIZE; in size_read() 981 return mlen * REG_SIZE; in size_read() 992 return mlen * REG_SIZE; in size_read() 1002 return REG_SIZE; in size_read() 1007 return REG_SIZE; in size_read() 1018 return mlen * REG_SIZE; in size_read() [all …]
|
D | brw_fs_saturate_propagation.cpp | 129 scan_inst->src[i].offset / REG_SIZE == in opt_saturate_propagation_local() 130 inst->src[0].offset / REG_SIZE) { in opt_saturate_propagation_local()
|
D | brw_fs_builder.h | 206 REG_SIZE)), 448 if (dispatch_width() * type_sz(tmp.type) > 2 * REG_SIZE) { in emit_scan() 701 inst->size_written = header_size * REG_SIZE; in LOAD_PAYLOAD() 705 REG_SIZE); in LOAD_PAYLOAD() 717 inst->size_written = shader->alloc.sizes[dst.nr] * REG_SIZE; in UNDEF()
|
D | brw_vec4_reg_allocate.cpp | 36 reg->nr = reg_hw_locations[reg->nr] + reg->offset / REG_SIZE; in assign() 37 reg->offset %= REG_SIZE; in assign() 409 inst->src[i].offset >= REG_SIZE) in evaluate_spill_costs() 437 if (inst->dst.reladdr || inst->dst.offset >= REG_SIZE) in evaluate_spill_costs()
|
D | brw_fs_scoreboard.cpp | 584 const unsigned reg = (r.file == VGRF ? r.nr + r.offset / REG_SIZE : in dep() 585 reg_offset(r) / REG_SIZE); in dep() 811 sb.set(byte_offset(inst->src[i], REG_SIZE * j), rd_dep); in update_inst_scoreboard() 830 sb.set(byte_offset(inst->dst, REG_SIZE * j), wr_dep); in update_inst_scoreboard() 919 sb.get(byte_offset(inst->src[i], REG_SIZE * j)))); in gather_inst_dependencies() 936 sb.get(byte_offset(inst->dst, REG_SIZE * j)))); in gather_inst_dependencies()
|
D | brw_reg.h | 208 #define REG_SIZE (8*4) macro 587 unsigned newoffset = reg.nr * REG_SIZE + reg.subnr + bytes; in byte_offset() 588 reg.nr = newoffset / REG_SIZE; in byte_offset() 589 reg.subnr = newoffset % REG_SIZE; in byte_offset() 767 return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr); in brw_address()
|
D | brw_fs_live_variables.h | 97 return var_from_vgrf[reg.nr] + reg.offset / REG_SIZE; in var_from_reg()
|
D | brw_fs_bank_conflicts.cpp | 499 return r.nr + r.offset / REG_SIZE; in reg_of() 501 return reg_offset(r) / REG_SIZE; in reg_of() 661 REG_SIZE); in shader_conflict_weight_matrix() 901 r.offset = r.offset % REG_SIZE; in transform()
|
D | brw_vec4_visitor.cpp | 1388 assert(orig_src.offset % REG_SIZE == 0); in emit_scratch_read() 1389 int reg_offset = base_offset + orig_src.offset / REG_SIZE; in emit_scratch_read() 1401 SCRATCH_READ(byte_offset(shuffled_float, REG_SIZE), index); in emit_scratch_read() 1417 assert(inst->dst.offset % REG_SIZE == 0); in emit_scratch_write() 1418 int reg_offset = base_offset + inst->dst.offset / REG_SIZE; in emit_scratch_write() 1478 SCRATCH_WRITE(dst, byte_offset(shuffled_float, REG_SIZE), index); in emit_scratch_write() 1489 inst->dst.offset %= REG_SIZE; in emit_scratch_write() 1520 src.offset %= REG_SIZE; in emit_resolve_reladdr() 1645 emit_pull_constant_load_reg(byte_offset(temp, i * REG_SIZE), in emit_pull_constant_load()
|
D | brw_vec4_gs_visitor.cpp | 61 unsigned width = REG_SIZE / 2 / MAX2(4, type_sz(type)); in attribute_to_hw_reg() 105 assert(inst->src[i].offset % REG_SIZE == 0); in setup_varying_inputs() 107 inst->src[i].nr + inst->src[i].offset / REG_SIZE; in setup_varying_inputs()
|
/external/igt-gpu-tools/assembler/ |
D | brw_reg.h | 104 #define REG_SIZE (8*4) macro 333 unsigned newoffset = reg.nr * REG_SIZE + reg.subnr + bytes; in byte_offset() 334 reg.nr = newoffset / REG_SIZE; in byte_offset() 335 reg.subnr = newoffset % REG_SIZE; in byte_offset() 467 return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr); in brw_address()
|
/external/lzma/Asm/x86/ |
D | 7zAsm.asm | 39 REG_SIZE equ 8 define 42 REG_SIZE equ 4 define
|
D | 7zCrcOpt.asm | 15 data_size equ (REG_SIZE * 5) 16 crc_table equ (REG_SIZE + data_size)
|