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Searched refs:RRegsNoR0 (Results 1 – 7 of 7) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp145 return decodeRegisterClass(Inst, RegNo, RRegsNoR0); in DecodeGPRC_NOR0RegisterClass()
213 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
220 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
225 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
241 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
243 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
246 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
261 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIX16Operands()
276 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE8Operands()
291 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE4Operands()
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp152 return decodeRegisterClass(Inst, RegNo, RRegsNoR0); in DecodeGPRC_NOR0RegisterClass()
243 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
250 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
255 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
271 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
273 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
276 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
291 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIX16Operands()
320 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRI34Operands()
335 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE8Operands()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCTargetDesc.h166 static const MCPhysReg RRegsNoR0[32] = \
/external/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCTargetDesc.h168 static const MCPhysReg RRegsNoR0[32] = \
/external/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp44 static const MCPhysReg RRegsNoR0[32] = { variable
562 Inst.addOperand(MCOperand::createReg(RRegsNoR0[getReg()])); in addRegGPRCNoR0Operands()
/external/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp444 Inst.addOperand(MCOperand::createReg(RRegsNoR0[getReg()])); in addRegGPRCNoR0Operands()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp420 Inst.addOperand(MCOperand::createReg(RRegsNoR0[getReg()])); in addRegGPRCNoR0Operands()