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Searched refs:SCTLR_M_BIT (Results 1 – 21 of 21) sorted by relevance

/external/arm-trusted-firmware/lib/aarch64/
Dmisc_helpers.S171 tst tmp1, #SCTLR_M_BIT
419 mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT)
431 mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT)
441 mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT)
453 mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT)
/external/arm-trusted-firmware/lib/xlat_tables_v2/aarch64/
Dxlat_tables_arch.c125 return (read_sctlr_el1() & SCTLR_M_BIT) != 0U; in is_mmu_enabled_ctx()
128 return (read_sctlr_el2() & SCTLR_M_BIT) != 0U; in is_mmu_enabled_ctx()
132 return (read_sctlr_el3() & SCTLR_M_BIT) != 0U; in is_mmu_enabled_ctx()
Denable_mmu.S41 tst x1, #SCTLR_M_BIT
73 mov_imm x5, SCTLR_WXN_BIT | SCTLR_C_BIT | SCTLR_M_BIT
/external/arm-trusted-firmware/lib/xlat_tables/aarch32/
Dxlat_tables.c78 assert((read_sctlr() & SCTLR_M_BIT) == 0U); in enable_mmu_svc_mon()
125 sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT; in enable_mmu_svc_mon()
Dnonlpae_tables.c516 assert((read_sctlr() & SCTLR_M_BIT) == 0U); in enable_mmu_svc_mon()
551 sctlr |= SCTLR_M_BIT; in enable_mmu_svc_mon()
/external/arm-trusted-firmware/lib/xlat_tables_v2/aarch32/
Denable_mmu.S19 tst r1, #SCTLR_M_BIT
57 ldr r2, =(SCTLR_WXN_BIT | SCTLR_C_BIT | SCTLR_M_BIT)
Dxlat_tables_arch.c62 return (read_sctlr() & SCTLR_M_BIT) != 0U; in is_mmu_enabled_ctx()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/drivers/mce/
Dmce.c195 if ((sctlr & (uint64_t)SCTLR_M_BIT) == (uint64_t)SCTLR_M_BIT) { in mce_enable_strict_checking()
/external/arm-trusted-firmware/lib/cpus/aarch64/
Dwa_cve_2017_5715_mmu.S23 bic x1, x1, #SCTLR_M_BIT
27 orr x1, x1, #SCTLR_M_BIT
/external/arm-trusted-firmware/lib/aarch32/
Dmisc_helpers.S171 mov r1, #(SCTLR_M_BIT | SCTLR_C_BIT)
187 ldr r1, =(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT)
/external/arm-trusted-firmware/lib/xlat_tables/aarch64/
Dxlat_tables.c156 assert((read_sctlr_el##_el() & SCTLR_M_BIT) == 0U); \
199 sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT; \
/external/arm-trusted-firmware/plat/nvidia/tegra/lib/debug/
Dprofiler.c100 ((read_sctlr_el3() & SCTLR_M_BIT) != U(0))) { in boot_profiler_add_record()
/external/arm-trusted-firmware/plat/brcm/common/
Dbrcm_bl2_setup.c100 if (!(read_sctlr_el1() & SCTLR_M_BIT)) { in bcm_bl2_plat_arch_setup()
/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dplat_pmu_macros.S83 bic x10, x9, #(SCTLR_M_BIT)
/external/arm-trusted-firmware/bl1/
Dbl1_main.c102 assert((val & SCTLR_M_BIT) != 0); in bl1_main()
/external/arm-trusted-firmware/services/std_svc/spm_mm/
Dspm_mm_setup.c150 SCTLR_M_BIT in spm_sp_setup()
/external/arm-trusted-firmware/docs/security_advisories/
Dsecurity-advisory-tfv-3.rst74 sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT; \
/external/arm-trusted-firmware/include/arch/aarch64/
Darch_helpers.h607 assert((read_sctlr_el1() & SCTLR_M_BIT) != 0ULL); \
Darch.h322 #define SCTLR_M_BIT (ULL(1) << 0) macro
/external/arm-trusted-firmware/include/arch/aarch32/
Darch.h146 #define SCTLR_M_BIT (U(1) << 0) macro
/external/arm-trusted-firmware/lib/el3_runtime/aarch64/
Dcontext.S927 orr x29, x29, #SCTLR_M_BIT