Home
last modified time | relevance | path

Searched refs:SDTCisVT (Results 1 – 25 of 116) sorted by relevance

12345

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZOperators.td12 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>,
13 SDTCisVT<1, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
15 SDTCisVT<1, i64>]>;
18 [SDTCisVT<0, i32>,
21 [SDTCisVT<0, i32>,
23 SDTCisVT<3, i32>]>;
25 [SDTCisVT<0, i32>,
26 SDTCisVT<1, i32>,
27 SDTCisVT<2, OtherVT>,
[all …]
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZOperators.td12 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>,
13 SDTCisVT<1, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
15 SDTCisVT<1, i64>]>;
18 [SDTCisVT<0, i32>,
21 [SDTCisVT<0, i32>,
23 SDTCisVT<3, i32>]>;
25 [SDTCisVT<0, i32>,
26 SDTCisVT<1, i32>,
27 SDTCisVT<2, OtherVT>,
[all …]
/external/llvm/lib/Target/X86/
DX86InstrFragmentsSIMD.td20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
39 SDTCisFP<1>, SDTCisVT<3, i8>,
41 def SDTX86CmpTestSae : SDTypeProfile<1, 3, [SDTCisVT<0, i32>,
75 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
76 SDTCisVT<1, v4i32>]>>;
78 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
79 SDTCisVT<1, v4i32>]>>;
100 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>,
103 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>,
[all …]
DX86InstrInfo.td24 def SDTX86CmpTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisSameAs<1, 2>]>;
26 def SDTX86Cmps : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
27 //def SDTX86Cmpss : SDTypeProfile<1, 3, [SDTCisVT<0, f32>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
31 SDTCisVT<3, i8>, SDTCisVT<4, i32>]>;
36 SDTCisInt<0>, SDTCisVT<1, i32>]>;
41 SDTCisInt<0>, SDTCisVT<1, i32>]>;
48 SDTCisVT<1, i32>,
49 SDTCisVT<4, i32>]>;
55 SDTCisInt<0>, SDTCisVT<1, i32>]>;
57 [SDTCisVT<0, OtherVT>,
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZOperators.td13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
15 SDTCisVT<1, i64>]>;
20 SDTCisVT<2, i32>]>;
22 [SDTCisVT<0, i32>,
23 SDTCisVT<1, i32>,
24 SDTCisVT<2, OtherVT>]>;
28 SDTCisVT<3, i32>,
29 SDTCisVT<4, i32>]>;
37 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrFragmentsSIMD.td19 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
22 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
36 SDTCisVT<3, i8>]>;
66 SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
81 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>>;
89 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>,
90 SDTCisVT<2, i8>]>>;
92 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>,
93 SDTCisVT<2, i8>]>>;
95 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
[all …]
DX86InstrInfo.td19 def SDTX86CmpTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisInt<1>,
21 def SDTX86FCmp : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisFP<1>,
26 SDTCisVT<3, i8>, SDTCisVT<4, i32>]>;
31 SDTCisInt<0>, SDTCisVT<1, i32>]>;
36 SDTCisInt<0>, SDTCisVT<1, i32>]>;
43 SDTCisVT<1, i32>,
44 SDTCisVT<4, i32>]>;
50 SDTCisInt<0>, SDTCisVT<1, i32>]>;
52 [SDTCisVT<0, OtherVT>,
53 SDTCisVT<1, i8>, SDTCisVT<2, i32>]>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrFragmentsSIMD.td19 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
22 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
36 SDTCisVT<3, i8>]>;
77 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>>;
85 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>,
88 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>,
91 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
92 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
94 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
95 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
[all …]
DX86InstrInfo.td19 def SDTX86CmpTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisSameAs<1, 2>]>;
21 def SDTX86Cmps : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
22 //def SDTX86Cmpss : SDTypeProfile<1, 3, [SDTCisVT<0, f32>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
26 SDTCisVT<3, i8>, SDTCisVT<4, i32>]>;
31 SDTCisInt<0>, SDTCisVT<1, i32>]>;
36 SDTCisInt<0>, SDTCisVT<1, i32>]>;
43 SDTCisVT<1, i32>,
44 SDTCisVT<4, i32>]>;
50 SDTCisInt<0>, SDTCisVT<1, i32>]>;
52 [SDTCisVT<0, OtherVT>,
[all …]
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.td49 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>]
53 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>]
57 [SDTCisVT<0, i1>, SDTCisVT<1, OtherVT>]
61 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, i1>]
73 SDCallSeqStart<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>,
78 SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>,
94 SDTypeProfile<0, -1, [SDTCisVT<0, i16>]>,
99 "AMDGPUISD::CONST_DATA_PTR", SDTypeProfile <1, 1, [SDTCisVT<0, iPTR>,
100 SDTCisVT<0, iPTR>]>
196 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
[all …]
DSIInstrInfo.td40 SDTypeProfile<1, 3, [SDTCisVT<1, v4i32>, SDTCisVT<2, i32>, SDTCisVT<3, i32>]>,
45 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisVT<2, i16>]>,
78 SDTCisVT<1, v4i32>, // rsrc
79 SDTCisVT<2, i32>, // vindex(VGPR)
80 SDTCisVT<3, i32>, // voffset(VGPR)
81 SDTCisVT<4, i32>, // soffset(SGPR)
82 SDTCisVT<5, i32>, // offset(imm)
83 SDTCisVT<6, i32>, // format(imm)
84 SDTCisVT<7, i32>, // cachepolicy, swizzled buffer(imm)
85 SDTCisVT<8, i1> // idxen(imm)
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.td53 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>]
57 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>]
61 [SDTCisVT<0, i1>, SDTCisVT<1, OtherVT>]
65 [SDTCisVT<0, i1>, SDTCisVT<1, i1>, SDTCisVT<2, i1>]
77 SDCallSeqStart<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>,
82 SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>,
98 SDTypeProfile<0, -1, [SDTCisVT<0, i16>]>,
103 "AMDGPUISD::CONST_DATA_PTR", SDTypeProfile <1, 1, [SDTCisVT<0, iPTR>,
104 SDTCisVT<0, iPTR>]>
202 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
[all …]
DSIInstrInfo.td42 SDTypeProfile<1, 4, [SDTCisVT<1, v4i32>, SDTCisVT<2, i32>, SDTCisVT<3, i1>,
43 SDTCisVT<4, i1>]>,
48 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisVT<2, i16>]>,
81 SDTCisVT<1, v4i32>, // rsrc
82 SDTCisVT<2, i32>, // vindex(VGPR)
83 SDTCisVT<3, i32>, // voffset(VGPR)
84 SDTCisVT<4, i32>, // soffset(SGPR)
85 SDTCisVT<5, i32>, // offset(imm)
86 SDTCisVT<6, i32>, // format(imm)
87 SDTCisVT<7, i32>, // cachepolicy, swizzled buffer(imm)
[all …]
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInfo.td28 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>]>;
30 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
34 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/
DVEInstrInfo.td65 def SDT_SPCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i64>,
66 SDTCisVT<1, i64> ]>;
67 def SDT_SPCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i64>,
68 SDTCisVT<1, i64> ]>;
75 // def SDT_SPCall : SDTypeProfile<0, -1, [SDTCisVT<0, i64>]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInfo.td69 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>,
70 SDTCisVT<1, iPTR>]>;
72 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
76 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoVector.td140 [SDTCisSameAs<0, 1>, SDTCisVT<0, v2i32>, SDTCisInt<2>]>;
142 [SDTCisSameAs<0, 1>, SDTCisVT<0, v4i16>, SDTCisInt<2>]>;
189 [SDTCisSameAs<1, 2>, SDTCisVT<0, i1>, SDTCisVT<1, v8i8>]>;
191 [SDTCisSameAs<1, 2>, SDTCisVT<0, i1>, SDTCisVT<1, v4i16>]>;
193 [SDTCisSameAs<1, 2>, SDTCisVT<0, i1>, SDTCisVT<1, v2i32>]>;
418 [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisVT<0, i64>]>;
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInfo.td73 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>,
74 SDTCisVT<1, iPTR>]>;
76 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
80 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
/external/llvm-project/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td24 def SDT_LanaiCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>,
25 SDTCisVT<1, i32>]>;
26 def SDT_LanaiCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>,
27 SDTCisVT<1, i32>]>;
28 def SDT_LanaiCall : SDTypeProfile<0, -1, [SDTCisVT<0, i32>]>;
32 def SDT_LanaiSetCC : SDTypeProfile<1, 1, [SDTCisVT<0, i32>,
33 SDTCisVT<1, i32>]>;
34 def SDT_LanaiBrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>,
35 SDTCisVT<1, i32>]>;
36 def SDT_LanaiAdjDynAlloc : SDTypeProfile<1, 1, [SDTCisVT<0, i32>,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td24 def SDT_LanaiCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>,
25 SDTCisVT<1, i32>]>;
26 def SDT_LanaiCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>,
27 SDTCisVT<1, i32>]>;
28 def SDT_LanaiCall : SDTypeProfile<0, -1, [SDTCisVT<0, i32>]>;
32 def SDT_LanaiSetCC : SDTypeProfile<1, 1, [SDTCisVT<0, i32>,
33 SDTCisVT<1, i32>]>;
34 def SDT_LanaiBrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>,
35 SDTCisVT<1, i32>]>;
36 def SDT_LanaiAdjDynAlloc : SDTypeProfile<1, 1, [SDTCisVT<0, i32>,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.td18 def SDT_BPFCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>,
19 SDTCisVT<1, iPTR>]>;
20 def SDT_BPFCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
21 def SDT_BPFCall : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
27 SDTCisVT<3, OtherVT>]>;
30 def SDT_BPFMEMCPY : SDTypeProfile<0, 4, [SDTCisVT<0, i64>,
31 SDTCisVT<1, i64>,
32 SDTCisVT<2, i64>,
33 SDTCisVT<3, i64>]>;
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.td48 "AMDGPUISD::CONST_DATA_PTR", SDTypeProfile <1, 1, [SDTCisVT<0, iPTR>,
49 SDTCisVT<0, iPTR>]>
253 SDTCisVT<0, OtherVT>
/external/llvm/lib/Target/Mips/
DMipsInstrFPU.td28 SDTCisVT<1, i32>,
29 SDTCisVT<2, OtherVT>]>;
31 SDTCisVT<2, i32>]>;
32 def SDT_MipsCMovFP : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisVT<2, i32>,
35 def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
36 SDTCisVT<1, i32>,
38 def SDT_MipsExtractElementF64 : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
39 SDTCisVT<1, f64>,
40 SDTCisVT<2, i32>]>;
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td26 // SDTCisVT - The specified operand has exactly this VT.
27 class SDTCisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
109 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
160 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
165 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
178 SDTCisVT<5, OtherVT>
182 SDTCisVT<0, OtherVT>
186 SDTCisVT<0, OtherVT>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
190 SDTCisInt<0>, SDTCisVT<1, OtherVT>
198 SDTCisVT<0, OtherVT>, SDTCisVT<1, OtherVT>
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoD.td18 def SDT_RISCVBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
19 SDTCisVT<1, i32>,
21 def SDT_RISCVSplitF64 : SDTypeProfile<2, 1, [SDTCisVT<0, i32>,
22 SDTCisVT<1, i32>,
23 SDTCisVT<2, f64>]>;

12345