/external/llvm-project/llvm/lib/Target/X86/ |
D | X86FlagsCopyLowering.cpp | 164 SETB, enumerator 238 return FlagArithMnemonic::SETB; in getMnemonicFromOpcode() 809 case FlagArithMnemonic::SETB: in rewriteArithmetic()
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/external/llvm/lib/Target/X86/ |
D | X86InstrCMovSetCC.td | 98 defm SETB : SETCC<0x92, "setb", X86_COND_B>; // unsigned less than
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D | X86InstrCompiler.td | 354 // (add OP, SETB) -> (adc OP, 0) 362 // (sub OP, SETB) -> (sbb OP, 0)
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/external/llvm-project/llvm/test/CodeGen/X86/ |
D | flags-copy-lowering.mir | 548 …; CHECK-NEXT: %[[SETB:[^:]*]]:gr32 = SETB_C32r implicit-def{{( dead)?}} $eflags, implicit{{( ki… 549 ; CHECK-NEXT: MOV32mr $rsp, 1, $noreg, -16, $noreg, killed %[[SETB]] 556 …; CHECK-NEXT: %[[SETB:[^:]*]]:gr64 = SETB_C64r implicit-def{{( dead)?}} $eflags, implicit{{( ki… 557 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %[[SETB]]
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D | copy-eflags.ll | 291 ; used to lower SETB into an SBB pattern in order to make sure that kind of
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 799 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::SETB8 : PPC::SETB), Reg) in lowerCRBitSpilling()
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D | P9InstrResources.td | 113 (instregex "SETB(8)?$"),
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D | PPCInstr64Bit.td | 799 def SETB : XForm_44<31, 128, (outs gprc:$RT), (ins crrc:$BFA),
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D | PPCInstrInfo.cpp | 3893 Opcode == PPC::EXTSW_rec || Opcode == PPC::SETB || Opcode == PPC::SETB8 || in isSignExtendingOp()
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D | PPCISelDAGToDAG.cpp | 4891 N, N->getSimpleValueType(0) == MVT::i64 ? PPC::SETB8 : PPC::SETB, in Select()
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 873 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::SETB8 : PPC::SETB), Reg) in lowerCRBitSpilling()
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D | P9InstrResources.td | 113 (instregex "SETB(8)?$"),
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D | PPCInstr64Bit.td | 838 def SETB : XForm_44<31, 128, (outs gprc:$RT), (ins crrc:$BFA),
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D | PPCInstrInfo.cpp | 4676 Opcode == PPC::EXTSW_rec || Opcode == PPC::SETB || Opcode == PPC::SETB8 || in isSignExtendingOp()
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D | PPCISelDAGToDAG.cpp | 5051 N, N->getSimpleValueType(0) == MVT::i64 ? PPC::SETB8 : PPC::SETB, in Select()
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 615 #define SETB(a) CHOICE(setb a, setb a, setb a) macro 1328 #define SETB(a) setb a macro
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenMCCodeEmitter.inc | 1522 UINT64_C(2080375040), // SETB 4620 case PPC::SETB: 7932 CEFBS_None, // SETB = 1509
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D | PPCGenAsmWriter.inc | 3177 536890396U, // SETB 5468 0U, // SETB
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D | PPCGenDisassemblerTables.inc | 1080 /* 4820 */ MCD::OPC_Decode, 229, 11, 49, // Opcode: SETB
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D | PPCGenInstrInfo.inc | 1524 SETB = 1509, 4493 …09, 2, 1, 4, 110, 0, 0x8ULL, nullptr, nullptr, OperandInfo239, -1 ,nullptr }, // Inst #1509 = SETB
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D | PPCGenAsmMatcher.inc | 6279 …{ 9268 /* setb */, PPC::SETB, Convert__RegGPRC1_0__RegCRRC1_1, AMFBS_None, { MCK_RegGPRC, MCK_RegC…
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