| /external/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 564 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i1, 2 }, in getCastInstrCost()
566 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 1 }, in getCastInstrCost()
568 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, 1 }, in getCastInstrCost()
571 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 1 }, in getCastInstrCost()
572 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i32, 1 }, in getCastInstrCost()
617 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i1, 3 }, in getCastInstrCost()
619 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i1, 3 }, in getCastInstrCost()
621 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i8, 3 }, in getCastInstrCost()
623 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
625 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 1 }, in getCastInstrCost()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 182 {ISD::SIGN_EXTEND, MVT::i32, MVT::i16, 0}, in getCastInstrCost()
184 {ISD::SIGN_EXTEND, MVT::i32, MVT::i8, 0}, in getCastInstrCost()
186 {ISD::SIGN_EXTEND, MVT::i16, MVT::i8, 0}, in getCastInstrCost()
188 {ISD::SIGN_EXTEND, MVT::i64, MVT::i32, 1}, in getCastInstrCost()
190 {ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 1}, in getCastInstrCost()
192 {ISD::SIGN_EXTEND, MVT::i64, MVT::i8, 1}, in getCastInstrCost()
200 {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0}, in getCastInstrCost()
202 {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 0}, in getCastInstrCost()
204 {ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 0}, in getCastInstrCost()
219 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
[all …]
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 1416 { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, in getCastInstrCost()
1420 { ISD::SIGN_EXTEND, MVT::v2i8, MVT::v2i1, 1 }, in getCastInstrCost()
1421 { ISD::SIGN_EXTEND, MVT::v2i16, MVT::v2i1, 1 }, in getCastInstrCost()
1422 { ISD::SIGN_EXTEND, MVT::v4i8, MVT::v4i1, 1 }, in getCastInstrCost()
1423 { ISD::SIGN_EXTEND, MVT::v4i16, MVT::v4i1, 1 }, in getCastInstrCost()
1424 { ISD::SIGN_EXTEND, MVT::v8i8, MVT::v8i1, 1 }, in getCastInstrCost()
1425 { ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i1, 1 }, in getCastInstrCost()
1426 { ISD::SIGN_EXTEND, MVT::v16i8, MVT::v16i1, 1 }, in getCastInstrCost()
1427 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, 1 }, in getCastInstrCost()
1428 { ISD::SIGN_EXTEND, MVT::v32i8, MVT::v32i1, 1 }, in getCastInstrCost()
[all …]
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 435 {ISD::SIGN_EXTEND, MVT::i32, MVT::i16, 0}, in getCastInstrCost()
437 {ISD::SIGN_EXTEND, MVT::i32, MVT::i8, 0}, in getCastInstrCost()
439 {ISD::SIGN_EXTEND, MVT::i16, MVT::i8, 0}, in getCastInstrCost()
441 {ISD::SIGN_EXTEND, MVT::i64, MVT::i32, 1}, in getCastInstrCost()
443 {ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 1}, in getCastInstrCost()
445 {ISD::SIGN_EXTEND, MVT::i64, MVT::i8, 1}, in getCastInstrCost()
453 {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0}, in getCastInstrCost()
455 {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 0}, in getCastInstrCost()
457 {ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 0}, in getCastInstrCost()
462 {ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 1}, in getCastInstrCost()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 1282 { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, in getCastInstrCost()
1286 { ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i1, 1 }, in getCastInstrCost()
1287 { ISD::SIGN_EXTEND, MVT::v16i8, MVT::v16i1, 1 }, in getCastInstrCost()
1288 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, 1 }, in getCastInstrCost()
1289 { ISD::SIGN_EXTEND, MVT::v32i8, MVT::v32i1, 1 }, in getCastInstrCost()
1290 { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i1, 1 }, in getCastInstrCost()
1291 { ISD::SIGN_EXTEND, MVT::v64i8, MVT::v64i1, 1 }, in getCastInstrCost()
1346 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i1, 2 }, in getCastInstrCost()
1348 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 1 }, in getCastInstrCost()
1350 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, 1 }, in getCastInstrCost()
[all …]
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 197 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
199 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i32, 2 }, in getCastInstrCost()
201 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
203 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 2 }, in getCastInstrCost()
205 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
207 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
209 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, in getCastInstrCost()
211 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 105 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
107 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1 }, in getCastInstrCost()
113 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
115 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
117 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
119 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
121 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
250 { ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 2 }, in getCastInstrCost()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 308 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
310 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i32, 2 }, in getCastInstrCost()
312 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
314 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 2 }, in getCastInstrCost()
316 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
318 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
320 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, in getCastInstrCost()
322 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 357 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
359 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i32, 2 }, in getCastInstrCost()
361 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
363 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 2 }, in getCastInstrCost()
365 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
367 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
369 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, in getCastInstrCost()
371 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
|
| /external/llvm-project/llvm/test/CodeGen/RISCV/ |
| D | pr40333.ll | 7 ; loop would be created in DAGCombine, converting ANY_EXTEND to SIGN_EXTEND
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGAddressAnalysis.cpp | 248 if (Index->getOpcode() == ISD::SIGN_EXTEND) { in matchLSNode()
260 if (Index->getOpcode() == ISD::SIGN_EXTEND) { in matchLSNode()
|
| D | DAGCombiner.cpp | 1135 Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteOperand()
1559 case ISD::SIGN_EXTEND: return visitSIGN_EXTEND(N); in visit()
1666 case ISD::SIGN_EXTEND: in combine()
2143 if (N0.getOpcode() == ISD::SIGN_EXTEND && N0.hasOneUse() && in visitADDLike()
2472 if (N0.getOpcode() == ISD::SIGN_EXTEND && in visitADDLikeCommutative()
3204 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N1.getOperand(0)); in visitSUB()
4096 N0 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N0); in visitMULHS()
4097 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1); in visitMULHS()
4228 SDValue Lo = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(0)); in visitSMUL_LOHI()
4229 SDValue Hi = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(1)); in visitSMUL_LOHI()
[all …]
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGAddressAnalysis.cpp | 259 if (Index->getOpcode() == ISD::SIGN_EXTEND) { in matchLSNode()
271 if (Index->getOpcode() == ISD::SIGN_EXTEND) { in matchLSNode()
|
| D | DAGCombiner.cpp | 1244 Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteOperand()
1679 case ISD::SIGN_EXTEND: return visitSIGN_EXTEND(N); in visit()
1791 case ISD::SIGN_EXTEND: in combine()
2329 if (N0.getOpcode() == ISD::SIGN_EXTEND && N0.hasOneUse() && in visitADDLike()
2675 if (N0.getOpcode() == ISD::SIGN_EXTEND && in visitADDLikeCommutative()
3415 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N1.getOperand(0)); in visitSUB()
4370 N0 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N0); in visitMULHS()
4371 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1); in visitMULHS()
4503 SDValue Lo = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(0)); in visitSMUL_LOHI()
4504 SDValue Hi = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(1)); in visitSMUL_LOHI()
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-AnInfiniteLoopInDAGCombine.ll | 10 ; As we think the (2) optimization from SIGN_EXTEND to ANY_EXTEND is
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-AnInfiniteLoopInDAGCombine.ll | 10 ; As we think the (2) optimization from SIGN_EXTEND to ANY_EXTEND is
|
| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.h | 160 return ISD::SIGN_EXTEND; in getExtendForAtomicOps()
164 return ISD::SIGN_EXTEND; in getExtendForAtomicCmpSwapArg()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 392 SIGN_EXTEND, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 526 SIGN_EXTEND, enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 675 SIGN_EXTEND, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.h | 127 return ISD::SIGN_EXTEND; in getExtendForAtomicOps()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 126 setOperationAction(ISD::SIGN_EXTEND, T, Custom); in initializeHVXLowering()
159 setOperationAction(ISD::SIGN_EXTEND, T, Custom); in initializeHVXLowering()
259 setOperationAction(ISD::SIGN_EXTEND, VecTy, Custom); in initializeHVXLowering()
891 ValV = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, ValV); in insertHvxElementPred()
1961 unsigned Opcode = Op.getOpcode() == ISD::SIGN_EXTEND ? HexagonISD::VUNPACK in WidenHvxExtend()
2052 case ISD::SIGN_EXTEND: in LowerHvxOperation()
2071 case ISD::SIGN_EXTEND: return LowerHvxSignExt(Op, DAG); in LowerHvxOperation()
2103 case ISD::SIGN_EXTEND: in LowerHvxOperationWrapper()
2145 case ISD::SIGN_EXTEND: in ReplaceHvxNodeResults()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 983 Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteOperand()
1395 case ISD::SIGN_EXTEND: return visitSIGN_EXTEND(N); in visit()
1484 case ISD::SIGN_EXTEND: in combine()
1758 if (N0.getOpcode() == ISD::SIGN_EXTEND && in visitADD()
1760 !TLI.isOperationLegal(ISD::SIGN_EXTEND, MVT::i1)) { in visitADD()
2495 N0 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N0); in visitMULHS()
2496 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1); in visitMULHS()
2609 SDValue Lo = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(0)); in visitSMUL_LOHI()
2610 SDValue Hi = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(1)); in visitSMUL_LOHI()
2722 N0.getOpcode() == ISD::SIGN_EXTEND || in SimplifyBinOpWithSameOpcodeHands()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 102 setOperationAction(ISD::SIGN_EXTEND, T, Custom); in initializeHVXLowering()
135 setOperationAction(ISD::SIGN_EXTEND, T, Custom); in initializeHVXLowering()
761 ValV = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, ValV); in insertHvxElementPred()
1553 case ISD::SIGN_EXTEND: in LowerHvxOperation()
1571 case ISD::SIGN_EXTEND: return LowerHvxSignExt(Op, DAG); in LowerHvxOperation()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 114 setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Custom); in MSP430TargetLowering()
191 case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG); in LowerOperation()
591 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
|