1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 3; RUN: | FileCheck -check-prefix=RV64I %s 4 5; This test case is significantly simplified from the submitted .ll but 6; demonstrates the same issue. At the time of this problem report, an infinite 7; loop would be created in DAGCombine, converting ANY_EXTEND to SIGN_EXTEND 8; and back again. 9 10define signext i8 @foo(i32 %a, i32 %b) nounwind { 11; RV64I-LABEL: foo: 12; RV64I: # %bb.0: 13; RV64I-NEXT: srlw a0, a0, a1 14; RV64I-NEXT: slli a0, a0, 56 15; RV64I-NEXT: srai a0, a0, 56 16; RV64I-NEXT: ret 17 %1 = lshr i32 %a, %b 18 %2 = trunc i32 %1 to i8 19 ret i8 %2 20} 21