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Searched refs:SMEM (Results 1 – 25 of 54) sorted by relevance

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/external/mesa3d/src/amd/compiler/
DREADME-ISA.md47 ## SMEM stores
50 the offset for SMEM stores must be in m0 if IMM == 0.
52 The RDNA ISA doesn't mention SMEM stores at all, but they seem to be supported
56 ## SMEM atomics
58 RDNA ISA: same as the SMEM stores, the ISA pretends they don't exist, but they
135 ## SMEM corrupts VCCZ on SI/CI
139 After issuing a SMEM instructions, we need to wait for the SMEM instructions to
155 ### SMEM store followed by a load with the same address
161 SMEM stores, so it's not surprising that they didn't notice it.
167 Then, a SALU/SMEM instruction writes the same SGPR.
[all …]
Daco_opcodes.py40 SMEM = 6 variable in Format
68 elif self == Format.SMEM:
288 opcode("p_fs_buffer_store_smem", format=Format.SMEM)
545 SMEM = { variable
634 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SMEM:
635 opcode(name, gfx7, gfx9, gfx10, Format.SMEM, is_atomic = "atomic" in name)
Daco_insert_NOPs.cpp319 if (instr->format == Format::SMEM) { in handle_instruction_gfx6()
405 if (!instr->isSALU() && instr->format != Format::SMEM) in handle_instruction_gfx6()
432 if ((ctx.smem_clause || ctx.smem_write) && (NOPs || instr->format != Format::SMEM)) { in handle_instruction_gfx6()
442 if (instr->format == Format::SMEM) { in handle_instruction_gfx6()
604 } else if (instr->isSALU() || instr->format == Format::SMEM) { in handle_instruction_gfx10()
680 if (instr->format == Format::SMEM) { in handle_instruction_gfx10()
Daco_statistics.cpp62 if (instr->format == Format::SMEM && !instr->operands.empty()) { in collect_preasm_stats()
Daco_form_hard_clauses.cpp85 } else if (instr->format == Format::SMEM && !instr->operands.empty()) { in form_hard_clauses()
Daco_scheduler.cpp342 …if (instr->format == Format::SMEM && !instr->operands.empty() && instr->operands[0].bytes() == 16)… in get_sync_info_with_hack()
424 if (instr->format == Format::SMEM) in add_to_hazard_query()
504 unsigned aliasing_storage = instr->format == Format::SMEM ? in perform_hazard_query()
815 if (candidate->isVMEM() || candidate->format == Format::SMEM || candidate->isFlatOrGlobal()) in schedule_position_export()
859 if (current->format == Format::SMEM) { in schedule_block()
Daco_opt_value_numbering.cpp93 case Format::SMEM: in operator ()()
228 case Format::SMEM: { in operator ()()
Daco_ir.cpp140 case Format::SMEM: in get_sync_info()
Daco_insert_waitcnt.cpp518 if (ctx.chip_class >= GFX10 && instr->format == Format::SMEM) { in kill()
786 case Format::SMEM: { in gen()
Daco_print_ir.cpp337 case Format::SMEM: { in print_instr_format_specific()
/external/llvm/lib/Target/AMDGPU/
DGCNHazardRecognizer.cpp142 int GCNHazardRecognizer::checkSMEMSoftClauseHazards(MachineInstr *SMEM) { in checkSMEMSoftClauseHazards() argument
177 if (SMEM->mayStore()) in checkSMEMSoftClauseHazards()
180 addRegsToSet(SMEM->defs(), ClauseDefs); in checkSMEMSoftClauseHazards()
181 addRegsToSet(SMEM->uses(), ClauseUses); in checkSMEMSoftClauseHazards()
DGCNHazardRecognizer.h42 int checkSMEMSoftClauseHazards(MachineInstr *SMEM);
DSIInsertWaits.cpp48 SMEM, enumerator
326 LastOpcodeType = SMEM; in pushInstruction()
DVIInstructions.td105 // SMEM Instructions
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DGCNHazardRecognizer.h73 int checkSoftClauseHazards(MachineInstr *SMEM);
DSIInstrFormats.td69 // SMEM instructions like the cache flush ones.
/external/llvm-project/llvm/lib/Target/AMDGPU/
DGCNHazardRecognizer.h73 int checkSoftClauseHazards(MachineInstr *SMEM);
DSIInstrFormats.td70 // SMEM instructions like the cache flush ones.
DSMInstructions.td270 // XXX - SMEM instructions do not allow exec for data operand, but
284 // SI/CI, bit disallowed for SMEM on VI.
/external/mesa3d/docs/relnotes/
D20.1.1.rst158 - aco: check instruction format before waiting for a previous SMEM
160 - aco: preserve more fields when combining additions into SMEM
D20.0.8.rst196 - aco: check instruction format before waiting for a previous SMEM
198 - aco: preserve more fields when combining additions into SMEM
/external/skqp/src/compute/skc/platforms/cl_12/kernels/
Dsegment_ttrk.cl28 // THE BEST TYPE TO ZERO SMEM
282 // ZERO SMEM
Dfills_expand.cl122 // local SMEM queue and flush when full. It may or may not be a
Drender.cl159 // predicated if SMEM is really at a premium.
502 // FIXME -- if the SMEM store is wider than bank word count then we
540 // predicated if SMEM is really at a premium.
1553 // IT'S EASY TO TRANSPOSE THIS IN SMEM BEFORE STORING BUT IN THIS
1604 // IT'S EASY TO TRANSPOSE THIS IN SMEM BEFORE STORING BUT IN THIS
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dspill-m0.ll82 ; Force save and restore of m0 during SMEM spill

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