Home
last modified time | relevance | path

Searched refs:SOCFPGA_SOC2FPGA_SCR_REG_BASE (Results 1 – 3 of 3) sorted by relevance

/external/arm-trusted-firmware/plat/intel/soc/stratix10/include/
Dsocfpga_plat_def.h24 #define SOCFPGA_SOC2FPGA_SCR_REG_BASE 0xffd21200 macro
/external/arm-trusted-firmware/plat/intel/soc/agilex/include/
Dsocfpga_plat_def.h25 #define SOCFPGA_SOC2FPGA_SCR_REG_BASE 0xffd21200 macro
/external/arm-trusted-firmware/plat/intel/soc/common/soc/
Dsocfpga_system_manager.c105 mmio_write_32(SOCFPGA_SOC2FPGA_SCR_REG_BASE, DISABLE_BRIDGE_FIREWALL); in enable_ns_bridge_access()