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Searched refs:STORE (Results 1 – 25 of 235) sorted by relevance

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/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
Dhorizontal.ll3 …hor-store -S < %s -mtriple=x86_64-apple-macosx -mcpu=corei7-avx | FileCheck %s --check-prefix=STORE
52 ; STORE-LABEL: @add_red(
53 ; STORE-NEXT: entry:
54 ; STORE-NEXT: [[CMP31:%.*]] = icmp sgt i32 [[N:%.*]], 0
55 ; STORE-NEXT: br i1 [[CMP31]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
56 ; STORE: for.body.lr.ph:
57 ; STORE-NEXT: [[TMP0:%.*]] = sext i32 [[N]] to i64
58 ; STORE-NEXT: br label [[FOR_BODY:%.*]]
59 ; STORE: for.body:
60 ; STORE-NEXT: [[I_033:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
[all …]
/external/llvm-project/llvm/test/Instrumentation/HeapProfiler/
Dmasked-load-store.ll2 ; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL
4 ; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL
17 ;;;;;;;;;;;;;;;; STORE
26 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
27 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
28 ; STORE: call void @__memprof_store(i64 [[PGEP0]])
29 ; STORE: [[GEP1:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 1
30 ; STORE: [[PGEP1:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP1]] to i64
31 ; STORE: call void @__memprof_store(i64 [[PGEP1]])
32 ; STORE: [[GEP2:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 2
[all …]
/external/llvm-project/llvm/test/Instrumentation/AddressSanitizer/
Dasan-masked-load-store.ll2 ; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL
4 ; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL
6 ; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL
8 ; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL
25 ;;;;;;;;;;;;;;;; STORE
34 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
35 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
36 ; STORE: call void @__asan_store4(i64 [[PGEP0]])
37 ; STORE: [[GEP1:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 1
38 ; STORE: [[PGEP1:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP1]] to i64
[all …]
/external/e2fsprogs/lib/ext2fs/
Dicount.c719 #define STORE 0x02 macro
731 { STORE, 42, 42, 42 },
732 { STORE, 1, 1, 1 },
733 { STORE, 2, 2, 2 },
734 { STORE, 3, 3, 3 },
735 { STORE, 10, 1, 1 },
736 { STORE, 42, 0, 0 },
757 { STORE, 1, 1, 1 },
758 { STORE, 2, 2, 2 },
759 { STORE, 3, 3, 3 },
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dhsw_queryobj.c44 MI_MATH_ALU2(STORE, R1, ACCU), in mult_gpr0_by_80()
48 MI_MATH_ALU2(STORE, R1, ACCU), in mult_gpr0_by_80()
52 MI_MATH_ALU2(STORE, R1, ACCU), in mult_gpr0_by_80()
57 MI_MATH_ALU2(STORE, R1, ACCU), in mult_gpr0_by_80()
61 MI_MATH_ALU2(STORE, R2, ACCU), in mult_gpr0_by_80()
66 MI_MATH_ALU2(STORE, R2, ACCU), in mult_gpr0_by_80()
71 MI_MATH_ALU2(STORE, R0, ACCU), in mult_gpr0_by_80()
93 MI_MATH_ALU2(STORE, R0, ACCU), in keep_gpr0_lower_n_bits()
121 MI_MATH_ALU2(STORE, R0, ACCU), in shl_gpr0_by_30_bits()
173 MI_MATH_ALU2(STORE, R0, ACCU), in gpr0_to_bool()
[all …]
Dhsw_sol.c110 OUT_BATCH(MI_MATH_ALU2(STORE, R1, ACCU)); in tally_prims_written()
115 OUT_BATCH(MI_MATH_ALU2(STORE, R0, ACCU)); in tally_prims_written()
132 OUT_BATCH(MI_MATH_ALU2(STORE, R0, ACCU)); in tally_prims_written()
141 OUT_BATCH(MI_MATH_ALU2(STORE, R1, ACCU)); in tally_prims_written()
145 OUT_BATCH(MI_MATH_ALU2(STORE, R0, ACCU)); in tally_prims_written()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonDepIICHVX.td142 InstrItinData <tc_131f1c81, /*SLOT0,NOSLOT1,STORE,VP*/
165 InstrItinData <tc_191381c1, /*SLOT0,STORE,VA*/
182 InstrItinData <tc_20a4bbec, /*SLOT0,STORE*/
239 InstrItinData <tc_3ce09744, /*SLOT0,STORE*/
244 InstrItinData <tc_3e2aaafc, /*SLOT0,STORE,VA*/
250 InstrItinData <tc_447d9895, /*SLOT0,STORE,VA*/
282 InstrItinData <tc_54a0dc47, /*SLOT0,STORE,VA*/
303 InstrItinData <tc_58d21193, /*SLOT0,STORE,VA_DV*/
334 InstrItinData <tc_6942b6e0, /*SLOT0,STORE*/
349 InstrItinData <tc_7177e272, /*SLOT0,STORE*/
[all …]
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonDepIICHVX.td142 InstrItinData <tc_131f1c81, /*SLOT0,NOSLOT1,STORE,VP*/
165 InstrItinData <tc_191381c1, /*SLOT0,STORE,VA*/
182 InstrItinData <tc_20a4bbec, /*SLOT0,STORE*/
239 InstrItinData <tc_3ce09744, /*SLOT0,STORE*/
244 InstrItinData <tc_3e2aaafc, /*SLOT0,STORE,VA*/
250 InstrItinData <tc_447d9895, /*SLOT0,STORE,VA*/
282 InstrItinData <tc_54a0dc47, /*SLOT0,STORE,VA*/
303 InstrItinData <tc_58d21193, /*SLOT0,STORE,VA_DV*/
334 InstrItinData <tc_6942b6e0, /*SLOT0,STORE*/
349 InstrItinData <tc_7177e272, /*SLOT0,STORE*/
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/external/curl/tests/data/
Dtest8156 STORE
27 IMAP STORE - delete message (CUSTOMREQUEST)
30 imap://%HOSTIP:%IMAPPORT/815 -X 'STORE 123 +Flags \Deleted' -u user:secret -: imap://%HOSTIP:%IMAPP…
41 A004 STORE 123 +Flags \Deleted
Dtest8166 STORE
30 IMAP STORE - delete message with confirmation (CUSTOMREQUEST)
33 imap://%HOSTIP:%IMAPPORT/816 -X 'STORE 123 +Flags \Deleted' -u user:secret -: imap://%HOSTIP:%IMAPP…
44 A004 STORE 123 +Flags \Deleted
/external/rust/crates/async-stream/src/
Dyielder.rs32 thread_local!(static STORE: Cell<*mut ()> = Cell::new(ptr::null_mut()));
54 STORE.with(|cell| unsafe { in poll()
71 let prev = STORE.with(|cell| { in enter()
85 STORE.with(|cell| cell.set(self.prev)); in drop()
/external/elfutils/libelf/
Dgelf_xlate.c68 #define STORE(Bits, ptr, val) (*(uint##Bits##_t *) ptr = val) macro
80 #define STORE(Bits, ptr, val) (((union unaligned *) ptr)->u##Bits = val) macro
99 case 2: STORE (16, dest, bswap_16 (FETCH (16, ptr))); break; \
100 case 4: STORE (32, dest, bswap_32 (FETCH (32, ptr))); break; \
101 case 8: STORE (64, dest, bswap_64 (FETCH (64, ptr))); break; \
/external/llvm/test/MC/Mips/
Dcprestore-noreorder-noat.s12 # RUN: FileCheck %s -check-prefix=NO-STORE
15 # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=NO-STORE
29 # NO-STORE-NOT: sw $gp, 8($sp)
48 # NO-STORE-NOT: sw $gp,
/external/llvm-project/llvm/test/MC/Mips/
Dcprestore-noreorder-noat.s14 # RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=NO-STORE
17 # RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=NO-STORE
31 # NO-STORE-NOT: sw $gp, 8($sp)
50 # NO-STORE-NOT: sw $gp,
/external/angle/src/compiler/translator/
DImageFunctionHLSL.cpp54 imageFunction.method == ImageFunctionHLSL::ImageFunction::Method::STORE) in OutputImageFunctionArgumentList()
78 if (imageFunction.method == ImageFunctionHLSL::ImageFunction::Method::STORE) in OutputImageFunctionArgumentList()
198 case Method::STORE: in name()
285 else if (method == ImageFunction::Method::STORE) in getReturnType()
324 imageFunction.method = ImageFunction::Method::STORE; in useImageFunction()
/external/elfutils/libcpu/
Dbpf_disasm.c69 #define STORE(T, S) "*(" #T " *)(" REG(1) OFF(3) ") = " S macro
410 code_fmt = STORE(u8, REG(2)); in bpf_disasm()
413 code_fmt = STORE(u16, REG(2)); in bpf_disasm()
416 code_fmt = STORE(u32, REG(2)); in bpf_disasm()
419 code_fmt = STORE(u64, REG(2)); in bpf_disasm()
430 code_fmt = STORE(u8, IMMS(2)); in bpf_disasm()
433 code_fmt = STORE(u16, IMMS(2)); in bpf_disasm()
436 code_fmt = STORE(u32, IMMS(2)); in bpf_disasm()
439 code_fmt = STORE(u64, IMMS(2)); in bpf_disasm()
/external/llvm-project/flang/runtime/
Dbuffer.h30 template <typename STORE> class FileFrame {
123 STORE &Store() { return static_cast<STORE &>(*this); } in Store()
/external/webp/src/dsp/
Ddec.c29 #define STORE(x, y, v) \ macro
34 STORE(0, y, DC + (d)); \
35 STORE(1, y, DC + (c)); \
36 STORE(2, y, DC - (c)); \
37 STORE(3, y, DC - (d)); \
74 STORE(0, 0, a + d); in TransformOne_C()
75 STORE(1, 0, b + c); in TransformOne_C()
76 STORE(2, 0, b - c); in TransformOne_C()
77 STORE(3, 0, a - d); in TransformOne_C()
118 STORE(i, j, DC); in TransformDC_C()
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/external/pdfium/third_party/libopenjpeg20/
Ddwt.c606 #define STORE(x,y) _mm256_store_si256((VREG*)(x),(y)) macro
616 #define STORE(x,y) _mm_store_si128((VREG*)(x),(y)) macro
701 STORE(tmp + PARALLEL_COLS_53 * (i + 0), s0c_0); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
702 STORE(tmp + PARALLEL_COLS_53 * (i + 0) + VREG_INT_COUNT, s0c_1); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
705 STORE(tmp + PARALLEL_COLS_53 * (i + 1) + 0, in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
707 STORE(tmp + PARALLEL_COLS_53 * (i + 1) + VREG_INT_COUNT, in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
711 STORE(tmp + PARALLEL_COLS_53 * (i + 0) + 0, s0n_0); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
712 STORE(tmp + PARALLEL_COLS_53 * (i + 0) + VREG_INT_COUNT, s0n_1); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
719 STORE(tmp + PARALLEL_COLS_53 * (len - 1), tmp_len_minus_1); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
721 STORE(tmp + PARALLEL_COLS_53 * (len - 2), in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
[all …]
/external/libxaac/decoder/armv7/
Dixheaacd_harm_idx_zerotwolp.s62 B STORE
74 STORE: label
/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/
Dbuilder_gfx_mem.cpp339 BuilderGfxMem::STORE(Value* Val, Value* Ptr, bool isVolatile, Type* Ty, MEM_CLIENT usage) in STORE() function in SwrJit::BuilderGfxMem
345 return Builder::STORE(Val, Ptr, isVolatile, Ty, usage); in STORE()
348 StoreInst* BuilderGfxMem::STORE(Value* Val, in STORE() function in SwrJit::BuilderGfxMem
358 return Builder::STORE(Val, BasePtr, offset, Ty, usage); in STORE()
Dblend_jit.cpp558 STORE(pMask, ppMask); in AlphaTest()
644 STORE(C(1), pBlendContext, {0, SWR_BLEND_CONTEXT_isAlphaTested}); in Create()
650 STORE(C(0), pBlendContext, {0, SWR_BLEND_CONTEXT_isAlphaTested}); in Create()
657 STORE(C(1), pBlendContext, {0, SWR_BLEND_CONTEXT_isAlphaBlended}); in Create()
724 STORE(result[i], pResult, {0, i}); in Create()
730 STORE(C(0), pBlendContext, {0, SWR_BLEND_CONTEXT_isAlphaBlended}); in Create()
829 STORE(result[i], pResult, {0, i}); in Create()
857 STORE(outputMask, GEP(ppMask, C(0))); in Create()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIMemoryLegalizer.cpp58 STORE = 1u << 1, enumerator
59 LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ STORE)
1029 if ((Op & SIMemOp::STORE) != SIMemOp::NONE) in insertWait()
1041 if ((Op & SIMemOp::STORE) != SIMemOp::NONE) in insertWait()
1152 SIMemOp::LOAD | SIMemOp::STORE, in expandLoad()
1191 SIMemOp::LOAD | SIMemOp::STORE, in expandStore()
1228 SIMemOp::LOAD | SIMemOp::STORE, in expandAtomicFence()
1258 SIMemOp::LOAD | SIMemOp::STORE, in expandAtomicCmpxchgOrRmw()
1270 SIMemOp::STORE, in expandAtomicCmpxchgOrRmw()
/external/tensorflow/tensorflow/core/kernels/
Dsparse_matmul_op.cc281 #define STORE(x, y) Eigen::internal::pstore<float>(x, y); macro
419 STORE(*out, c1); in MulAdd()
420 STORE(*out + kNumOperands, c2); in MulAdd()
451 STORE(*out, c1); in MulAdd3Way()
452 STORE(*out + kNumOperands, c2); in MulAdd3Way()
501 STORE(*out, c1); in TwoMulAdd3Way()
502 STORE(*out + kNumOperands, c2); in TwoMulAdd3Way()
503 STORE(*out + 2 * kNumOperands, c3); in TwoMulAdd3Way()
504 STORE(*out + 3 * kNumOperands, c4); in TwoMulAdd3Way()
528 STORE(*out, c); in MulAdd()
[all …]
/external/llvm/test/CodeGen/WebAssembly/
Dstore-results.ll12 ; CHECK: i32.store $push[[STORE:[0-9]+]]=, 0($0), $pop{{[0-9]+}}{{$}}
13 ; CHECK: return $pop[[STORE]]{{$}}

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