1; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -S -enable-new-pm=0 \ 2; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL 3; RUN: opt < %s -passes='asan-function-pipeline' -asan-instrumentation-with-call-threshold=0 -S \ 4; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL 5; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -S -enable-new-pm=0 \ 6; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL 7; RUN: opt < %s -passes='asan-function-pipeline' -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -S \ 8; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL 9; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-writes=0 -S -enable-new-pm=0 \ 10; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=NOSTORE -check-prefix=ALL 11; RUN: opt < %s -passes='asan-function-pipeline' -asan-instrumentation-with-call-threshold=0 -asan-instrument-writes=0 -S \ 12; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=NOSTORE -check-prefix=ALL 13; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -asan-instrument-writes=0 -S -enable-new-pm=0 \ 14; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=NOSTORE -check-prefix=ALL 15; RUN: opt < %s -passes='asan-function-pipeline' -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -asan-instrument-writes=0 -S \ 16; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=NOSTORE -check-prefix=ALL 17; Support ASan instrumentation for constant-mask llvm.masked.{load,store} 18 19target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 20 21@v4f32 = global <4 x float>* zeroinitializer, align 8 22@v8i32 = global <8 x i32>* zeroinitializer, align 8 23@v4i64 = global <4 x i32*>* zeroinitializer, align 8 24 25;;;;;;;;;;;;;;;; STORE 26declare void @llvm.masked.store.v4f32.p0v4f32(<4 x float>, <4 x float>*, i32, <4 x i1>) argmemonly nounwind 27declare void @llvm.masked.store.v8i32.p0v8i32(<8 x i32>, <8 x i32>*, i32, <8 x i1>) argmemonly nounwind 28declare void @llvm.masked.store.v4p0i32.p0v4p0i32(<4 x i32*>, <4 x i32*>*, i32, <4 x i1>) argmemonly nounwind 29 30define void @store.v4f32.1110(<4 x float> %arg) sanitize_address { 31; ALL-LABEL: @store.v4f32.1110 32 %p = load <4 x float>*, <4 x float>** @v4f32, align 8 33; NOSTORE-NOT: call void @__asan_store 34; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0 35; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64 36; STORE: call void @__asan_store4(i64 [[PGEP0]]) 37; STORE: [[GEP1:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 1 38; STORE: [[PGEP1:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP1]] to i64 39; STORE: call void @__asan_store4(i64 [[PGEP1]]) 40; STORE: [[GEP2:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 2 41; STORE: [[PGEP2:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP2]] to i64 42; STORE: call void @__asan_store4(i64 [[PGEP2]]) 43; STORE: tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 false>) 44 tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 false>) 45 ret void 46} 47 48define void @store.v8i32.10010110(<8 x i32> %arg) sanitize_address { 49; ALL-LABEL: @store.v8i32.10010110 50 %p = load <8 x i32>*, <8 x i32>** @v8i32, align 8 51; NOSTORE-NOT: call void @__asan_store 52; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 0 53; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP0]] to i64 54; STORE: call void @__asan_store4(i64 [[PGEP0]]) 55; STORE: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 3 56; STORE: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP3]] to i64 57; STORE: call void @__asan_store4(i64 [[PGEP3]]) 58; STORE: [[GEP5:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 5 59; STORE: [[PGEP5:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP5]] to i64 60; STORE: call void @__asan_store4(i64 [[PGEP5]]) 61; STORE: [[GEP6:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 6 62; STORE: [[PGEP6:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP6]] to i64 63; STORE: call void @__asan_store4(i64 [[PGEP6]]) 64; STORE: tail call void @llvm.masked.store.v8i32.p0v8i32(<8 x i32> %arg, <8 x i32>* %p, i32 8, <8 x i1> <i1 true, i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 false>) 65 tail call void @llvm.masked.store.v8i32.p0v8i32(<8 x i32> %arg, <8 x i32>* %p, i32 8, <8 x i1> <i1 true, i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 false>) 66 ret void 67} 68 69define void @store.v4i64.0001(<4 x i32*> %arg) sanitize_address { 70; ALL-LABEL: @store.v4i64.0001 71 %p = load <4 x i32*>*, <4 x i32*>** @v4i64, align 8 72; NOSTORE-NOT: call void @__asan_store 73; STORE: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x i32*>, <4 x i32*>* %p, i64 0, i64 3 74; STORE: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32** [[GEP3]] to i64 75; STORE: call void @__asan_store8(i64 [[PGEP3]]) 76; STORE: tail call void @llvm.masked.store.v4p0i32.p0v4p0i32(<4 x i32*> %arg, <4 x i32*>* %p, i32 8, <4 x i1> <i1 false, i1 false, i1 false, i1 true>) 77 tail call void @llvm.masked.store.v4p0i32.p0v4p0i32(<4 x i32*> %arg, <4 x i32*>* %p, i32 8, <4 x i1> <i1 false, i1 false, i1 false, i1 true>) 78 ret void 79} 80 81define void @store.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address { 82; ALL-LABEL: @store.v4f32.variable 83 %p = load <4 x float>*, <4 x float>** @v4f32, align 8 84; STORE: [[MASK0:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 0 85; STORE: br i1 [[MASK0]], label %[[THEN0:[0-9A-Za-z]+]], label %[[AFTER0:[0-9A-Za-z]+]] 86; STORE: [[THEN0]]: 87; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0 88; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64 89; STORE: call void @__asan_store4(i64 [[PGEP0]]) 90; STORE: br label %[[AFTER0]] 91; STORE: [[AFTER0]]: 92 93; STORE: [[MASK1:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 1 94; STORE: br i1 [[MASK1]], label %[[THEN1:[0-9A-Za-z]+]], label %[[AFTER1:[0-9A-Za-z]+]] 95; STORE: [[THEN1]]: 96; STORE: [[GEP1:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 1 97; STORE: [[PGEP1:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP1]] to i64 98; STORE: call void @__asan_store4(i64 [[PGEP1]]) 99; STORE: br label %[[AFTER1]] 100; STORE: [[AFTER1]]: 101 102; STORE: [[MASK2:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 2 103; STORE: br i1 [[MASK2]], label %[[THEN2:[0-9A-Za-z]+]], label %[[AFTER2:[0-9A-Za-z]+]] 104; STORE: [[THEN2]]: 105; STORE: [[GEP2:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 2 106; STORE: [[PGEP2:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP2]] to i64 107; STORE: call void @__asan_store4(i64 [[PGEP2]]) 108; STORE: br label %[[AFTER2]] 109; STORE: [[AFTER2]]: 110 111; STORE: [[MASK3:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 3 112; STORE: br i1 [[MASK3]], label %[[THEN3:[0-9A-Za-z]+]], label %[[AFTER3:[0-9A-Za-z]+]] 113; STORE: [[THEN3]]: 114; STORE: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 3 115; STORE: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP3]] to i64 116; STORE: call void @__asan_store4(i64 [[PGEP3]]) 117; STORE: br label %[[AFTER3]] 118; STORE: [[AFTER3]]: 119 120; STORE: tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> %mask) 121 tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> %mask) 122 ret void 123} 124 125;; Store using two masked.stores, which should instrument them both. 126define void @store.v4f32.1010.split(<4 x float> %arg) sanitize_address { 127; BOTH-LABEL: @store.v4f32.1010.split 128 %p = load <4 x float>*, <4 x float>** @v4f32, align 8 129; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0 130; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64 131; STORE: call void @__asan_store4(i64 [[PGEP0]]) 132; STORE: tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 false>) 133 tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 false>) 134; STORE: [[GEP1:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 2 135; STORE: [[PGEP1:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP1]] to i64 136; STORE: call void @__asan_store4(i64 [[PGEP1]]) 137; STORE: tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> <i1 false, i1 false, i1 true, i1 false>) 138 tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> <i1 false, i1 false, i1 true, i1 false>) 139 ret void 140} 141 142;; Store using a masked.store after a full store. Shouldn't instrument the second one. 143define void @store.v4f32.0010.after.full.store(<4 x float> %arg) sanitize_address { 144; BOTH-LABEL: @store.v4f32.0010.after.full.store 145 %p = load <4 x float>*, <4 x float>** @v4f32, align 8 146; STORE: [[PTRTOINT:%[0-9A-Za-z]+]] = ptrtoint <4 x float>* %p to i64 147; STORE: call void @__asan_store16(i64 [[PTRTOINT]]) 148; STORE: store <4 x float> %arg, <4 x float>* %p 149 store <4 x float> %arg, <4 x float>* %p 150; STORE-NOT: call void @__asan_store 151; STORE: tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> <i1 false, i1 false, i1 true, i1 false>) 152 tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> <i1 false, i1 false, i1 true, i1 false>) 153 ret void 154} 155 156;;;;;;;;;;;;;;;; LOAD 157declare <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>*, i32, <4 x i1>, <4 x float>) argmemonly nounwind 158declare <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>*, i32, <8 x i1>, <8 x i32>) argmemonly nounwind 159declare <4 x i32*> @llvm.masked.load.v4p0i32.p0v4p0i32(<4 x i32*>*, i32, <4 x i1>, <4 x i32*>) argmemonly nounwind 160 161define <8 x i32> @load.v8i32.11100001(<8 x i32> %arg) sanitize_address { 162; ALL-LABEL: @load.v8i32.11100001 163 %p = load <8 x i32>*, <8 x i32>** @v8i32, align 8 164; NOLOAD-NOT: call void @__asan_load 165; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 0 166; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP0]] to i64 167; LOAD: call void @__asan_load4(i64 [[PGEP0]]) 168; LOAD: [[GEP1:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 1 169; LOAD: [[PGEP1:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP1]] to i64 170; LOAD: call void @__asan_load4(i64 [[PGEP1]]) 171; LOAD: [[GEP2:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 2 172; LOAD: [[PGEP2:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP2]] to i64 173; LOAD: call void @__asan_load4(i64 [[PGEP2]]) 174; LOAD: [[GEP7:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 7 175; LOAD: [[PGEP7:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP7]] to i64 176; LOAD: call void @__asan_load4(i64 [[PGEP7]]) 177; LOAD: tail call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>* %p, i32 8, <8 x i1> <i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 true>, <8 x i32> %arg) 178 %res = tail call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>* %p, i32 8, <8 x i1> <i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 true>, <8 x i32> %arg) 179 ret <8 x i32> %res 180} 181 182define <4 x float> @load.v4f32.1001(<4 x float> %arg) sanitize_address { 183; ALL-LABEL: @load.v4f32.1001 184 %p = load <4 x float>*, <4 x float>** @v4f32, align 8 185; NOLOAD-NOT: call void @__asan_load 186; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0 187; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64 188; LOAD: call void @__asan_load4(i64 [[PGEP0]]) 189; LOAD: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 3 190; LOAD: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP3]] to i64 191; LOAD: call void @__asan_load4(i64 [[PGEP3]]) 192; LOAD: tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %arg) 193 %res = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %arg) 194 ret <4 x float> %res 195} 196 197define <4 x i32*> @load.v4i64.0001(<4 x i32*> %arg) sanitize_address { 198; ALL-LABEL: @load.v4i64.0001 199 %p = load <4 x i32*>*, <4 x i32*>** @v4i64, align 8 200; NOLOAD-NOT: call void @__asan_load 201; LOAD: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x i32*>, <4 x i32*>* %p, i64 0, i64 3 202; LOAD: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32** [[GEP3]] to i64 203; LOAD: call void @__asan_load8(i64 [[PGEP3]]) 204; LOAD: tail call <4 x i32*> @llvm.masked.load.v4p0i32.p0v4p0i32(<4 x i32*>* %p, i32 8, <4 x i1> <i1 false, i1 false, i1 false, i1 true>, <4 x i32*> %arg) 205 %res = tail call <4 x i32*> @llvm.masked.load.v4p0i32.p0v4p0i32(<4 x i32*>* %p, i32 8, <4 x i1> <i1 false, i1 false, i1 false, i1 true>, <4 x i32*> %arg) 206 ret <4 x i32*> %res 207} 208 209define <4 x float> @load.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address { 210; ALL-LABEL: @load.v4f32.variable 211 %p = load <4 x float>*, <4 x float>** @v4f32, align 8 212; LOAD: [[MASK0:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 0 213; LOAD: br i1 [[MASK0]], label %[[THEN0:[0-9A-Za-z]+]], label %[[AFTER0:[0-9A-Za-z]+]] 214; LOAD: [[THEN0]]: 215; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0 216; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64 217; LOAD: call void @__asan_load4(i64 [[PGEP0]]) 218; LOAD: br label %[[AFTER0]] 219; LOAD: [[AFTER0]]: 220 221; LOAD: [[MASK1:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 1 222; LOAD: br i1 [[MASK1]], label %[[THEN1:[0-9A-Za-z]+]], label %[[AFTER1:[0-9A-Za-z]+]] 223; LOAD: [[THEN1]]: 224; LOAD: [[GEP1:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 1 225; LOAD: [[PGEP1:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP1]] to i64 226; LOAD: call void @__asan_load4(i64 [[PGEP1]]) 227; LOAD: br label %[[AFTER1]] 228; LOAD: [[AFTER1]]: 229 230; LOAD: [[MASK2:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 2 231; LOAD: br i1 [[MASK2]], label %[[THEN2:[0-9A-Za-z]+]], label %[[AFTER2:[0-9A-Za-z]+]] 232; LOAD: [[THEN2]]: 233; LOAD: [[GEP2:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 2 234; LOAD: [[PGEP2:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP2]] to i64 235; LOAD: call void @__asan_load4(i64 [[PGEP2]]) 236; LOAD: br label %[[AFTER2]] 237; LOAD: [[AFTER2]]: 238 239; LOAD: [[MASK3:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 3 240; LOAD: br i1 [[MASK3]], label %[[THEN3:[0-9A-Za-z]+]], label %[[AFTER3:[0-9A-Za-z]+]] 241; LOAD: [[THEN3]]: 242; LOAD: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 3 243; LOAD: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP3]] to i64 244; LOAD: call void @__asan_load4(i64 [[PGEP3]]) 245; LOAD: br label %[[AFTER3]] 246; LOAD: [[AFTER3]]: 247 248; LOAD: tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> %mask, <4 x float> %arg) 249 %res = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> %mask, <4 x float> %arg) 250 ret <4 x float> %res 251} 252 253;; Load using two masked.loads, which should instrument them both. 254define <4 x float> @load.v4f32.1001.split(<4 x float> %arg) sanitize_address { 255; BOTH-LABEL: @load.v4f32.1001 256 %p = load <4 x float>*, <4 x float>** @v4f32, align 8 257; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0 258; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64 259; LOAD: call void @__asan_load4(i64 [[PGEP0]]) 260; LOAD: %res = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %arg) 261 %res = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %arg) 262; LOAD: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 3 263; LOAD: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP3]] to i64 264; LOAD: call void @__asan_load4(i64 [[PGEP3]]) 265; LOAD: tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> <i1 false, i1 false, i1 false, i1 true>, <4 x float> %res) 266 %res2 = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> <i1 false, i1 false, i1 false, i1 true>, <4 x float> %res) 267 ret <4 x float> %res2 268} 269 270;; Load using a masked.load after a full load. Shouldn't instrument the second one. 271define <4 x float> @load.v4f32.1001.after.full.load(<4 x float> %arg) sanitize_address { 272; BOTH-LABEL: @load.v4f32.1001.after.full.load 273 %p = load <4 x float>*, <4 x float>** @v4f32, align 8 274; LOAD: [[PTRTOINT:%[0-9A-Za-z]+]] = ptrtoint <4 x float>* %p to i64 275; LOAD: call void @__asan_load16(i64 [[PTRTOINT]]) 276; LOAD: %res = load <4 x float>, <4 x float>* %p 277 %res = load <4 x float>, <4 x float>* %p 278; LOAD-NOT: call void @__asan_load 279; LOAD: tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> <i1 false, i1 false, i1 false, i1 true>, <4 x float> %arg) 280 %res2 = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> <i1 false, i1 false, i1 false, i1 true>, <4 x float> %arg) 281 ret <4 x float> %res2 282} 283