/external/llvm-project/lld/ELF/Arch/ |
D | PPCInsns.def | 26 PCREL_OPT(STXV, PSTXV, ST_STX28_TO5);
|
D | PPC64.cpp | 92 STXV = 0xf4000005, enumerator
|
/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.h | 167 PPC::STVX, PPC::STXV, PPC::DFSTOREf64, PPC::DFSTOREf32, \ 174 PPC::STVX, PPC::STXV, PPC::DFSTOREf64, PPC::DFSTOREf32, \
|
D | PPCPreEmitPeephole.cpp | 79 case PPC::STXV: in hasPCRelativeForm()
|
D | PPCRegisterInfo.cpp | 127 ImmToIdxMap[PPC::STXV] = PPC::STXVX; in PPCRegisterInfo() 1107 case PPC::STXV: in offsetMinAlignForOpcode()
|
D | PPCInstrVSX.td | 1709 def STXV : DQ_RD6_RS5_DQ12<61, 5, (outs), (ins vsrc:$XT, memrix16:$dst), 3670 def : Pat<(quadwOffsetStore v4f32:$rS, iaddrX16:$dst), (STXV $rS, memrix16:$dst)>; 3671 def : Pat<(quadwOffsetStore v4i32:$rS, iaddrX16:$dst), (STXV $rS, memrix16:$dst)>; 3672 def : Pat<(quadwOffsetStore v2f64:$rS, iaddrX16:$dst), (STXV $rS, memrix16:$dst)>; 3674 (STXV (COPY_TO_REGCLASS $rS, VSRC), memrix16:$dst)>; 3675 def : Pat<(quadwOffsetStore v2i64:$rS, iaddrX16:$dst), (STXV $rS, memrix16:$dst)>; 3677 (STXV $rS, memrix16:$dst)>; 3679 (STXV $rS, memrix16:$dst)>;
|
D | P9InstrResources.td | 919 (instregex "STXV(B16X|H8X|W4X|D2X|L|LL|X)?$")
|
D | PPCInstrInfo.cpp | 3808 III.ImmOpcode = PPC::STXV; in instrHasImmForm()
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 112 ImmToIdxMap[PPC::STXV] = PPC::STXVX; in PPCRegisterInfo() 986 case PPC::STXV: in offsetMinAlignForOpcode()
|
D | PPCInstrVSX.td | 3062 def STXV : DQ_RD6_RS5_DQ12<61, 5, (outs), (ins vsrc:$XT, memrix16:$dst), 3244 def : Pat<(quadwOffsetStore v4f32:$rS, iaddrX16:$dst), (STXV $rS, memrix16:$dst)>; 3245 def : Pat<(quadwOffsetStore v4i32:$rS, iaddrX16:$dst), (STXV $rS, memrix16:$dst)>; 3246 def : Pat<(quadwOffsetStore v2f64:$rS, iaddrX16:$dst), (STXV $rS, memrix16:$dst)>; 3248 (STXV (COPY_TO_REGCLASS $rS, VSRC), memrix16:$dst)>; 3249 def : Pat<(quadwOffsetStore v2i64:$rS, iaddrX16:$dst), (STXV $rS, memrix16:$dst)>; 3251 (STXV $rS, memrix16:$dst)>; 3253 (STXV $rS, memrix16:$dst)>;
|
D | PPCInstrInfo.cpp | 2412 PPC::SPILL_CRBIT, PPC::STVX, PPC::STXV, PPC::DFSTOREf64, PPC::DFSTOREf32, in getStoreOpcodesForSpillArray() 3375 III.ImmOpcode = PPC::STXV; in instrHasImmForm()
|
D | P9InstrResources.td | 918 (instregex "STXV(B16X|H8X|W4X|D2X|L|LL|X)?$")
|
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenMCCodeEmitter.inc | 1644 UINT64_C(4093640709), // STXV 5875 case PPC::STXV: { 8054 CEFBS_None, // STXV = 1631
|
D | PPCGenDAGISel.inc | 1619 /* 3773*/ OPC_MorphNodeTo0, TARGET_VAL(PPC::STXV), 0|OPFL_Chain|OPFL_MemRefs, 1622 // Dst: (STXV ?:{ *:[v2f64] }:$rS, memrix16:{ *:[iPTR] }:$dst) 1651 /* 3831*/ OPC_MorphNodeTo0, TARGET_VAL(PPC::STXV), 0|OPFL_Chain|OPFL_MemRefs, 1654 // Dst: (STXV ?:{ *:[v2i64] }:$rS, memrix16:{ *:[iPTR] }:$dst) 1683 /* 3890*/ OPC_MorphNodeTo0, TARGET_VAL(PPC::STXV), 0|OPFL_Chain|OPFL_MemRefs, 1686 // Dst: (STXV ?:{ *:[v4i32] }:$rS, memrix16:{ *:[iPTR] }:$dst) 1716 /* 3951*/ OPC_MorphNodeTo0, TARGET_VAL(PPC::STXV), 0|OPFL_Chain|OPFL_MemRefs, 1719 // Dst: (STXV ?:{ *:[v4f32] }:$rS, memrix16:{ *:[iPTR] }:$dst) 1916 /* 4322*/ OPC_MorphNodeTo0, TARGET_VAL(PPC::STXV), 0|OPFL_Chain|OPFL_MemRefs, 1919 …// Dst: (STXV (COPY_TO_REGCLASS:{ *:[v4i32] } ?:{ *:[f128] }:$rS, VSRC:{ *:[i32] }), memrix16:{ *:… [all …]
|
D | PPCGenAsmWriter.inc | 3299 33581362U, // STXV 5590 0U, // STXV
|
D | PPCGenDisassemblerTables.inc | 3172 /* 15078 */ MCD::OPC_Decode, 223, 12, 157, 1, // Opcode: STXV
|
D | PPCGenInstrInfo.inc | 1646 STXV = 1631, 4615 …LL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo145, -1 ,nullptr }, // Inst #1631 = STXV
|
D | PPCGenAsmMatcher.inc | 6375 …{ 9737 /* stxv */, PPC::STXV, Convert__RegVSRC1_0__DispRIX161_1__RegGxRCNoR01_2, AMFBS_None, { MCK…
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrVSX.td | 2157 def STXV : DQ_RD6_RS5_DQ12<61, 5, (outs), (ins vsrc:$XT, memrix16:$dst),
|
/external/llvm-project/llvm/test/CodeGen/PowerPC/ |
D | convert-rr-to-ri-instrs.mir | 6192 ; CHECK: STXV %1, 16, killed %3
|