/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 243 ADDCARRY, SUBCARRY, enumerator
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/external/llvm-project/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 284 SUBCARRY, enumerator
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/external/llvm-project/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 100 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
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D | SystemZISelLowering.cpp | 187 setOperationAction(ISD::SUBCARRY, VT, Custom); in SystemZTargetLowering() 3697 while (Carry.getOpcode() == ISD::SUBCARRY) in isSubBorrowChain() 3731 case ISD::SUBCARRY: in lowerADDSUBCARRY() 3735 BaseOp = SystemZISD::SUBCARRY; in lowerADDSUBCARRY() 5397 case ISD::SUBCARRY: in LowerOperation() 5584 OPCODE(SUBCARRY); in getTargetNodeName()
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D | SystemZOperators.td | 287 def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 99 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
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D | SystemZISelLowering.cpp | 183 setOperationAction(ISD::SUBCARRY, VT, Custom); in SystemZTargetLowering() 3645 while (Carry.getOpcode() == ISD::SUBCARRY) in isSubBorrowChain() 3679 case ISD::SUBCARRY: in lowerADDSUBCARRY() 3683 BaseOp = SystemZISD::SUBCARRY; in lowerADDSUBCARRY() 5141 case ISD::SUBCARRY: in LowerOperation() 5328 OPCODE(SUBCARRY); in getTargetNodeName()
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D | SystemZOperators.td | 282 def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 1741 SDValue Sub1_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Lo, in LowerUDIVREM64() 1743 SDValue Sub1_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Hi, in LowerUDIVREM64() 1761 SDValue Sub2_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Lo, in LowerUDIVREM64() 1763 SDValue Sub2_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Mi, in LowerUDIVREM64() 1765 SDValue Sub2_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi, in LowerUDIVREM64() 1781 SDValue Sub3_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Lo, in LowerUDIVREM64() 1783 SDValue Sub3_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi, in LowerUDIVREM64() 1785 SDValue Sub3_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub3_Mi, in LowerUDIVREM64()
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D | SIISelLowering.cpp | 248 setOperationAction(ISD::SUBCARRY, MVT::i32, Legal); in SITargetLowering() 256 setOperationAction(ISD::SUBCARRY, MVT::i64, Legal); in SITargetLowering() 719 setTargetDAGCombine(ISD::SUBCARRY); in SITargetLowering() 9573 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::SUBCARRY : ISD::ADDCARRY; in performAddCombine() 9614 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::ADDCARRY : ISD::SUBCARRY; in performSubCombine() 9619 if (LHS.getOpcode() == ISD::SUBCARRY) { in performSubCombine() 9625 return DAG.getNode(ISD::SUBCARRY, SDLoc(N), LHS->getVTList(), Args); in performSubCombine() 9648 (LHSOpc == ISD::SUB && Opc == ISD::SUBCARRY)) { in performAddCarrySubCarryCombine() 9995 case ISD::SUBCARRY: in PerformDAGCombine()
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D | AMDGPUISelDAGToDAG.cpp | 768 case ISD::SUBCARRY: in Select()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 1870 SDValue Sub1_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Lo, in LowerUDIVREM64() 1872 SDValue Sub1_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Hi, in LowerUDIVREM64() 1890 SDValue Sub2_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Lo, in LowerUDIVREM64() 1892 SDValue Sub2_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Mi, in LowerUDIVREM64() 1894 SDValue Sub2_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi, in LowerUDIVREM64() 1910 SDValue Sub3_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Lo, in LowerUDIVREM64() 1912 SDValue Sub3_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi, in LowerUDIVREM64() 1914 SDValue Sub3_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub3_Mi, in LowerUDIVREM64()
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D | SIISelLowering.cpp | 279 setOperationAction(ISD::SUBCARRY, MVT::i32, Legal); in SITargetLowering() 287 setOperationAction(ISD::SUBCARRY, MVT::i64, Legal); in SITargetLowering() 833 setTargetDAGCombine(ISD::SUBCARRY); in SITargetLowering() 10326 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::SUBCARRY : ISD::ADDCARRY; in performAddCombine() 10367 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::ADDCARRY : ISD::SUBCARRY; in performSubCombine() 10372 if (LHS.getOpcode() == ISD::SUBCARRY) { in performSubCombine() 10378 return DAG.getNode(ISD::SUBCARRY, SDLoc(N), LHS->getVTList(), Args); in performSubCombine() 10401 (LHSOpc == ISD::SUB && Opc == ISD::SUBCARRY)) { in performAddCarrySubCarryCombine() 10754 case ISD::SUBCARRY: in PerformDAGCombine()
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D | AMDGPUISelDAGToDAG.cpp | 754 case ISD::SUBCARRY: in Select() 1127 (!IsAdd && (UI->getOpcode() != ISD::SUBCARRY))) { in SelectUADDO_USUBO()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 151 case ISD::SUBCARRY: Res = PromoteIntRes_ADDSUBCARRY(N, ResNo); break; in PromoteIntegerResult() 1297 case ISD::SUBCARRY: Res = PromoteIntOp_ADDSUBCARRY(N, OpNo); break; in PromoteIntegerOperand() 1893 case ISD::SUBCARRY: ExpandIntRes_ADDSUBCARRY(N, Lo, Hi); break; in ExpandIntegerResult() 2265 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY, in ExpandIntRes_ADDSUB() 2276 Hi = DAG.getNode(ISD::SUBCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2442 CarryOp = ISD::SUBCARRY; in ExpandIntRes_UADDSUBO() 4015 SDValue LowCmp = DAG.getNode(ISD::SUBCARRY, dl, VTList, LHSLo, RHSLo, Carry); in ExpandIntOp_SETCCCARRY()
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D | SelectionDAGDumper.cpp | 300 case ISD::SUBCARRY: return "subcarry"; in getOperationName()
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D | DAGCombiner.cpp | 1516 case ISD::SUBCARRY: return visitSUBCARRY(N); in visit() 2389 if (V.getOpcode() != ISD::ADDCARRY && V.getOpcode() != ISD::SUBCARRY && in getAsCarry() 2865 unsigned NewOp = Opcode == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY; in combineCarryDiamond() 2907 SDValue Sub = DAG.getNode(ISD::SUBCARRY, DL, N->getVTList(), N1, in visitADDCARRYLike()
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D | LegalizeDAG.cpp | 3441 case ISD::SUBCARRY: { in ExpandNode()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 153 case ISD::SUBCARRY: Res = PromoteIntRes_ADDSUBCARRY(N, ResNo); break; in PromoteIntegerResult() 1499 case ISD::SUBCARRY: Res = PromoteIntOp_ADDSUBCARRY(N, OpNo); break; in PromoteIntegerOperand() 2122 case ISD::SUBCARRY: ExpandIntRes_ADDSUBCARRY(N, Lo, Hi); break; in ExpandIntegerResult() 2522 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY, in ExpandIntRes_ADDSUB() 2533 Hi = DAG.getNode(ISD::SUBCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2699 CarryOp = ISD::SUBCARRY; in ExpandIntRes_UADDSUBO() 2771 : ISD::SUBCARRY; in ExpandIntRes_SADDSUBO_CARRY() 4396 SDValue LowCmp = DAG.getNode(ISD::SUBCARRY, dl, VTList, LHSLo, RHSLo, Carry); in ExpandIntOp_SETCCCARRY()
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D | SelectionDAGDumper.cpp | 305 case ISD::SUBCARRY: return "subcarry"; in getOperationName()
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D | DAGCombiner.cpp | 1635 case ISD::SUBCARRY: return visitSUBCARRY(N); in visit() 2592 if (V.getOpcode() != ISD::ADDCARRY && V.getOpcode() != ISD::SUBCARRY && in getAsCarry() 3072 unsigned NewOp = Opcode == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY; in combineCarryDiamond() 3114 SDValue Sub = DAG.getNode(ISD::SUBCARRY, DL, N->getVTList(), N1, in visitADDCARRYLike()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1401 setOperationAction(ISD::SUBCARRY, VT, Expand); in HexagonTargetLowering() 1404 setOperationAction(ISD::SUBCARRY, MVT::i64, Custom); in HexagonTargetLowering() 2916 case ISD::SUBCARRY: return LowerAddSubCarry(Op, DAG); in LowerOperation()
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1534 setOperationAction(ISD::SUBCARRY, VT, Expand); in HexagonTargetLowering() 1537 setOperationAction(ISD::SUBCARRY, MVT::i64, Custom); in HexagonTargetLowering() 3086 case ISD::SUBCARRY: return LowerAddSubCarry(Op, DAG); in LowerOperation()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 674 setOperationAction(ISD::SUBCARRY, VT, Expand); in initActions()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 788 setOperationAction(ISD::SUBCARRY, VT, Expand); in initActions()
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