Searched refs:Setcc (Results 1 – 25 of 30) sorted by relevance
12
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 518 bool tryVPTESTM(SDNode *Root, SDValue Setcc, SDValue Mask);
4174 bool X86DAGToDAGISel::tryVPTESTM(SDNode *Root, SDValue Setcc, in tryVPTESTM() argument
4177 assert(Setcc.getSimpleValueType().getVectorElementType() == MVT::i1 && in tryVPTESTM()
4181 ISD::CondCode CC = cast<CondCodeSDNode>(Setcc.getOperand(2))->get(); in tryVPTESTM()
4185 SDValue SetccOp0 = Setcc.getOperand(0); in tryVPTESTM()
4186 SDValue SetccOp1 = Setcc.getOperand(1); in tryVPTESTM()
4296 MVT ResVT = Setcc.getSimpleValueType(); in tryVPTESTM()
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| D | X86ScheduleBtVer2.td | 227 def : WriteRes<WriteSETCC, [JALU01]>; // Setcc.
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| D | X86SchedSandyBridge.td | 164 def : WriteRes<WriteSETCC, [SBPort05]>; // Setcc.
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| D | X86ScheduleBdVer2.td | 494 def : WriteRes<WriteSETCC, [PdEX01]>; // Setcc.
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| D | X86SchedBroadwell.td | 165 def : WriteRes<WriteSETCC, [BWPort06]>; // Setcc.
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| D | X86SchedSkylakeClient.td | 162 def : WriteRes<WriteSETCC, [SKLPort06]>; // Setcc.
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| D | X86SchedHaswell.td | 169 def : WriteRes<WriteSETCC, [HWPort06]>; // Setcc.
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| D | X86SchedSkylakeServer.td | 163 def : WriteRes<WriteSETCC, [SKXPort06]>; // Setcc.
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoZfh.td | 307 /// Setcc
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| D | RISCVInstrInfoD.td | 293 /// Setcc
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| D | RISCVInstrInfoF.td | 349 /// Setcc
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| D | RISCVInstrInfo.td | 899 /// Setcc
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoD.td | 286 /// Setcc
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| D | RISCVInstrInfoF.td | 343 /// Setcc
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| D | RISCVInstrInfo.td | 837 /// Setcc
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 507 bool tryVPTESTM(SDNode *Root, SDValue Setcc, SDValue Mask);
4317 bool X86DAGToDAGISel::tryVPTESTM(SDNode *Root, SDValue Setcc, in tryVPTESTM() argument
4320 assert(Setcc.getSimpleValueType().getVectorElementType() == MVT::i1 && in tryVPTESTM()
4324 ISD::CondCode CC = cast<CondCodeSDNode>(Setcc.getOperand(2))->get(); in tryVPTESTM()
4328 SDValue SetccOp0 = Setcc.getOperand(0); in tryVPTESTM()
4329 SDValue SetccOp1 = Setcc.getOperand(1); in tryVPTESTM()
4416 MVT ResVT = Setcc.getSimpleValueType(); in tryVPTESTM()
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| D | X86ScheduleBtVer2.td | 227 def : WriteRes<WriteSETCC, [JALU01]>; // Setcc.
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| D | X86SchedSandyBridge.td | 164 def : WriteRes<WriteSETCC, [SBPort05]>; // Setcc.
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| D | X86ScheduleBdVer2.td | 494 def : WriteRes<WriteSETCC, [PdEX01]>; // Setcc.
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| D | X86SchedBroadwell.td | 165 def : WriteRes<WriteSETCC, [BWPort06]>; // Setcc.
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| D | X86SchedHaswell.td | 169 def : WriteRes<WriteSETCC, [HWPort06]>; // Setcc.
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| D | X86SchedSkylakeClient.td | 162 def : WriteRes<WriteSETCC, [SKLPort06]>; // Setcc.
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| D | X86SchedSkylakeServer.td | 163 def : WriteRes<WriteSETCC, [SKXPort06]>; // Setcc.
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstX86Base.h | 173 Setcc, enumerator
2996 return InstX86Base::isClassof(Instr, InstX86Base::Setcc); in classof()
3311 using Setcc = typename InstImpl<TraitsType>::InstX86Setcc; member
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| D | IceTargetLoweringX86Base.h | 944 Context.insert<typename Traits::Insts::Setcc>(Dest, Condition); in _setcc()
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