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Searched refs:UnitSize (Results 1 – 20 of 20) sorted by relevance

/external/llvm/lib/Fuzzer/
DFuzzerTraceState.cpp388 auto UnitSize = F->GetCurrentUnitInFuzzingThead(&UnitData); in TryToAddDesiredData() local
391 const uint8_t *End = Beg + UnitSize; in TryToAddDesiredData()
397 assert(Pos < UnitSize); in TryToAddDesiredData()
411 auto UnitSize = F->GetCurrentUnitInFuzzingThead(&UnitData); in TryToAddDesiredData() local
414 const uint8_t *End = Beg + UnitSize; in TryToAddDesiredData()
420 assert(Pos < UnitSize); in TryToAddDesiredData()
DFuzzerLoop.cpp175 size_t UnitSize = CurrentUnitSize; in DumpCurrentUnit() local
176 if (UnitSize <= kMaxUnitSizeToPrint) { in DumpCurrentUnit()
177 PrintHexArray(CurrentUnitData, UnitSize, "\n"); in DumpCurrentUnit()
178 PrintASCII(CurrentUnitData, UnitSize, "\n"); in DumpCurrentUnit()
180 WriteUnitToFileWithPrefix({CurrentUnitData, CurrentUnitData + UnitSize}, in DumpCurrentUnit()
/external/llvm-project/compiler-rt/lib/fuzzer/
DFuzzerLoop.cpp182 size_t UnitSize = CurrentUnitSize; in DumpCurrentUnit() local
183 if (UnitSize <= kMaxUnitSizeToPrint) { in DumpCurrentUnit()
184 PrintHexArray(CurrentUnitData, UnitSize, "\n"); in DumpCurrentUnit()
185 PrintASCII(CurrentUnitData, UnitSize, "\n"); in DumpCurrentUnit()
187 WriteUnitToFileWithPrefix({CurrentUnitData, CurrentUnitData + UnitSize}, in DumpCurrentUnit()
/external/rust/crates/libfuzzer-sys/libfuzzer/
DFuzzerLoop.cpp182 size_t UnitSize = CurrentUnitSize; in DumpCurrentUnit() local
183 if (UnitSize <= kMaxUnitSizeToPrint) { in DumpCurrentUnit()
184 PrintHexArray(CurrentUnitData, UnitSize, "\n"); in DumpCurrentUnit()
185 PrintASCII(CurrentUnitData, UnitSize, "\n"); in DumpCurrentUnit()
187 WriteUnitToFileWithPrefix({CurrentUnitData, CurrentUnitData + UnitSize}, in DumpCurrentUnit()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/ObjectYAML/
DDWARFYAML.cpp92 IO.mapRequired("UnitSize", Section.UnitSize); in mapping()
DDWARFEmitter.cpp123 writeInteger((uint32_t)Sect.UnitSize, OS, IsLittleEndian); in EmitPubSection()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h408 bool isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
413 bool isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
DPPCISelLowering.cpp1260 static bool isVMerge(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMerge() argument
1264 assert((UnitSize == 1 || UnitSize == 2 || UnitSize == 4) && in isVMerge()
1267 for (unsigned i = 0; i != 8/UnitSize; ++i) // Step over units in isVMerge()
1268 for (unsigned j = 0; j != UnitSize; ++j) { // Step over bytes within unit in isVMerge()
1269 if (!isConstantOrUndef(N->getMaskElt(i*UnitSize*2+j), in isVMerge()
1270 LHSStart+j+i*UnitSize) || in isVMerge()
1271 !isConstantOrUndef(N->getMaskElt(i*UnitSize*2+UnitSize+j), in isVMerge()
1272 RHSStart+j+i*UnitSize)) in isVMerge()
1284 bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMRGLShuffleMask() argument
1288 return isVMerge(N, UnitSize, 0, 0); in isVMRGLShuffleMask()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ObjectYAML/
DDWARFYAML.h84 uint32_t UnitSize; member
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.h538 bool isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
543 bool isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
DPPCISelLowering.cpp1622 static bool isVMerge(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMerge() argument
1626 assert((UnitSize == 1 || UnitSize == 2 || UnitSize == 4) && in isVMerge()
1629 for (unsigned i = 0; i != 8/UnitSize; ++i) // Step over units in isVMerge()
1630 for (unsigned j = 0; j != UnitSize; ++j) { // Step over bytes within unit in isVMerge()
1631 if (!isConstantOrUndef(N->getMaskElt(i*UnitSize*2+j), in isVMerge()
1632 LHSStart+j+i*UnitSize) || in isVMerge()
1633 !isConstantOrUndef(N->getMaskElt(i*UnitSize*2+UnitSize+j), in isVMerge()
1634 RHSStart+j+i*UnitSize)) in isVMerge()
1646 bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMRGLShuffleMask() argument
1650 return isVMerge(N, UnitSize, 0, 0); in isVMRGLShuffleMask()
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/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCISelLowering.h596 bool isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
601 bool isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
DPPCISelLowering.cpp1748 static bool isVMerge(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMerge() argument
1752 assert((UnitSize == 1 || UnitSize == 2 || UnitSize == 4) && in isVMerge()
1755 for (unsigned i = 0; i != 8/UnitSize; ++i) // Step over units in isVMerge()
1756 for (unsigned j = 0; j != UnitSize; ++j) { // Step over bytes within unit in isVMerge()
1757 if (!isConstantOrUndef(N->getMaskElt(i*UnitSize*2+j), in isVMerge()
1758 LHSStart+j+i*UnitSize) || in isVMerge()
1759 !isConstantOrUndef(N->getMaskElt(i*UnitSize*2+UnitSize+j), in isVMerge()
1760 RHSStart+j+i*UnitSize)) in isVMerge()
1772 bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMRGLShuffleMask() argument
1776 return isVMerge(N, UnitSize, 0, 0); in isVMRGLShuffleMask()
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/external/llvm-project/llvm/lib/ObjectYAML/
DDWARFYAML.cpp179 IO.mapRequired("UnitSize", Section.UnitSize); in mapping()
DDWARFEmitter.cpp232 writeInteger((uint32_t)Sect.UnitSize, OS, IsLittleEndian); in emitPubSection()
/external/llvm-project/llvm/tools/obj2yaml/
Ddwarf2yaml.cpp187 Y.UnitSize = Sets[0].Size; in dumpPubSection()
/external/llvm-project/llvm/include/llvm/ObjectYAML/
DDWARFYAML.h88 uint32_t UnitSize; member
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp7913 unsigned UnitSize = 0; in EmitStructByval() local
7921 UnitSize = 1; in EmitStructByval()
7923 UnitSize = 2; in EmitStructByval()
7929 UnitSize = 16; in EmitStructByval()
7931 UnitSize = 8; in EmitStructByval()
7934 if (UnitSize == 0) in EmitStructByval()
7935 UnitSize = 4; in EmitStructByval()
7939 bool IsNeon = UnitSize >= 8; in EmitStructByval()
7942 VecTRC = UnitSize == 16 ? &ARM::DPairRegClass in EmitStructByval()
7943 : UnitSize == 8 ? &ARM::DPRRegClass in EmitStructByval()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp10170 unsigned UnitSize = 0; in EmitStructByval() local
10179 UnitSize = 1; in EmitStructByval()
10181 UnitSize = 2; in EmitStructByval()
10187 UnitSize = 16; in EmitStructByval()
10189 UnitSize = 8; in EmitStructByval()
10192 if (UnitSize == 0) in EmitStructByval()
10193 UnitSize = 4; in EmitStructByval()
10197 bool IsNeon = UnitSize >= 8; in EmitStructByval()
10200 VecTRC = UnitSize == 16 ? &ARM::DPairRegClass in EmitStructByval()
10201 : UnitSize == 8 ? &ARM::DPRRegClass in EmitStructByval()
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/external/llvm-project/llvm/lib/Target/ARM/
DARMISelLowering.cpp10611 unsigned UnitSize = 0; in EmitStructByval() local
10620 UnitSize = 1; in EmitStructByval()
10622 UnitSize = 2; in EmitStructByval()
10628 UnitSize = 16; in EmitStructByval()
10630 UnitSize = 8; in EmitStructByval()
10633 if (UnitSize == 0) in EmitStructByval()
10634 UnitSize = 4; in EmitStructByval()
10638 bool IsNeon = UnitSize >= 8; in EmitStructByval()
10641 VecTRC = UnitSize == 16 ? &ARM::DPairRegClass in EmitStructByval()
10642 : UnitSize == 8 ? &ARM::DPRRegClass in EmitStructByval()
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