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Searched refs:VECREDUCE_FADD (Results 1 – 24 of 24) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/
Dlegalize-reduce-fadd.mir14 ; CHECK: [[VECREDUCE_FADD:%[0-9]+]]:_(s32) = G_VECREDUCE_FADD [[COPY]](<2 x s32>)
15 ; CHECK: $w0 = COPY [[VECREDUCE_FADD]](s32)
33 ; CHECK: [[VECREDUCE_FADD:%[0-9]+]]:_(s64) = G_VECREDUCE_FADD [[COPY]](<2 x s64>)
34 ; CHECK: $x0 = COPY [[VECREDUCE_FADD]](s64)
Dregbankselect-reductions.mir15 ; CHECK: [[VECREDUCE_FADD:%[0-9]+]]:fpr(s32) = G_VECREDUCE_FADD [[COPY]](<2 x s32>)
16 ; CHECK: $w0 = COPY [[VECREDUCE_FADD]](s32)
Dirtranslator-reductions.ll26 ; CHECK: [[VECREDUCE_FADD:%[0-9]+]]:_(s32) = reassoc G_VECREDUCE_FADD [[COPY1]](<4 x s32>)
27 ; CHECK: [[FADD:%[0-9]+]]:_(s32) = reassoc G_FADD [[COPY]], [[VECREDUCE_FADD]]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h931 VECREDUCE_FADD, VECREDUCE_FMUL, enumerator
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h1142 VECREDUCE_FADD, enumerator
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp484 case ISD::VECREDUCE_FADD: in LegalizeOp()
880 case ISD::VECREDUCE_FADD: in Expand()
DSelectionDAGDumper.cpp457 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; in getOperationName()
DLegalizeFloatTypes.cpp137 case ISD::VECREDUCE_FADD: in SoftenFloatResult()
2258 case ISD::VECREDUCE_FADD: in PromoteFloatResult()
2621 case ISD::VECREDUCE_FADD: in SoftPromoteHalfResult()
DLegalizeVectorTypes.cpp616 case ISD::VECREDUCE_FADD: in ScalarizeVectorOperand()
2117 case ISD::VECREDUCE_FADD: in SplitVectorOperand()
4389 case ISD::VECREDUCE_FADD: in WidenVectorOperand()
DLegalizeDAG.cpp1164 case ISD::VECREDUCE_FADD: in LegalizeOp()
3937 case ISD::VECREDUCE_FADD: in ExpandNode()
DSelectionDAG.cpp349 case ISD::VECREDUCE_FADD: in getVecReduceBaseOpcode()
DSelectionDAGBuilder.cpp9038 DAG.getNode(ISD::VECREDUCE_FADD, dl, VT, Op2, SDFlags), in visitVectorReduce()
DDAGCombiner.cpp1736 case ISD::VECREDUCE_FADD: in visit()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp436 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; in getOperationName()
DLegalizeVectorOps.cpp483 case ISD::VECREDUCE_FADD: in LegalizeOp()
987 case ISD::VECREDUCE_FADD: in Expand()
DLegalizeVectorTypes.cpp604 case ISD::VECREDUCE_FADD: in ScalarizeVectorOperand()
1984 case ISD::VECREDUCE_FADD: in SplitVectorOperand()
2070 case ISD::VECREDUCE_FADD: CombineOpc = ISD::FADD; break; in SplitVecOp_VECREDUCE()
4225 case ISD::VECREDUCE_FADD: in WidenVectorOperand()
4711 case ISD::VECREDUCE_FADD: in WidenVecOp_VECREDUCE()
DLegalizeDAG.cpp1148 case ISD::VECREDUCE_FADD: in LegalizeOp()
3797 case ISD::VECREDUCE_FADD: in ExpandNode()
DTargetLowering.cpp7611 case ISD::VECREDUCE_FADD: BaseOpcode = ISD::FADD; break; in expandVecReduce()
DSelectionDAGBuilder.cpp8969 DAG.getNode(ISD::VECREDUCE_FADD, dl, VT, Op2)); in visitVectorReduce()
DDAGCombiner.cpp1613 case ISD::VECREDUCE_FADD: in visit()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp712 setOperationAction(ISD::VECREDUCE_FADD, VT, Expand); in initActions()
/external/llvm-project/llvm/lib/CodeGen/
DTargetLoweringBase.cpp830 setOperationAction(ISD::VECREDUCE_FADD, VT, Expand); in initActions()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp1227 setOperationAction(ISD::VECREDUCE_FADD, VT, Custom); in AArch64TargetLowering()
1364 setOperationAction(ISD::VECREDUCE_FADD, VT, Custom); in addTypeForFixedLengthSVE()
4290 case ISD::VECREDUCE_FADD: in LowerOperation()
10209 Op.getOpcode() == ISD::VECREDUCE_FADD || in LowerVECREDUCE()
10235 case ISD::VECREDUCE_FADD: in LowerVECREDUCE()
/external/llvm-project/llvm/lib/Target/ARM/
DARMISelLowering.cpp356 setOperationAction(ISD::VECREDUCE_FADD, VT, Custom); in addMVEVectorTypes()
379 setOperationAction(ISD::VECREDUCE_FADD, MVT::v4f16, Custom); in addMVEVectorTypes()
383 setOperationAction(ISD::VECREDUCE_FADD, MVT::v2f16, Custom); in addMVEVectorTypes()
9531 case ISD::VECREDUCE_FADD: BaseOpcode = ISD::FADD; break; in LowerVecReduce()
9804 case ISD::VECREDUCE_FADD: in LowerOperation()