| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 268 VTM, enumerator
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| D | SystemZOperators.td | 262 def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp, [SDNPOutGlue]>;
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| D | SystemZInstrVector.td | 786 def VTM : CompareVRRa<"vtm", 0xE7D8, z_vtm, v128b, 0>;
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| D | SystemZISelLowering.cpp | 1360 Opcode = SystemZISD::VTM; in isIntrinsicWithCC()
4672 OPCODE(VTM); in getTargetNodeName()
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| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 273 VTM, enumerator
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| D | SystemZOperators.td | 363 def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>;
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| D | SystemZScheduleZ13.td | 1317 def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
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| D | SystemZScheduleZ14.td | 1339 def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
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| D | SystemZScheduleZ15.td | 1377 def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
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| D | SystemZInstrVector.td | 1027 def VTM : CompareVRRa<"vtm", 0xE7D8, z_vtm, v128b, 0>;
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| D | SystemZISelLowering.cpp | 1860 Opcode = SystemZISD::VTM; in isIntrinsicWithCC()
5648 OPCODE(VTM); in getTargetNodeName()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 272 VTM, enumerator
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| D | SystemZOperators.td | 358 def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>;
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| D | SystemZScheduleZ13.td | 1317 def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
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| D | SystemZInstrVector.td | 1000 def VTM : CompareVRRa<"vtm", 0xE7D8, z_vtm, v128b, 0>;
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| D | SystemZScheduleZ14.td | 1339 def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
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| D | SystemZScheduleZ15.td | 1377 def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
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| D | SystemZISelLowering.cpp | 1813 Opcode = SystemZISD::VTM; in isIntrinsicWithCC()
5392 OPCODE(VTM); in getTargetNodeName()
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | vec-intrinsics.ll | 1692 ; VTM with no processing of the result.
1703 ; VTM, storing to %ptr if all bits are set.
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| /external/llvm-project/llvm/test/CodeGen/SystemZ/ |
| D | vec-intrinsics-01.ll | 1710 ; VTM with no processing of the result.
1721 ; VTM, storing to %ptr if all bits are set.
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| /external/capstone/arch/SystemZ/ |
| D | SystemZGenAsmWriter.inc | 4888 33581178U, // VTM
7691 0U, // VTM
10494 0U, // VTM
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| D | SystemZGenDisassemblerTables.inc | 4485 /* 10518 */ MCD_OPC_Decode, 228, 20, 254, 1, // Opcode: VTM
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| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 5239 ,"RU","VTM","Vitim","Vitim","SA","1-------","RQ","0901",,"5925N 11234E",
7230 "X","SE","VTM","Vitem�lla","Vitemolla","M","1-------","XX","1301",,"5542N 01413E",""
11891 ,"US","VTM","Camden","Camden","NC","--3-----","RL","0901",,"3619N 07610W",
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| D | 2013-1_UNLOCODE_CodeListPart1.csv | 5519 ,"BE","VTM","Vottem","Vottem","WAL","--3--6--","RL","0901",,"5041N 00535E",
8187 ,"BR","VTM","Votorantim","Votorantim","SP","--3-----","RQ","0607",,,
16252 ,"CZ","VTM","Vratimov","Vratimov","MO","--3-----","RQ","0901",,,
31204 ,"ES","VTM","Vilatenim","Vilatenim","GI","--3-----","RQ","1001",,"4216N 00300E",
43113 ,"FR","VTM","Venteuil","Venteuil","51","1----6--","RQ","0907",,"4905N 00350E",
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| D | 2013-1_UNLOCODE_CodeListPart2.csv | 15414 ,"IT","VTM","Vertemate","Vertemate",,"--3-----","RQ","9704",,,
|