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Searched refs:ZERO_EXTEND (Results 1 – 25 of 144) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp565 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i1, 2 }, in getCastInstrCost()
567 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 1 }, in getCastInstrCost()
569 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, 1 }, in getCastInstrCost()
570 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 1 }, in getCastInstrCost()
573 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i32, 1 }, in getCastInstrCost()
618 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i1, 3 }, in getCastInstrCost()
620 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i1, 3 }, in getCastInstrCost()
622 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i8, 3 }, in getCastInstrCost()
624 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
626 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 1 }, in getCastInstrCost()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp183 {ISD::ZERO_EXTEND, MVT::i32, MVT::i16, 0}, in getCastInstrCost()
185 {ISD::ZERO_EXTEND, MVT::i32, MVT::i8, 0}, in getCastInstrCost()
187 {ISD::ZERO_EXTEND, MVT::i16, MVT::i8, 0}, in getCastInstrCost()
189 {ISD::ZERO_EXTEND, MVT::i64, MVT::i32, 1}, in getCastInstrCost()
191 {ISD::ZERO_EXTEND, MVT::i64, MVT::i16, 1}, in getCastInstrCost()
193 {ISD::ZERO_EXTEND, MVT::i64, MVT::i8, 1}, in getCastInstrCost()
201 {ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0}, in getCastInstrCost()
203 {ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 0}, in getCastInstrCost()
205 {ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 0}, in getCastInstrCost()
220 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
[all …]
DARMSelectionDAGInfo.cpp93 Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); in EmitSpecializedLibcall()
/external/llvm-project/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp1417 { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, in getCastInstrCost()
1433 { ISD::ZERO_EXTEND, MVT::v2i8, MVT::v2i1, 2 }, in getCastInstrCost()
1434 { ISD::ZERO_EXTEND, MVT::v2i16, MVT::v2i1, 2 }, in getCastInstrCost()
1435 { ISD::ZERO_EXTEND, MVT::v4i8, MVT::v4i1, 2 }, in getCastInstrCost()
1436 { ISD::ZERO_EXTEND, MVT::v4i16, MVT::v4i1, 2 }, in getCastInstrCost()
1437 { ISD::ZERO_EXTEND, MVT::v8i8, MVT::v8i1, 2 }, in getCastInstrCost()
1438 { ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i1, 2 }, in getCastInstrCost()
1439 { ISD::ZERO_EXTEND, MVT::v16i8, MVT::v16i1, 2 }, in getCastInstrCost()
1440 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, 2 }, in getCastInstrCost()
1441 { ISD::ZERO_EXTEND, MVT::v32i8, MVT::v32i1, 2 }, in getCastInstrCost()
[all …]
/external/llvm-project/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp436 {ISD::ZERO_EXTEND, MVT::i32, MVT::i16, 0}, in getCastInstrCost()
438 {ISD::ZERO_EXTEND, MVT::i32, MVT::i8, 0}, in getCastInstrCost()
440 {ISD::ZERO_EXTEND, MVT::i16, MVT::i8, 0}, in getCastInstrCost()
442 {ISD::ZERO_EXTEND, MVT::i64, MVT::i32, 1}, in getCastInstrCost()
444 {ISD::ZERO_EXTEND, MVT::i64, MVT::i16, 1}, in getCastInstrCost()
446 {ISD::ZERO_EXTEND, MVT::i64, MVT::i8, 1}, in getCastInstrCost()
454 {ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0}, in getCastInstrCost()
456 {ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 0}, in getCastInstrCost()
458 {ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 0}, in getCastInstrCost()
463 {ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 1}, in getCastInstrCost()
[all …]
DARMSelectionDAGInfo.cpp93 Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); in EmitSpecializedLibcall()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp1283 { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, in getCastInstrCost()
1294 { ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i1, 2 }, in getCastInstrCost()
1295 { ISD::ZERO_EXTEND, MVT::v16i8, MVT::v16i1, 2 }, in getCastInstrCost()
1296 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, 2 }, in getCastInstrCost()
1297 { ISD::ZERO_EXTEND, MVT::v32i8, MVT::v32i1, 2 }, in getCastInstrCost()
1298 { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i1, 2 }, in getCastInstrCost()
1299 { ISD::ZERO_EXTEND, MVT::v64i8, MVT::v64i1, 2 }, in getCastInstrCost()
1347 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i1, 2 }, in getCastInstrCost()
1349 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 1 }, in getCastInstrCost()
1351 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, 1 }, in getCastInstrCost()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp198 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
200 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i32, 2 }, in getCastInstrCost()
202 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
204 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 2 }, in getCastInstrCost()
206 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
208 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
210 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, in getCastInstrCost()
212 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
/external/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp106 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
108 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 1 }, in getCastInstrCost()
114 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
116 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
118 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
120 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
122 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
DARMSelectionDAGInfo.cpp94 Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); in EmitSpecializedLibcall()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp309 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
311 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i32, 2 }, in getCastInstrCost()
313 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
315 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 2 }, in getCastInstrCost()
317 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
319 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
321 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, in getCastInstrCost()
323 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp358 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
360 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i32, 2 }, in getCastInstrCost()
362 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
364 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 2 }, in getCastInstrCost()
366 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
368 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
370 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, in getCastInstrCost()
372 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1172 Elt = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt); in LowerCall()
1187 Elt0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt0); in LowerCall()
1188 Elt1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt1); in LowerCall()
1232 StoreVal = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal); in LowerCall()
1239 DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal); in LowerCall()
1251 DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal); in LowerCall()
1261 DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal); in LowerCall()
1302 unsigned opc = ISD::ZERO_EXTEND; in LowerCall()
2022 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Tmp3); in LowerSTOREi1()
2401 StoreVal = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, StoreVal); in LowerReturn()
[all …]
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h395 ZERO_EXTEND, enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp1135 Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteOperand()
1560 case ISD::ZERO_EXTEND: return visitZERO_EXTEND(N); in visit()
1667 case ISD::ZERO_EXTEND: in combine()
2013 if (!CN || Z.getOpcode() != ISD::ZERO_EXTEND) in foldAddSubBoolOfMaskedVal()
2148 TLI.isOperationLegal(ISD::ZERO_EXTEND, VT))) && in visitADDLike()
2151 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Not); in visitADDLike()
2371 if (V.getOpcode() == ISD::TRUNCATE || V.getOpcode() == ISD::ZERO_EXTEND) { in getAsCarry()
2475 SDValue ZExt = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)); in visitADDLikeCommutative()
2871 if (CarryIn.getOpcode() != ISD::ZERO_EXTEND) in combineCarryDiamond()
3200 if (N1.getOpcode() == ISD::ZERO_EXTEND && in visitSUB()
[all …]
DLegalizeDAG.cpp1544 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
2534 DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in PromoteLegalINT_TO_FP()
2543 DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in PromoteLegalINT_TO_FP()
2837 case ISD::ZERO_EXTEND: in ExpandNode()
3342 SDValue Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Halves[2 * i]); in ExpandNode()
3384 if (TLI.isOperationLegalOrCustom(ISD::ZERO_EXTEND, VT) && in ExpandNode()
3390 Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Lo); in ExpandNode()
3509 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, PairTy, Node->getOperand(0)); in ExpandNode()
4244 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0)); in PromoteNode()
4269 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0)); in PromoteNode()
[all …]
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp1244 Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteOperand()
1680 case ISD::ZERO_EXTEND: return visitZERO_EXTEND(N); in visit()
1792 case ISD::ZERO_EXTEND: in combine()
2198 if (!CN || Z.getOpcode() != ISD::ZERO_EXTEND) in foldAddSubBoolOfMaskedVal()
2334 TLI.isOperationLegal(ISD::ZERO_EXTEND, VT))) && in visitADDLike()
2337 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Not); in visitADDLike()
2574 if (V.getOpcode() == ISD::TRUNCATE || V.getOpcode() == ISD::ZERO_EXTEND) { in getAsCarry()
2678 SDValue ZExt = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)); in visitADDLikeCommutative()
3078 if (CarryIn.getOpcode() != ISD::ZERO_EXTEND) in combineCarryDiamond()
3411 if (N1.getOpcode() == ISD::ZERO_EXTEND && in visitSUB()
[all …]
DLegalizeDAG.cpp1576 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
2651 DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in PromoteLegalINT_TO_FP()
2660 DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in PromoteLegalINT_TO_FP()
2980 case ISD::ZERO_EXTEND: in ExpandNode()
3475 SDValue Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Halves[2 * i]); in ExpandNode()
3517 if (TLI.isOperationLegalOrCustom(ISD::ZERO_EXTEND, VT) && in ExpandNode()
3523 Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Lo); in ExpandNode()
3649 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, PairTy, Node->getOperand(0)); in ExpandNode()
4452 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0)); in PromoteNode()
4478 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0)); in PromoteNode()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h529 ZERO_EXTEND, enumerator
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h678 ZERO_EXTEND, enumerator
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp983 Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteOperand()
1396 case ISD::ZERO_EXTEND: return visitZERO_EXTEND(N); in visit()
1485 case ISD::ZERO_EXTEND: in combine()
1762 SDValue ZExt = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)); in visitADD()
2531 N0 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N0); in visitMULHU()
2532 N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N1); in visitMULHU()
2640 SDValue Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N->getOperand(0)); in visitUMUL_LOHI()
2641 SDValue Hi = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N->getOperand(1)); in visitUMUL_LOHI()
2721 if ((N0.getOpcode() == ISD::ZERO_EXTEND || in SimplifyBinOpWithSameOpcodeHands()
2999 return DAG.getNode(ISD::ZERO_EXTEND, SL, VT, And); in visitANDLike()
[all …]
DLegalizeDAG.cpp1478 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
2507 DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in PromoteLegalINT_TO_FP()
2845 case ISD::ZERO_EXTEND: in ExpandNode()
2848 RHS = DAG.getNode(ISD::ZERO_EXTEND, dl, OuterType, Node->getOperand(2)); in ExpandNode()
2853 RHS = DAG.getNode(ISD::ZERO_EXTEND, dl, OuterType, Node->getOperand(2)); in ExpandNode()
3307 if (TLI.isOperationLegalOrCustom(ISD::ZERO_EXTEND, VT) && in ExpandNode()
3312 Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Lo); in ExpandNode()
3384 { { ISD::MULHU, ISD::UMUL_LOHI, ISD::ZERO_EXTEND }, in ExpandNode()
3465 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, PairTy, Node->getOperand(0)); in ExpandNode()
4016 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0)); in PromoteNode()
[all …]
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp127 setOperationAction(ISD::ZERO_EXTEND, T, Custom); in initializeHVXLowering()
160 setOperationAction(ISD::ZERO_EXTEND, T, Custom); in initializeHVXLowering()
260 setOperationAction(ISD::ZERO_EXTEND, VecTy, Custom); in initializeHVXLowering()
1410 return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Op), ResTy, InpV); in LowerHvxAnyExt()
2053 case ISD::ZERO_EXTEND: in LowerHvxOperation()
2072 case ISD::ZERO_EXTEND: return LowerHvxZeroExt(Op, DAG); in LowerHvxOperation()
2104 case ISD::ZERO_EXTEND: in LowerHvxOperationWrapper()
2146 case ISD::ZERO_EXTEND: in ReplaceHvxNodeResults()
/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp681 if (Index.getOpcode() == ISD::ZERO_EXTEND) in selectBDVAddr12Only()
825 case ISD::ZERO_EXTEND: in expandRxSBG()
1272 case ISD::ZERO_EXTEND: in Select()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp103 setOperationAction(ISD::ZERO_EXTEND, T, Custom); in initializeHVXLowering()
136 setOperationAction(ISD::ZERO_EXTEND, T, Custom); in initializeHVXLowering()
1215 return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Op), ResTy, InpV); in LowerHvxAnyExt()
1554 case ISD::ZERO_EXTEND: in LowerHvxOperation()
1572 case ISD::ZERO_EXTEND: return LowerHvxZeroExt(Op, DAG); in LowerHvxOperation()

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