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Searched refs:_reg_PHY_PLL_CTRL (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/drivers/renesas/rcar/ddr/ddr_b/
Dboot_init_dram.c1144 reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), in regif_pll_wa()
1146 _reg_PHY_PLL_CTRL)); in regif_pll_wa()
1158 reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), in regif_pll_wa()
1163 _reg_PHY_PLL_CTRL)); in regif_pll_wa()
1402 ddrtbl_setval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_PLL_CTRL, in ddrtbl_load()
Dddr_regdef.h368 #define _reg_PHY_PLL_CTRL 0x00000168U macro
/external/arm-trusted-firmware/drivers/renesas/rzg/ddr/ddr_b/
Dddr_regdef.h370 #define _reg_PHY_PLL_CTRL 0x00000168U macro
Dboot_init_dram.c1046 reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), in regif_pll_wa()
1050 _reg_PHY_PLL_CTRL)); in regif_pll_wa()