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1 /*
2  * Copyright (c) 2018-2019, Renesas Electronics Corporation.
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #define _reg_PHY_DQ_DM_SWIZZLE0                            0x00000000U
9 #define _reg_PHY_DQ_DM_SWIZZLE1                            0x00000001U
10 #define _reg_PHY_CLK_WR_BYPASS_SLAVE_DELAY                 0x00000002U
11 #define _reg_PHY_RDDQS_GATE_BYPASS_SLAVE_DELAY             0x00000003U
12 #define _reg_PHY_BYPASS_TWO_CYC_PREAMBLE                   0x00000004U
13 #define _reg_PHY_CLK_BYPASS_OVERRIDE                       0x00000005U
14 #define _reg_PHY_SW_WRDQ0_SHIFT                            0x00000006U
15 #define _reg_PHY_SW_WRDQ1_SHIFT                            0x00000007U
16 #define _reg_PHY_SW_WRDQ2_SHIFT                            0x00000008U
17 #define _reg_PHY_SW_WRDQ3_SHIFT                            0x00000009U
18 #define _reg_PHY_SW_WRDQ4_SHIFT                            0x0000000aU
19 #define _reg_PHY_SW_WRDQ5_SHIFT                            0x0000000bU
20 #define _reg_PHY_SW_WRDQ6_SHIFT                            0x0000000cU
21 #define _reg_PHY_SW_WRDQ7_SHIFT                            0x0000000dU
22 #define _reg_PHY_SW_WRDM_SHIFT                             0x0000000eU
23 #define _reg_PHY_SW_WRDQS_SHIFT                            0x0000000fU
24 #define _reg_PHY_DQ_TSEL_ENABLE                            0x00000010U
25 #define _reg_PHY_DQ_TSEL_SELECT                            0x00000011U
26 #define _reg_PHY_DQS_TSEL_ENABLE                           0x00000012U
27 #define _reg_PHY_DQS_TSEL_SELECT                           0x00000013U
28 #define _reg_PHY_TWO_CYC_PREAMBLE                          0x00000014U
29 #define _reg_PHY_DBI_MODE                                  0x00000015U
30 #define _reg_PHY_PER_RANK_CS_MAP                           0x00000016U
31 #define _reg_PHY_PER_CS_TRAINING_MULTICAST_EN              0x00000017U
32 #define _reg_PHY_PER_CS_TRAINING_INDEX                     0x00000018U
33 #define _reg_PHY_LP4_BOOT_RDDATA_EN_IE_DLY                 0x00000019U
34 #define _reg_PHY_LP4_BOOT_RDDATA_EN_DLY                    0x0000001aU
35 #define _reg_PHY_LP4_BOOT_RDDATA_EN_TSEL_DLY               0x0000001bU
36 #define _reg_PHY_LP4_BOOT_RPTR_UPDATE                      0x0000001cU
37 #define _reg_PHY_LP4_BOOT_RDDQS_GATE_SLAVE_DELAY           0x0000001dU
38 #define _reg_PHY_LP4_BOOT_RDDQS_LATENCY_ADJUST             0x0000001eU
39 #define _reg_PHY_LP4_BOOT_WRPATH_GATE_DISABLE              0x0000001fU
40 #define _reg_PHY_LP4_BOOT_RDDATA_EN_OE_DLY                 0x00000020U
41 #define _reg_PHY_LPBK_CONTROL                              0x00000021U
42 #define _reg_PHY_LPBK_DFX_TIMEOUT_EN                       0x00000022U
43 #define _reg_PHY_AUTO_TIMING_MARGIN_CONTROL                0x00000023U
44 #define _reg_PHY_AUTO_TIMING_MARGIN_OBS                    0x00000024U
45 #define _reg_PHY_SLICE_PWR_RDC_DISABLE                     0x00000025U
46 #define _reg_PHY_PRBS_PATTERN_START                        0x00000026U
47 #define _reg_PHY_PRBS_PATTERN_MASK                         0x00000027U
48 #define _reg_PHY_RDDQS_DQ_BYPASS_SLAVE_DELAY               0x00000028U
49 #define _reg_PHY_GATE_ERROR_DELAY_SELECT                   0x00000029U
50 #define _reg_SC_PHY_SNAP_OBS_REGS                          0x0000002aU
51 #define _reg_PHY_LPDDR                                     0x0000002bU
52 #define _reg_PHY_LPDDR_TYPE                                0x0000002cU
53 #define _reg_PHY_GATE_SMPL1_SLAVE_DELAY                    0x0000002dU
54 #define _reg_PHY_GATE_SMPL2_SLAVE_DELAY                    0x0000002eU
55 #define _reg_ON_FLY_GATE_ADJUST_EN                         0x0000002fU
56 #define _reg_PHY_GATE_TRACKING_OBS                         0x00000030U
57 #define _reg_PHY_DFI40_POLARITY                            0x00000031U
58 #define _reg_PHY_LP4_PST_AMBLE                             0x00000032U
59 #define _reg_PHY_RDLVL_PATT8                               0x00000033U
60 #define _reg_PHY_RDLVL_PATT9                               0x00000034U
61 #define _reg_PHY_RDLVL_PATT10                              0x00000035U
62 #define _reg_PHY_RDLVL_PATT11                              0x00000036U
63 #define _reg_PHY_LP4_RDLVL_PATT8                           0x00000037U
64 #define _reg_PHY_LP4_RDLVL_PATT9                           0x00000038U
65 #define _reg_PHY_LP4_RDLVL_PATT10                          0x00000039U
66 #define _reg_PHY_LP4_RDLVL_PATT11                          0x0000003aU
67 #define _reg_PHY_SLAVE_LOOP_CNT_UPDATE                     0x0000003bU
68 #define _reg_PHY_SW_FIFO_PTR_RST_DISABLE                   0x0000003cU
69 #define _reg_PHY_MASTER_DLY_LOCK_OBS_SELECT                0x0000003dU
70 #define _reg_PHY_RDDQ_ENC_OBS_SELECT                       0x0000003eU
71 #define _reg_PHY_RDDQS_DQ_ENC_OBS_SELECT                   0x0000003fU
72 #define _reg_PHY_WR_ENC_OBS_SELECT                         0x00000040U
73 #define _reg_PHY_WR_SHIFT_OBS_SELECT                       0x00000041U
74 #define _reg_PHY_FIFO_PTR_OBS_SELECT                       0x00000042U
75 #define _reg_PHY_LVL_DEBUG_MODE                            0x00000043U
76 #define _reg_SC_PHY_LVL_DEBUG_CONT                         0x00000044U
77 #define _reg_PHY_WRLVL_CAPTURE_CNT                         0x00000045U
78 #define _reg_PHY_WRLVL_UPDT_WAIT_CNT                       0x00000046U
79 #define _reg_PHY_WRLVL_DQ_MASK                             0x00000047U
80 #define _reg_PHY_GTLVL_CAPTURE_CNT                         0x00000048U
81 #define _reg_PHY_GTLVL_UPDT_WAIT_CNT                       0x00000049U
82 #define _reg_PHY_RDLVL_CAPTURE_CNT                         0x0000004aU
83 #define _reg_PHY_RDLVL_UPDT_WAIT_CNT                       0x0000004bU
84 #define _reg_PHY_RDLVL_OP_MODE                             0x0000004cU
85 #define _reg_PHY_RDLVL_RDDQS_DQ_OBS_SELECT                 0x0000004dU
86 #define _reg_PHY_RDLVL_DATA_MASK                           0x0000004eU
87 #define _reg_PHY_RDLVL_DATA_SWIZZLE                        0x0000004fU
88 #define _reg_PHY_WDQLVL_BURST_CNT                          0x00000050U
89 #define _reg_PHY_WDQLVL_PATT                               0x00000051U
90 #define _reg_PHY_WDQLVL_DQDM_SLV_DLY_JUMP_OFFSET           0x00000052U
91 #define _reg_PHY_WDQLVL_UPDT_WAIT_CNT                      0x00000053U
92 #define _reg_PHY_WDQLVL_DQDM_OBS_SELECT                    0x00000054U
93 #define _reg_PHY_WDQLVL_QTR_DLY_STEP                       0x00000055U
94 #define _reg_SC_PHY_WDQLVL_CLR_PREV_RESULTS                0x00000056U
95 #define _reg_PHY_WDQLVL_CLR_PREV_RESULTS                   0x00000057U
96 #define _reg_PHY_WDQLVL_DATADM_MASK                        0x00000058U
97 #define _reg_PHY_USER_PATT0                                0x00000059U
98 #define _reg_PHY_USER_PATT1                                0x0000005aU
99 #define _reg_PHY_USER_PATT2                                0x0000005bU
100 #define _reg_PHY_USER_PATT3                                0x0000005cU
101 #define _reg_PHY_USER_PATT4                                0x0000005dU
102 #define _reg_PHY_DQ_SWIZZLING                              0x0000005eU
103 #define _reg_PHY_CALVL_VREF_DRIVING_SLICE                  0x0000005fU
104 #define _reg_SC_PHY_MANUAL_CLEAR                           0x00000060U
105 #define _reg_PHY_FIFO_PTR_OBS                              0x00000061U
106 #define _reg_PHY_LPBK_RESULT_OBS                           0x00000062U
107 #define _reg_PHY_LPBK_ERROR_COUNT_OBS                      0x00000063U
108 #define _reg_PHY_MASTER_DLY_LOCK_OBS                       0x00000064U
109 #define _reg_PHY_RDDQ_SLV_DLY_ENC_OBS                      0x00000065U
110 #define _reg_PHY_RDDQS_BASE_SLV_DLY_ENC_OBS                0x00000066U
111 #define _reg_PHY_RDDQS_DQ_RISE_ADDER_SLV_DLY_ENC_OBS       0x00000067U
112 #define _reg_PHY_RDDQS_DQ_FALL_ADDER_SLV_DLY_ENC_OBS       0x00000068U
113 #define _reg_PHY_RDDQS_GATE_SLV_DLY_ENC_OBS                0x00000069U
114 #define _reg_PHY_WRDQS_BASE_SLV_DLY_ENC_OBS                0x0000006aU
115 #define _reg_PHY_WRDQ_BASE_SLV_DLY_ENC_OBS                 0x0000006bU
116 #define _reg_PHY_WR_ADDER_SLV_DLY_ENC_OBS                  0x0000006cU
117 #define _reg_PHY_WR_SHIFT_OBS                              0x0000006dU
118 #define _reg_PHY_WRLVL_HARD0_DELAY_OBS                     0x0000006eU
119 #define _reg_PHY_WRLVL_HARD1_DELAY_OBS                     0x0000006fU
120 #define _reg_PHY_WRLVL_STATUS_OBS                          0x00000070U
121 #define _reg_PHY_GATE_SMPL1_SLV_DLY_ENC_OBS                0x00000071U
122 #define _reg_PHY_GATE_SMPL2_SLV_DLY_ENC_OBS                0x00000072U
123 #define _reg_PHY_WRLVL_ERROR_OBS                           0x00000073U
124 #define _reg_PHY_GTLVL_HARD0_DELAY_OBS                     0x00000074U
125 #define _reg_PHY_GTLVL_HARD1_DELAY_OBS                     0x00000075U
126 #define _reg_PHY_GTLVL_STATUS_OBS                          0x00000076U
127 #define _reg_PHY_RDLVL_RDDQS_DQ_LE_DLY_OBS                 0x00000077U
128 #define _reg_PHY_RDLVL_RDDQS_DQ_TE_DLY_OBS                 0x00000078U
129 #define _reg_PHY_RDLVL_RDDQS_DQ_NUM_WINDOWS_OBS            0x00000079U
130 #define _reg_PHY_RDLVL_STATUS_OBS                          0x0000007aU
131 #define _reg_PHY_WDQLVL_DQDM_LE_DLY_OBS                    0x0000007bU
132 #define _reg_PHY_WDQLVL_DQDM_TE_DLY_OBS                    0x0000007cU
133 #define _reg_PHY_WDQLVL_STATUS_OBS                         0x0000007dU
134 #define _reg_PHY_DDL_MODE                                  0x0000007eU
135 #define _reg_PHY_DDL_TEST_OBS                              0x0000007fU
136 #define _reg_PHY_DDL_TEST_MSTR_DLY_OBS                     0x00000080U
137 #define _reg_PHY_DDL_TRACK_UPD_THRESHOLD                   0x00000081U
138 #define _reg_PHY_LP4_WDQS_OE_EXTEND                        0x00000082U
139 #define _reg_SC_PHY_RX_CAL_START                           0x00000083U
140 #define _reg_PHY_RX_CAL_OVERRIDE                           0x00000084U
141 #define _reg_PHY_RX_CAL_SAMPLE_WAIT                        0x00000085U
142 #define _reg_PHY_RX_CAL_DQ0                                0x00000086U
143 #define _reg_PHY_RX_CAL_DQ1                                0x00000087U
144 #define _reg_PHY_RX_CAL_DQ2                                0x00000088U
145 #define _reg_PHY_RX_CAL_DQ3                                0x00000089U
146 #define _reg_PHY_RX_CAL_DQ4                                0x0000008aU
147 #define _reg_PHY_RX_CAL_DQ5                                0x0000008bU
148 #define _reg_PHY_RX_CAL_DQ6                                0x0000008cU
149 #define _reg_PHY_RX_CAL_DQ7                                0x0000008dU
150 #define _reg_PHY_RX_CAL_DM                                 0x0000008eU
151 #define _reg_PHY_RX_CAL_DQS                                0x0000008fU
152 #define _reg_PHY_RX_CAL_FDBK                               0x00000090U
153 #define _reg_PHY_RX_CAL_OBS                                0x00000091U
154 #define _reg_PHY_RX_CAL_LOCK_OBS                           0x00000092U
155 #define _reg_PHY_RX_CAL_DISABLE                            0x00000093U
156 #define _reg_PHY_CLK_WRDQ0_SLAVE_DELAY                     0x00000094U
157 #define _reg_PHY_CLK_WRDQ1_SLAVE_DELAY                     0x00000095U
158 #define _reg_PHY_CLK_WRDQ2_SLAVE_DELAY                     0x00000096U
159 #define _reg_PHY_CLK_WRDQ3_SLAVE_DELAY                     0x00000097U
160 #define _reg_PHY_CLK_WRDQ4_SLAVE_DELAY                     0x00000098U
161 #define _reg_PHY_CLK_WRDQ5_SLAVE_DELAY                     0x00000099U
162 #define _reg_PHY_CLK_WRDQ6_SLAVE_DELAY                     0x0000009aU
163 #define _reg_PHY_CLK_WRDQ7_SLAVE_DELAY                     0x0000009bU
164 #define _reg_PHY_CLK_WRDM_SLAVE_DELAY                      0x0000009cU
165 #define _reg_PHY_CLK_WRDQS_SLAVE_DELAY                     0x0000009dU
166 #define _reg_PHY_WRLVL_THRESHOLD_ADJUST                    0x0000009eU
167 #define _reg_PHY_RDDQ0_SLAVE_DELAY                         0x0000009fU
168 #define _reg_PHY_RDDQ1_SLAVE_DELAY                         0x000000a0U
169 #define _reg_PHY_RDDQ2_SLAVE_DELAY                         0x000000a1U
170 #define _reg_PHY_RDDQ3_SLAVE_DELAY                         0x000000a2U
171 #define _reg_PHY_RDDQ4_SLAVE_DELAY                         0x000000a3U
172 #define _reg_PHY_RDDQ5_SLAVE_DELAY                         0x000000a4U
173 #define _reg_PHY_RDDQ6_SLAVE_DELAY                         0x000000a5U
174 #define _reg_PHY_RDDQ7_SLAVE_DELAY                         0x000000a6U
175 #define _reg_PHY_RDDM_SLAVE_DELAY                          0x000000a7U
176 #define _reg_PHY_RDDQS_DQ0_RISE_SLAVE_DELAY                0x000000a8U
177 #define _reg_PHY_RDDQS_DQ0_FALL_SLAVE_DELAY                0x000000a9U
178 #define _reg_PHY_RDDQS_DQ1_RISE_SLAVE_DELAY                0x000000aaU
179 #define _reg_PHY_RDDQS_DQ1_FALL_SLAVE_DELAY                0x000000abU
180 #define _reg_PHY_RDDQS_DQ2_RISE_SLAVE_DELAY                0x000000acU
181 #define _reg_PHY_RDDQS_DQ2_FALL_SLAVE_DELAY                0x000000adU
182 #define _reg_PHY_RDDQS_DQ3_RISE_SLAVE_DELAY                0x000000aeU
183 #define _reg_PHY_RDDQS_DQ3_FALL_SLAVE_DELAY                0x000000afU
184 #define _reg_PHY_RDDQS_DQ4_RISE_SLAVE_DELAY                0x000000b0U
185 #define _reg_PHY_RDDQS_DQ4_FALL_SLAVE_DELAY                0x000000b1U
186 #define _reg_PHY_RDDQS_DQ5_RISE_SLAVE_DELAY                0x000000b2U
187 #define _reg_PHY_RDDQS_DQ5_FALL_SLAVE_DELAY                0x000000b3U
188 #define _reg_PHY_RDDQS_DQ6_RISE_SLAVE_DELAY                0x000000b4U
189 #define _reg_PHY_RDDQS_DQ6_FALL_SLAVE_DELAY                0x000000b5U
190 #define _reg_PHY_RDDQS_DQ7_RISE_SLAVE_DELAY                0x000000b6U
191 #define _reg_PHY_RDDQS_DQ7_FALL_SLAVE_DELAY                0x000000b7U
192 #define _reg_PHY_RDDQS_DM_RISE_SLAVE_DELAY                 0x000000b8U
193 #define _reg_PHY_RDDQS_DM_FALL_SLAVE_DELAY                 0x000000b9U
194 #define _reg_PHY_RDDQS_GATE_SLAVE_DELAY                    0x000000baU
195 #define _reg_PHY_RDDQS_LATENCY_ADJUST                      0x000000bbU
196 #define _reg_PHY_WRITE_PATH_LAT_ADD                        0x000000bcU
197 #define _reg_PHY_WRLVL_DELAY_EARLY_THRESHOLD               0x000000bdU
198 #define _reg_PHY_WRLVL_DELAY_PERIOD_THRESHOLD              0x000000beU
199 #define _reg_PHY_WRLVL_EARLY_FORCE_ZERO                    0x000000bfU
200 #define _reg_PHY_GTLVL_RDDQS_SLV_DLY_START                 0x000000c0U
201 #define _reg_PHY_GTLVL_LAT_ADJ_START                       0x000000c1U
202 #define _reg_PHY_WDQLVL_DQDM_SLV_DLY_START                 0x000000c2U
203 #define _reg_PHY_RDLVL_RDDQS_DQ_SLV_DLY_START              0x000000c3U
204 #define _reg_PHY_FDBK_PWR_CTRL                             0x000000c4U
205 #define _reg_PHY_DQ_OE_TIMING                              0x000000c5U
206 #define _reg_PHY_DQ_TSEL_RD_TIMING                         0x000000c6U
207 #define _reg_PHY_DQ_TSEL_WR_TIMING                         0x000000c7U
208 #define _reg_PHY_DQS_OE_TIMING                             0x000000c8U
209 #define _reg_PHY_DQS_TSEL_RD_TIMING                        0x000000c9U
210 #define _reg_PHY_DQS_OE_RD_TIMING                          0x000000caU
211 #define _reg_PHY_DQS_TSEL_WR_TIMING                        0x000000cbU
212 #define _reg_PHY_PER_CS_TRAINING_EN                        0x000000ccU
213 #define _reg_PHY_DQ_IE_TIMING                              0x000000cdU
214 #define _reg_PHY_DQS_IE_TIMING                             0x000000ceU
215 #define _reg_PHY_RDDATA_EN_IE_DLY                          0x000000cfU
216 #define _reg_PHY_IE_MODE                                   0x000000d0U
217 #define _reg_PHY_RDDATA_EN_DLY                             0x000000d1U
218 #define _reg_PHY_RDDATA_EN_TSEL_DLY                        0x000000d2U
219 #define _reg_PHY_RDDATA_EN_OE_DLY                          0x000000d3U
220 #define _reg_PHY_SW_MASTER_MODE                            0x000000d4U
221 #define _reg_PHY_MASTER_DELAY_START                        0x000000d5U
222 #define _reg_PHY_MASTER_DELAY_STEP                         0x000000d6U
223 #define _reg_PHY_MASTER_DELAY_WAIT                         0x000000d7U
224 #define _reg_PHY_MASTER_DELAY_HALF_MEASURE                 0x000000d8U
225 #define _reg_PHY_RPTR_UPDATE                               0x000000d9U
226 #define _reg_PHY_WRLVL_DLY_STEP                            0x000000daU
227 #define _reg_PHY_WRLVL_RESP_WAIT_CNT                       0x000000dbU
228 #define _reg_PHY_GTLVL_DLY_STEP                            0x000000dcU
229 #define _reg_PHY_GTLVL_RESP_WAIT_CNT                       0x000000ddU
230 #define _reg_PHY_GTLVL_BACK_STEP                           0x000000deU
231 #define _reg_PHY_GTLVL_FINAL_STEP                          0x000000dfU
232 #define _reg_PHY_WDQLVL_DLY_STEP                           0x000000e0U
233 #define _reg_PHY_TOGGLE_PRE_SUPPORT                        0x000000e1U
234 #define _reg_PHY_RDLVL_DLY_STEP                            0x000000e2U
235 #define _reg_PHY_WRPATH_GATE_DISABLE                       0x000000e3U
236 #define _reg_PHY_WRPATH_GATE_TIMING                        0x000000e4U
237 #define _reg_PHY_ADR0_SW_WRADDR_SHIFT                      0x000000e5U
238 #define _reg_PHY_ADR1_SW_WRADDR_SHIFT                      0x000000e6U
239 #define _reg_PHY_ADR2_SW_WRADDR_SHIFT                      0x000000e7U
240 #define _reg_PHY_ADR3_SW_WRADDR_SHIFT                      0x000000e8U
241 #define _reg_PHY_ADR4_SW_WRADDR_SHIFT                      0x000000e9U
242 #define _reg_PHY_ADR5_SW_WRADDR_SHIFT                      0x000000eaU
243 #define _reg_PHY_ADR_CLK_WR_BYPASS_SLAVE_DELAY             0x000000ebU
244 #define _reg_PHY_ADR_CLK_BYPASS_OVERRIDE                   0x000000ecU
245 #define _reg_SC_PHY_ADR_MANUAL_CLEAR                       0x000000edU
246 #define _reg_PHY_ADR_LPBK_RESULT_OBS                       0x000000eeU
247 #define _reg_PHY_ADR_LPBK_ERROR_COUNT_OBS                  0x000000efU
248 #define _reg_PHY_ADR_MASTER_DLY_LOCK_OBS_SELECT            0x000000f0U
249 #define _reg_PHY_ADR_MASTER_DLY_LOCK_OBS                   0x000000f1U
250 #define _reg_PHY_ADR_BASE_SLV_DLY_ENC_OBS                  0x000000f2U
251 #define _reg_PHY_ADR_ADDER_SLV_DLY_ENC_OBS                 0x000000f3U
252 #define _reg_PHY_ADR_SLAVE_LOOP_CNT_UPDATE                 0x000000f4U
253 #define _reg_PHY_ADR_SLV_DLY_ENC_OBS_SELECT                0x000000f5U
254 #define _reg_SC_PHY_ADR_SNAP_OBS_REGS                      0x000000f6U
255 #define _reg_PHY_ADR_TSEL_ENABLE                           0x000000f7U
256 #define _reg_PHY_ADR_LPBK_CONTROL                          0x000000f8U
257 #define _reg_PHY_ADR_PRBS_PATTERN_START                    0x000000f9U
258 #define _reg_PHY_ADR_PRBS_PATTERN_MASK                     0x000000faU
259 #define _reg_PHY_ADR_PWR_RDC_DISABLE                       0x000000fbU
260 #define _reg_PHY_ADR_TYPE                                  0x000000fcU
261 #define _reg_PHY_ADR_WRADDR_SHIFT_OBS                      0x000000fdU
262 #define _reg_PHY_ADR_IE_MODE                               0x000000feU
263 #define _reg_PHY_ADR_DDL_MODE                              0x000000ffU
264 #define _reg_PHY_ADR_DDL_TEST_OBS                          0x00000100U
265 #define _reg_PHY_ADR_DDL_TEST_MSTR_DLY_OBS                 0x00000101U
266 #define _reg_PHY_ADR_CALVL_START                           0x00000102U
267 #define _reg_PHY_ADR_CALVL_COARSE_DLY                      0x00000103U
268 #define _reg_PHY_ADR_CALVL_QTR                             0x00000104U
269 #define _reg_PHY_ADR_CALVL_SWIZZLE0                        0x00000105U
270 #define _reg_PHY_ADR_CALVL_SWIZZLE1                        0x00000106U
271 #define _reg_PHY_ADR_CALVL_SWIZZLE0_0                      0x00000107U
272 #define _reg_PHY_ADR_CALVL_SWIZZLE1_0                      0x00000108U
273 #define _reg_PHY_ADR_CALVL_SWIZZLE0_1                      0x00000109U
274 #define _reg_PHY_ADR_CALVL_SWIZZLE1_1                      0x0000010aU
275 #define _reg_PHY_ADR_CALVL_DEVICE_MAP                      0x0000010bU
276 #define _reg_PHY_ADR_CALVL_RANK_CTRL                       0x0000010cU
277 #define _reg_PHY_ADR_CALVL_NUM_PATTERNS                    0x0000010dU
278 #define _reg_PHY_ADR_CALVL_CAPTURE_CNT                     0x0000010eU
279 #define _reg_PHY_ADR_CALVL_RESP_WAIT_CNT                   0x0000010fU
280 #define _reg_PHY_ADR_CALVL_DEBUG_MODE                      0x00000110U
281 #define _reg_SC_PHY_ADR_CALVL_DEBUG_CONT                   0x00000111U
282 #define _reg_SC_PHY_ADR_CALVL_ERROR_CLR                    0x00000112U
283 #define _reg_PHY_ADR_CALVL_OBS_SELECT                      0x00000113U
284 #define _reg_PHY_ADR_CALVL_OBS0                            0x00000114U
285 #define _reg_PHY_ADR_CALVL_OBS1                            0x00000115U
286 #define _reg_PHY_ADR_CALVL_RESULT                          0x00000116U
287 #define _reg_PHY_ADR_CALVL_FG_0                            0x00000117U
288 #define _reg_PHY_ADR_CALVL_BG_0                            0x00000118U
289 #define _reg_PHY_ADR_CALVL_FG_1                            0x00000119U
290 #define _reg_PHY_ADR_CALVL_BG_1                            0x0000011aU
291 #define _reg_PHY_ADR_CALVL_FG_2                            0x0000011bU
292 #define _reg_PHY_ADR_CALVL_BG_2                            0x0000011cU
293 #define _reg_PHY_ADR_CALVL_FG_3                            0x0000011dU
294 #define _reg_PHY_ADR_CALVL_BG_3                            0x0000011eU
295 #define _reg_PHY_ADR_ADDR_SEL                              0x0000011fU
296 #define _reg_PHY_ADR_LP4_BOOT_SLV_DELAY                    0x00000120U
297 #define _reg_PHY_ADR_BIT_MASK                              0x00000121U
298 #define _reg_PHY_ADR_SEG_MASK                              0x00000122U
299 #define _reg_PHY_ADR_CALVL_TRAIN_MASK                      0x00000123U
300 #define _reg_PHY_ADR_CSLVL_TRAIN_MASK                      0x00000124U
301 #define _reg_PHY_ADR_SW_TXIO_CTRL                          0x00000125U
302 #define _reg_PHY_ADR_TSEL_SELECT                           0x00000126U
303 #define _reg_PHY_ADR0_CLK_WR_SLAVE_DELAY                   0x00000127U
304 #define _reg_PHY_ADR1_CLK_WR_SLAVE_DELAY                   0x00000128U
305 #define _reg_PHY_ADR2_CLK_WR_SLAVE_DELAY                   0x00000129U
306 #define _reg_PHY_ADR3_CLK_WR_SLAVE_DELAY                   0x0000012aU
307 #define _reg_PHY_ADR4_CLK_WR_SLAVE_DELAY                   0x0000012bU
308 #define _reg_PHY_ADR5_CLK_WR_SLAVE_DELAY                   0x0000012cU
309 #define _reg_PHY_ADR_SW_MASTER_MODE                        0x0000012dU
310 #define _reg_PHY_ADR_MASTER_DELAY_START                    0x0000012eU
311 #define _reg_PHY_ADR_MASTER_DELAY_STEP                     0x0000012fU
312 #define _reg_PHY_ADR_MASTER_DELAY_WAIT                     0x00000130U
313 #define _reg_PHY_ADR_MASTER_DELAY_HALF_MEASURE             0x00000131U
314 #define _reg_PHY_ADR_CALVL_DLY_STEP                        0x00000132U
315 #define _reg_PHY_FREQ_SEL                                  0x00000133U
316 #define _reg_PHY_FREQ_SEL_FROM_REGIF                       0x00000134U
317 #define _reg_PHY_FREQ_SEL_MULTICAST_EN                     0x00000135U
318 #define _reg_PHY_FREQ_SEL_INDEX                            0x00000136U
319 #define _reg_PHY_SW_GRP_SHIFT_0                            0x00000137U
320 #define _reg_PHY_SW_GRP_SHIFT_1                            0x00000138U
321 #define _reg_PHY_SW_GRP_SHIFT_2                            0x00000139U
322 #define _reg_PHY_SW_GRP_SHIFT_3                            0x0000013aU
323 #define _reg_PHY_GRP_BYPASS_SLAVE_DELAY                    0x0000013bU
324 #define _reg_PHY_SW_GRP_BYPASS_SHIFT                       0x0000013cU
325 #define _reg_PHY_GRP_BYPASS_OVERRIDE                       0x0000013dU
326 #define _reg_SC_PHY_MANUAL_UPDATE                          0x0000013eU
327 #define _reg_SC_PHY_MANUAL_UPDATE_PHYUPD_ENABLE            0x0000013fU
328 #define _reg_PHY_LP4_BOOT_DISABLE                          0x00000140U
329 #define _reg_PHY_CSLVL_ENABLE                              0x00000141U
330 #define _reg_PHY_CSLVL_CS_MAP                              0x00000142U
331 #define _reg_PHY_CSLVL_START                               0x00000143U
332 #define _reg_PHY_CSLVL_QTR                                 0x00000144U
333 #define _reg_PHY_CSLVL_COARSE_CHK                          0x00000145U
334 #define _reg_PHY_CSLVL_CAPTURE_CNT                         0x00000146U
335 #define _reg_PHY_CSLVL_COARSE_DLY                          0x00000147U
336 #define _reg_PHY_CSLVL_COARSE_CAPTURE_CNT                  0x00000148U
337 #define _reg_PHY_CSLVL_DEBUG_MODE                          0x00000149U
338 #define _reg_SC_PHY_CSLVL_DEBUG_CONT                       0x0000014aU
339 #define _reg_SC_PHY_CSLVL_ERROR_CLR                        0x0000014bU
340 #define _reg_PHY_CSLVL_OBS0                                0x0000014cU
341 #define _reg_PHY_CSLVL_OBS1                                0x0000014dU
342 #define _reg_PHY_CALVL_CS_MAP                              0x0000014eU
343 #define _reg_PHY_GRP_SLV_DLY_ENC_OBS_SELECT                0x0000014fU
344 #define _reg_PHY_GRP_SHIFT_OBS_SELECT                      0x00000150U
345 #define _reg_PHY_GRP_SLV_DLY_ENC_OBS                       0x00000151U
346 #define _reg_PHY_GRP_SHIFT_OBS                             0x00000152U
347 #define _reg_PHY_ADRCTL_SLAVE_LOOP_CNT_UPDATE              0x00000153U
348 #define _reg_PHY_ADRCTL_SNAP_OBS_REGS                      0x00000154U
349 #define _reg_PHY_DFI_PHYUPD_TYPE                           0x00000155U
350 #define _reg_PHY_ADRCTL_LPDDR                              0x00000156U
351 #define _reg_PHY_LP4_ACTIVE                                0x00000157U
352 #define _reg_PHY_LPDDR3_CS                                 0x00000158U
353 #define _reg_PHY_CALVL_RESULT_MASK                         0x00000159U
354 #define _reg_SC_PHY_UPDATE_CLK_CAL_VALUES                  0x0000015aU
355 #define _reg_PHY_SW_TXIO_CTRL_0                            0x0000015bU
356 #define _reg_PHY_SW_TXIO_CTRL_1                            0x0000015cU
357 #define _reg_PHY_SW_TXIO_CTRL_2                            0x0000015dU
358 #define _reg_PHY_SW_TXIO_CTRL_3                            0x0000015eU
359 #define _reg_PHY_MEMCLK_SW_TXIO_CTRL                       0x0000015fU
360 #define _reg_PHY_CA_SW_TXPWR_CTRL                          0x00000160U
361 #define _reg_PHY_MEMCLK_SW_TXPWR_CTRL                      0x00000161U
362 #define _reg_PHY_USER_DEF_REG_AC_0                         0x00000162U
363 #define _reg_PHY_USER_DEF_REG_AC_1                         0x00000163U
364 #define _reg_PHY_USER_DEF_REG_AC_2                         0x00000164U
365 #define _reg_PHY_USER_DEF_REG_AC_3                         0x00000165U
366 #define _reg_PHY_UPDATE_CLK_CAL_VALUES                     0x00000166U
367 #define _reg_PHY_CONTINUOUS_CLK_CAL_UPDATE                 0x00000167U
368 #define _reg_PHY_PLL_CTRL                                  0x00000168U
369 #define _reg_PHY_PLL_CTRL_TOP                              0x00000169U
370 #define _reg_PHY_PLL_CTRL_CA                               0x0000016aU
371 #define _reg_PHY_PLL_BYPASS                                0x0000016bU
372 #define _reg_PHY_LOW_FREQ_SEL                              0x0000016cU
373 #define _reg_PHY_PAD_VREF_CTRL_DQ_0                        0x0000016dU
374 #define _reg_PHY_PAD_VREF_CTRL_DQ_1                        0x0000016eU
375 #define _reg_PHY_PAD_VREF_CTRL_DQ_2                        0x0000016fU
376 #define _reg_PHY_PAD_VREF_CTRL_DQ_3                        0x00000170U
377 #define _reg_PHY_PAD_VREF_CTRL_AC                          0x00000171U
378 #define _reg_PHY_CSLVL_DLY_STEP                            0x00000172U
379 #define _reg_PHY_SET_DFI_INPUT_0                           0x00000173U
380 #define _reg_PHY_SET_DFI_INPUT_1                           0x00000174U
381 #define _reg_PHY_SET_DFI_INPUT_2                           0x00000175U
382 #define _reg_PHY_SET_DFI_INPUT_3                           0x00000176U
383 #define _reg_PHY_GRP_SLAVE_DELAY_0                         0x00000177U
384 #define _reg_PHY_GRP_SLAVE_DELAY_1                         0x00000178U
385 #define _reg_PHY_GRP_SLAVE_DELAY_2                         0x00000179U
386 #define _reg_PHY_GRP_SLAVE_DELAY_3                         0x0000017aU
387 #define _reg_PHY_CS_ACS_ALLOCATION_0                       0x0000017bU
388 #define _reg_PHY_CS_ACS_ALLOCATION_1                       0x0000017cU
389 #define _reg_PHY_CS_ACS_ALLOCATION_2                       0x0000017dU
390 #define _reg_PHY_CS_ACS_ALLOCATION_3                       0x0000017eU
391 #define _reg_PHY_LP4_BOOT_PLL_CTRL                         0x0000017fU
392 #define _reg_PHY_LP4_BOOT_PLL_CTRL_CA                      0x00000180U
393 #define _reg_PHY_LP4_BOOT_TOP_PLL_CTRL                     0x00000181U
394 #define _reg_PHY_PLL_CTRL_OVERRIDE                         0x00000182U
395 #define _reg_PHY_PLL_WAIT                                  0x00000183U
396 #define _reg_PHY_PLL_WAIT_TOP                              0x00000184U
397 #define _reg_PHY_PLL_OBS_0                                 0x00000185U
398 #define _reg_PHY_PLL_OBS_1                                 0x00000186U
399 #define _reg_PHY_PLL_OBS_2                                 0x00000187U
400 #define _reg_PHY_PLL_OBS_3                                 0x00000188U
401 #define _reg_PHY_PLL_OBS_4                                 0x00000189U
402 #define _reg_PHY_PLL_TESTOUT_SEL                           0x0000018aU
403 #define _reg_PHY_TCKSRE_WAIT                               0x0000018bU
404 #define _reg_PHY_LP4_BOOT_LOW_FREQ_SEL                     0x0000018cU
405 #define _reg_PHY_LP_WAKEUP                                 0x0000018dU
406 #define _reg_PHY_LS_IDLE_EN                                0x0000018eU
407 #define _reg_PHY_LP_CTRLUPD_CNTR_CFG                       0x0000018fU
408 #define _reg_PHY_TDFI_PHY_WRDELAY                          0x00000190U
409 #define _reg_PHY_PAD_FDBK_DRIVE                            0x00000191U
410 #define _reg_PHY_PAD_DATA_DRIVE                            0x00000192U
411 #define _reg_PHY_PAD_DQS_DRIVE                             0x00000193U
412 #define _reg_PHY_PAD_ADDR_DRIVE                            0x00000194U
413 #define _reg_PHY_PAD_CLK_DRIVE                             0x00000195U
414 #define _reg_PHY_PAD_FDBK_TERM                             0x00000196U
415 #define _reg_PHY_PAD_DATA_TERM                             0x00000197U
416 #define _reg_PHY_PAD_DQS_TERM                              0x00000198U
417 #define _reg_PHY_PAD_ADDR_TERM                             0x00000199U
418 #define _reg_PHY_PAD_CLK_TERM                              0x0000019aU
419 #define _reg_PHY_PAD_CKE_DRIVE                             0x0000019bU
420 #define _reg_PHY_PAD_CKE_TERM                              0x0000019cU
421 #define _reg_PHY_PAD_RST_DRIVE                             0x0000019dU
422 #define _reg_PHY_PAD_RST_TERM                              0x0000019eU
423 #define _reg_PHY_PAD_CS_DRIVE                              0x0000019fU
424 #define _reg_PHY_PAD_CS_TERM                               0x000001a0U
425 #define _reg_PHY_PAD_ODT_DRIVE                             0x000001a1U
426 #define _reg_PHY_PAD_ODT_TERM                              0x000001a2U
427 #define _reg_PHY_ADRCTL_RX_CAL                             0x000001a3U
428 #define _reg_PHY_ADRCTL_LP3_RX_CAL                         0x000001a4U
429 #define _reg_PHY_TST_CLK_PAD_CTRL                          0x000001a5U
430 #define _reg_PHY_TST_CLK_PAD_CTRL2                         0x000001a6U
431 #define _reg_PHY_CAL_MODE_0                                0x000001a7U
432 #define _reg_PHY_CAL_CLEAR_0                               0x000001a8U
433 #define _reg_PHY_CAL_START_0                               0x000001a9U
434 #define _reg_PHY_CAL_INTERVAL_COUNT_0                      0x000001aaU
435 #define _reg_PHY_CAL_SAMPLE_WAIT_0                         0x000001abU
436 #define _reg_PHY_LP4_BOOT_CAL_CLK_SELECT_0                 0x000001acU
437 #define _reg_PHY_CAL_CLK_SELECT_0                          0x000001adU
438 #define _reg_PHY_CAL_RESULT_OBS_0                          0x000001aeU
439 #define _reg_PHY_CAL_RESULT2_OBS_0                         0x000001afU
440 #define _reg_PHY_CAL_CPTR_CNT_0                            0x000001b0U
441 #define _reg_PHY_CAL_SETTLING_PRD_0                        0x000001b1U
442 #define _reg_PHY_CAL_PU_FINE_ADJ_0                         0x000001b2U
443 #define _reg_PHY_CAL_PD_FINE_ADJ_0                         0x000001b3U
444 #define _reg_PHY_CAL_RCV_FINE_ADJ_0                        0x000001b4U
445 #define _reg_PHY_CAL_DBG_CFG_0                             0x000001b5U
446 #define _reg_SC_PHY_PAD_DBG_CONT_0                         0x000001b6U
447 #define _reg_PHY_CAL_RESULT3_OBS_0                         0x000001b7U
448 #define _reg_PHY_ADRCTL_PVT_MAP_0                          0x000001b8U
449 #define _reg_PHY_CAL_SLOPE_ADJ_0                           0x000001b9U
450 #define _reg_PHY_CAL_SLOPE_ADJ_PASS2_0                     0x000001baU
451 #define _reg_PHY_CAL_TWO_PASS_CFG_0                        0x000001bbU
452 #define _reg_PHY_CAL_SW_CAL_CFG_0                          0x000001bcU
453 #define _reg_PHY_CAL_RANGE_MIN_0                           0x000001bdU
454 #define _reg_PHY_CAL_RANGE_MAX_0                           0x000001beU
455 #define _reg_PHY_PAD_ATB_CTRL                              0x000001bfU
456 #define _reg_PHY_ADRCTL_MANUAL_UPDATE                      0x000001c0U
457 #define _reg_PHY_AC_LPBK_ERR_CLEAR                         0x000001c1U
458 #define _reg_PHY_AC_LPBK_OBS_SELECT                        0x000001c2U
459 #define _reg_PHY_AC_LPBK_ENABLE                            0x000001c3U
460 #define _reg_PHY_AC_LPBK_CONTROL                           0x000001c4U
461 #define _reg_PHY_AC_PRBS_PATTERN_START                     0x000001c5U
462 #define _reg_PHY_AC_PRBS_PATTERN_MASK                      0x000001c6U
463 #define _reg_PHY_AC_LPBK_RESULT_OBS                        0x000001c7U
464 #define _reg_PHY_AC_CLK_LPBK_OBS_SELECT                    0x000001c8U
465 #define _reg_PHY_AC_CLK_LPBK_ENABLE                        0x000001c9U
466 #define _reg_PHY_AC_CLK_LPBK_CONTROL                       0x000001caU
467 #define _reg_PHY_AC_CLK_LPBK_RESULT_OBS                    0x000001cbU
468 #define _reg_PHY_AC_PWR_RDC_DISABLE                        0x000001ccU
469 #define _reg_PHY_DATA_BYTE_ORDER_SEL                       0x000001cdU
470 #define _reg_PHY_DATA_BYTE_ORDER_SEL_HIGH                  0x000001ceU
471 #define _reg_PHY_LPDDR4_CONNECT                            0x000001cfU
472 #define _reg_PHY_CALVL_DEVICE_MAP                          0x000001d0U
473 #define _reg_PHY_ADR_DISABLE                               0x000001d1U
474 #define _reg_PHY_ADRCTL_MSTR_DLY_ENC_SEL                   0x000001d2U
475 #define _reg_PHY_CS_DLY_UPT_PER_AC_SLICE                   0x000001d3U
476 #define _reg_PHY_DDL_AC_ENABLE                             0x000001d4U
477 #define _reg_PHY_DDL_AC_MODE                               0x000001d5U
478 #define _reg_PHY_PAD_BACKGROUND_CAL                        0x000001d6U
479 #define _reg_PHY_INIT_UPDATE_CONFIG                        0x000001d7U
480 #define _reg_PHY_DDL_TRACK_UPD_THRESHOLD_AC                0x000001d8U
481 #define _reg_PHY_DLL_RST_EN                                0x000001d9U
482 #define _reg_PHY_AC_INIT_COMPLETE_OBS                      0x000001daU
483 #define _reg_PHY_DS_INIT_COMPLETE_OBS                      0x000001dbU
484 #define _reg_PHY_UPDATE_MASK                               0x000001dcU
485 #define _reg_PHY_PLL_SWITCH_CNT                            0x000001ddU
486 #define _reg_PI_START                                      0x000001deU
487 #define _reg_PI_DRAM_CLASS                                 0x000001dfU
488 #define _reg_PI_VERSION                                    0x000001e0U
489 #define _reg_PI_NORMAL_LVL_SEQ                             0x000001e1U
490 #define _reg_PI_INIT_LVL_EN                                0x000001e2U
491 #define _reg_PI_NOTCARE_PHYUPD                             0x000001e3U
492 #define _reg_PI_ONBUS_MBIST                                0x000001e4U
493 #define _reg_PI_TCMD_GAP                                   0x000001e5U
494 #define _reg_PI_MASTER_ACK_DURATION_MIN                    0x000001e6U
495 #define _reg_PI_DFI_VERSION                                0x000001e7U
496 #define _reg_PI_TDFI_PHYMSTR_TYPE0                         0x000001e8U
497 #define _reg_PI_TDFI_PHYMSTR_TYPE1                         0x000001e9U
498 #define _reg_PI_TDFI_PHYMSTR_TYPE2                         0x000001eaU
499 #define _reg_PI_TDFI_PHYMSTR_TYPE3                         0x000001ebU
500 #define _reg_PI_DFI_PHYMSTR_TYPE                           0x000001ecU
501 #define _reg_PI_DFI_PHYMSTR_CS_STATE_R                     0x000001edU
502 #define _reg_PI_DFI_PHYMSTR_STATE_SEL_R                    0x000001eeU
503 #define _reg_PI_TDFI_PHYMSTR_MAX_F0                        0x000001efU
504 #define _reg_PI_TDFI_PHYMSTR_RESP_F0                       0x000001f0U
505 #define _reg_PI_TDFI_PHYMSTR_MAX_F1                        0x000001f1U
506 #define _reg_PI_TDFI_PHYMSTR_RESP_F1                       0x000001f2U
507 #define _reg_PI_TDFI_PHYMSTR_MAX_F2                        0x000001f3U
508 #define _reg_PI_TDFI_PHYMSTR_RESP_F2                       0x000001f4U
509 #define _reg_PI_TDFI_PHYUPD_RESP_F0                        0x000001f5U
510 #define _reg_PI_TDFI_PHYUPD_TYPE0_F0                       0x000001f6U
511 #define _reg_PI_TDFI_PHYUPD_TYPE1_F0                       0x000001f7U
512 #define _reg_PI_TDFI_PHYUPD_TYPE2_F0                       0x000001f8U
513 #define _reg_PI_TDFI_PHYUPD_TYPE3_F0                       0x000001f9U
514 #define _reg_PI_TDFI_PHYUPD_RESP_F1                        0x000001faU
515 #define _reg_PI_TDFI_PHYUPD_TYPE0_F1                       0x000001fbU
516 #define _reg_PI_TDFI_PHYUPD_TYPE1_F1                       0x000001fcU
517 #define _reg_PI_TDFI_PHYUPD_TYPE2_F1                       0x000001fdU
518 #define _reg_PI_TDFI_PHYUPD_TYPE3_F1                       0x000001feU
519 #define _reg_PI_TDFI_PHYUPD_RESP_F2                        0x000001ffU
520 #define _reg_PI_TDFI_PHYUPD_TYPE0_F2                       0x00000200U
521 #define _reg_PI_TDFI_PHYUPD_TYPE1_F2                       0x00000201U
522 #define _reg_PI_TDFI_PHYUPD_TYPE2_F2                       0x00000202U
523 #define _reg_PI_TDFI_PHYUPD_TYPE3_F2                       0x00000203U
524 #define _reg_PI_CONTROL_ERROR_STATUS                       0x00000204U
525 #define _reg_PI_EXIT_AFTER_INIT_CALVL                      0x00000205U
526 #define _reg_PI_FREQ_MAP                                   0x00000206U
527 #define _reg_PI_INIT_WORK_FREQ                             0x00000207U
528 #define _reg_PI_INIT_DFS_CALVL_ONLY                        0x00000208U
529 #define _reg_PI_POWER_ON_SEQ_BYPASS_ARRAY                  0x00000209U
530 #define _reg_PI_POWER_ON_SEQ_END_ARRAY                     0x0000020aU
531 #define _reg_PI_SEQ1_PAT                                   0x0000020bU
532 #define _reg_PI_SEQ1_PAT_MASK                              0x0000020cU
533 #define _reg_PI_SEQ2_PAT                                   0x0000020dU
534 #define _reg_PI_SEQ2_PAT_MASK                              0x0000020eU
535 #define _reg_PI_SEQ3_PAT                                   0x0000020fU
536 #define _reg_PI_SEQ3_PAT_MASK                              0x00000210U
537 #define _reg_PI_SEQ4_PAT                                   0x00000211U
538 #define _reg_PI_SEQ4_PAT_MASK                              0x00000212U
539 #define _reg_PI_SEQ5_PAT                                   0x00000213U
540 #define _reg_PI_SEQ5_PAT_MASK                              0x00000214U
541 #define _reg_PI_SEQ6_PAT                                   0x00000215U
542 #define _reg_PI_SEQ6_PAT_MASK                              0x00000216U
543 #define _reg_PI_SEQ7_PAT                                   0x00000217U
544 #define _reg_PI_SEQ7_PAT_MASK                              0x00000218U
545 #define _reg_PI_SEQ8_PAT                                   0x00000219U
546 #define _reg_PI_SEQ8_PAT_MASK                              0x0000021aU
547 #define _reg_PI_WDT_DISABLE                                0x0000021bU
548 #define _reg_PI_SW_RST_N                                   0x0000021cU
549 #define _reg_RESERVED_R0                                   0x0000021dU
550 #define _reg_PI_CS_MAP                                     0x0000021eU
551 #define _reg_PI_TDELAY_RDWR_2_BUS_IDLE_F0                  0x0000021fU
552 #define _reg_PI_TDELAY_RDWR_2_BUS_IDLE_F1                  0x00000220U
553 #define _reg_PI_TDELAY_RDWR_2_BUS_IDLE_F2                  0x00000221U
554 #define _reg_PI_TMRR                                       0x00000222U
555 #define _reg_PI_WRLAT_F0                                   0x00000223U
556 #define _reg_PI_ADDITIVE_LAT_F0                            0x00000224U
557 #define _reg_PI_CASLAT_LIN_F0                              0x00000225U
558 #define _reg_PI_WRLAT_F1                                   0x00000226U
559 #define _reg_PI_ADDITIVE_LAT_F1                            0x00000227U
560 #define _reg_PI_CASLAT_LIN_F1                              0x00000228U
561 #define _reg_PI_WRLAT_F2                                   0x00000229U
562 #define _reg_PI_ADDITIVE_LAT_F2                            0x0000022aU
563 #define _reg_PI_CASLAT_LIN_F2                              0x0000022bU
564 #define _reg_PI_PREAMBLE_SUPPORT                           0x0000022cU
565 #define _reg_PI_AREFRESH                                   0x0000022dU
566 #define _reg_PI_MCAREF_FORWARD_ONLY                        0x0000022eU
567 #define _reg_PI_TRFC_F0                                    0x0000022fU
568 #define _reg_PI_TREF_F0                                    0x00000230U
569 #define _reg_PI_TRFC_F1                                    0x00000231U
570 #define _reg_PI_TREF_F1                                    0x00000232U
571 #define _reg_PI_TRFC_F2                                    0x00000233U
572 #define _reg_PI_TREF_F2                                    0x00000234U
573 #define _reg_RESERVED_H3VER2                               0x00000235U
574 #define _reg_PI_TREF_INTERVAL                              0x00000236U
575 #define _reg_PI_FREQ_CHANGE_REG_COPY                       0x00000237U
576 #define _reg_PI_FREQ_SEL_FROM_REGIF                        0x00000238U
577 #define _reg_PI_SWLVL_LOAD                                 0x00000239U
578 #define _reg_PI_SWLVL_OP_DONE                              0x0000023aU
579 #define _reg_PI_SW_WRLVL_RESP_0                            0x0000023bU
580 #define _reg_PI_SW_WRLVL_RESP_1                            0x0000023cU
581 #define _reg_PI_SW_WRLVL_RESP_2                            0x0000023dU
582 #define _reg_PI_SW_WRLVL_RESP_3                            0x0000023eU
583 #define _reg_PI_SW_RDLVL_RESP_0                            0x0000023fU
584 #define _reg_PI_SW_RDLVL_RESP_1                            0x00000240U
585 #define _reg_PI_SW_RDLVL_RESP_2                            0x00000241U
586 #define _reg_PI_SW_RDLVL_RESP_3                            0x00000242U
587 #define _reg_PI_SW_CALVL_RESP_0                            0x00000243U
588 #define _reg_PI_SW_LEVELING_MODE                           0x00000244U
589 #define _reg_PI_SWLVL_START                                0x00000245U
590 #define _reg_PI_SWLVL_EXIT                                 0x00000246U
591 #define _reg_PI_SWLVL_WR_SLICE_0                           0x00000247U
592 #define _reg_PI_SWLVL_RD_SLICE_0                           0x00000248U
593 #define _reg_PI_SWLVL_VREF_UPDATE_SLICE_0                  0x00000249U
594 #define _reg_PI_SW_WDQLVL_RESP_0                           0x0000024aU
595 #define _reg_PI_SWLVL_WR_SLICE_1                           0x0000024bU
596 #define _reg_PI_SWLVL_RD_SLICE_1                           0x0000024cU
597 #define _reg_PI_SWLVL_VREF_UPDATE_SLICE_1                  0x0000024dU
598 #define _reg_PI_SW_WDQLVL_RESP_1                           0x0000024eU
599 #define _reg_PI_SWLVL_WR_SLICE_2                           0x0000024fU
600 #define _reg_PI_SWLVL_RD_SLICE_2                           0x00000250U
601 #define _reg_PI_SWLVL_VREF_UPDATE_SLICE_2                  0x00000251U
602 #define _reg_PI_SW_WDQLVL_RESP_2                           0x00000252U
603 #define _reg_PI_SWLVL_WR_SLICE_3                           0x00000253U
604 #define _reg_PI_SWLVL_RD_SLICE_3                           0x00000254U
605 #define _reg_PI_SWLVL_VREF_UPDATE_SLICE_3                  0x00000255U
606 #define _reg_PI_SW_WDQLVL_RESP_3                           0x00000256U
607 #define _reg_PI_SW_WDQLVL_VREF                             0x00000257U
608 #define _reg_PI_SWLVL_SM2_START                            0x00000258U
609 #define _reg_PI_SWLVL_SM2_WR                               0x00000259U
610 #define _reg_PI_SWLVL_SM2_RD                               0x0000025aU
611 #define _reg_PI_SEQUENTIAL_LVL_REQ                         0x0000025bU
612 #define _reg_PI_DFS_PERIOD_EN                              0x0000025cU
613 #define _reg_PI_SRE_PERIOD_EN                              0x0000025dU
614 #define _reg_PI_DFI40_POLARITY                             0x0000025eU
615 #define _reg_PI_16BIT_DRAM_CONNECT                         0x0000025fU
616 #define _reg_PI_TDFI_CTRL_DELAY_F0                         0x00000260U
617 #define _reg_PI_TDFI_CTRL_DELAY_F1                         0x00000261U
618 #define _reg_PI_TDFI_CTRL_DELAY_F2                         0x00000262U
619 #define _reg_PI_WRLVL_REQ                                  0x00000263U
620 #define _reg_PI_WRLVL_CS                                   0x00000264U
621 #define _reg_PI_WLDQSEN                                    0x00000265U
622 #define _reg_PI_WLMRD                                      0x00000266U
623 #define _reg_PI_WRLVL_EN_F0                                0x00000267U
624 #define _reg_PI_WRLVL_EN_F1                                0x00000268U
625 #define _reg_PI_WRLVL_EN_F2                                0x00000269U
626 #define _reg_PI_WRLVL_EN                                   0x0000026aU
627 #define _reg_PI_WRLVL_INTERVAL                             0x0000026bU
628 #define _reg_PI_WRLVL_PERIODIC                             0x0000026cU
629 #define _reg_PI_WRLVL_ON_SREF_EXIT                         0x0000026dU
630 #define _reg_PI_WRLVL_DISABLE_DFS                          0x0000026eU
631 #define _reg_PI_WRLVL_RESP_MASK                            0x0000026fU
632 #define _reg_PI_WRLVL_ROTATE                               0x00000270U
633 #define _reg_PI_WRLVL_CS_MAP                               0x00000271U
634 #define _reg_PI_WRLVL_ERROR_STATUS                         0x00000272U
635 #define _reg_PI_TDFI_WRLVL_EN                              0x00000273U
636 #define _reg_PI_TDFI_WRLVL_WW_F0                           0x00000274U
637 #define _reg_PI_TDFI_WRLVL_WW_F1                           0x00000275U
638 #define _reg_PI_TDFI_WRLVL_WW_F2                           0x00000276U
639 #define _reg_PI_TDFI_WRLVL_WW                              0x00000277U
640 #define _reg_PI_TDFI_WRLVL_RESP                            0x00000278U
641 #define _reg_PI_TDFI_WRLVL_MAX                             0x00000279U
642 #define _reg_PI_WRLVL_STROBE_NUM                           0x0000027aU
643 #define _reg_PI_WRLVL_MRR_DQ_RETURN_HIZ                    0x0000027bU
644 #define _reg_PI_WRLVL_EN_DEASSERT_2_MRR                    0x0000027cU
645 #define _reg_PI_TODTL_2CMD_F0                              0x0000027dU
646 #define _reg_PI_ODT_EN_F0                                  0x0000027eU
647 #define _reg_PI_TODTL_2CMD_F1                              0x0000027fU
648 #define _reg_PI_ODT_EN_F1                                  0x00000280U
649 #define _reg_PI_TODTL_2CMD_F2                              0x00000281U
650 #define _reg_PI_ODT_EN_F2                                  0x00000282U
651 #define _reg_PI_TODTH_WR                                   0x00000283U
652 #define _reg_PI_TODTH_RD                                   0x00000284U
653 #define _reg_PI_ODT_RD_MAP_CS0                             0x00000285U
654 #define _reg_PI_ODT_WR_MAP_CS0                             0x00000286U
655 #define _reg_PI_ODT_RD_MAP_CS1                             0x00000287U
656 #define _reg_PI_ODT_WR_MAP_CS1                             0x00000288U
657 #define _reg_PI_ODT_RD_MAP_CS2                             0x00000289U
658 #define _reg_PI_ODT_WR_MAP_CS2                             0x0000028aU
659 #define _reg_PI_ODT_RD_MAP_CS3                             0x0000028bU
660 #define _reg_PI_ODT_WR_MAP_CS3                             0x0000028cU
661 #define _reg_PI_EN_ODT_ASSERT_EXCEPT_RD                    0x0000028dU
662 #define _reg_PI_ODTLON_F0                                  0x0000028eU
663 #define _reg_PI_TODTON_MIN_F0                              0x0000028fU
664 #define _reg_PI_ODTLON_F1                                  0x00000290U
665 #define _reg_PI_TODTON_MIN_F1                              0x00000291U
666 #define _reg_PI_ODTLON_F2                                  0x00000292U
667 #define _reg_PI_TODTON_MIN_F2                              0x00000293U
668 #define _reg_PI_WR_TO_ODTH_F0                              0x00000294U
669 #define _reg_PI_WR_TO_ODTH_F1                              0x00000295U
670 #define _reg_PI_WR_TO_ODTH_F2                              0x00000296U
671 #define _reg_PI_RD_TO_ODTH_F0                              0x00000297U
672 #define _reg_PI_RD_TO_ODTH_F1                              0x00000298U
673 #define _reg_PI_RD_TO_ODTH_F2                              0x00000299U
674 #define _reg_PI_ADDRESS_MIRRORING                          0x0000029aU
675 #define _reg_PI_RDLVL_REQ                                  0x0000029bU
676 #define _reg_PI_RDLVL_GATE_REQ                             0x0000029cU
677 #define _reg_PI_RDLVL_CS                                   0x0000029dU
678 #define _reg_PI_RDLVL_PAT_0                                0x0000029eU
679 #define _reg_PI_RDLVL_PAT_1                                0x0000029fU
680 #define _reg_PI_RDLVL_PAT_2                                0x000002a0U
681 #define _reg_PI_RDLVL_PAT_3                                0x000002a1U
682 #define _reg_PI_RDLVL_PAT_4                                0x000002a2U
683 #define _reg_PI_RDLVL_PAT_5                                0x000002a3U
684 #define _reg_PI_RDLVL_PAT_6                                0x000002a4U
685 #define _reg_PI_RDLVL_PAT_7                                0x000002a5U
686 #define _reg_PI_RDLVL_SEQ_EN                               0x000002a6U
687 #define _reg_PI_RDLVL_GATE_SEQ_EN                          0x000002a7U
688 #define _reg_PI_RDLVL_PERIODIC                             0x000002a8U
689 #define _reg_PI_RDLVL_ON_SREF_EXIT                         0x000002a9U
690 #define _reg_PI_RDLVL_DISABLE_DFS                          0x000002aaU
691 #define _reg_PI_RDLVL_GATE_PERIODIC                        0x000002abU
692 #define _reg_PI_RDLVL_GATE_ON_SREF_EXIT                    0x000002acU
693 #define _reg_PI_RDLVL_GATE_DISABLE_DFS                     0x000002adU
694 #define _reg_RESERVED_R1                                   0x000002aeU
695 #define _reg_PI_RDLVL_ROTATE                               0x000002afU
696 #define _reg_PI_RDLVL_GATE_ROTATE                          0x000002b0U
697 #define _reg_PI_RDLVL_CS_MAP                               0x000002b1U
698 #define _reg_PI_RDLVL_GATE_CS_MAP                          0x000002b2U
699 #define _reg_PI_TDFI_RDLVL_RR                              0x000002b3U
700 #define _reg_PI_TDFI_RDLVL_RESP                            0x000002b4U
701 #define _reg_PI_RDLVL_RESP_MASK                            0x000002b5U
702 #define _reg_PI_TDFI_RDLVL_EN                              0x000002b6U
703 #define _reg_PI_RDLVL_EN_F0                                0x000002b7U
704 #define _reg_PI_RDLVL_GATE_EN_F0                           0x000002b8U
705 #define _reg_PI_RDLVL_EN_F1                                0x000002b9U
706 #define _reg_PI_RDLVL_GATE_EN_F1                           0x000002baU
707 #define _reg_PI_RDLVL_EN_F2                                0x000002bbU
708 #define _reg_PI_RDLVL_GATE_EN_F2                           0x000002bcU
709 #define _reg_PI_RDLVL_EN                                   0x000002bdU
710 #define _reg_PI_RDLVL_GATE_EN                              0x000002beU
711 #define _reg_PI_TDFI_RDLVL_MAX                             0x000002bfU
712 #define _reg_PI_RDLVL_ERROR_STATUS                         0x000002c0U
713 #define _reg_PI_RDLVL_INTERVAL                             0x000002c1U
714 #define _reg_PI_RDLVL_GATE_INTERVAL                        0x000002c2U
715 #define _reg_PI_RDLVL_PATTERN_START                        0x000002c3U
716 #define _reg_PI_RDLVL_PATTERN_NUM                          0x000002c4U
717 #define _reg_PI_RDLVL_STROBE_NUM                           0x000002c5U
718 #define _reg_PI_RDLVL_GATE_STROBE_NUM                      0x000002c6U
719 #define _reg_PI_LPDDR4_RDLVL_PATTERN_8                     0x000002c7U
720 #define _reg_PI_LPDDR4_RDLVL_PATTERN_9                     0x000002c8U
721 #define _reg_PI_LPDDR4_RDLVL_PATTERN_10                    0x000002c9U
722 #define _reg_PI_LPDDR4_RDLVL_PATTERN_11                    0x000002caU
723 #define _reg_PI_RD_PREAMBLE_TRAINING_EN                    0x000002cbU
724 #define _reg_PI_REG_DIMM_ENABLE                            0x000002ccU
725 #define _reg_PI_RDLAT_ADJ_F0                               0x000002cdU
726 #define _reg_PI_RDLAT_ADJ_F1                               0x000002ceU
727 #define _reg_PI_RDLAT_ADJ_F2                               0x000002cfU
728 #define _reg_PI_TDFI_RDDATA_EN                             0x000002d0U
729 #define _reg_PI_WRLAT_ADJ_F0                               0x000002d1U
730 #define _reg_PI_WRLAT_ADJ_F1                               0x000002d2U
731 #define _reg_PI_WRLAT_ADJ_F2                               0x000002d3U
732 #define _reg_PI_TDFI_PHY_WRLAT                             0x000002d4U
733 #define _reg_PI_TDFI_WRCSLAT_F0                            0x000002d5U
734 #define _reg_PI_TDFI_WRCSLAT_F1                            0x000002d6U
735 #define _reg_PI_TDFI_WRCSLAT_F2                            0x000002d7U
736 #define _reg_PI_TDFI_RDCSLAT_F0                            0x000002d8U
737 #define _reg_PI_TDFI_RDCSLAT_F1                            0x000002d9U
738 #define _reg_PI_TDFI_RDCSLAT_F2                            0x000002daU
739 #define _reg_PI_TDFI_PHY_WRDATA_F0                         0x000002dbU
740 #define _reg_PI_TDFI_PHY_WRDATA_F1                         0x000002dcU
741 #define _reg_PI_TDFI_PHY_WRDATA_F2                         0x000002ddU
742 #define _reg_PI_TDFI_PHY_WRDATA                            0x000002deU
743 #define _reg_PI_CALVL_REQ                                  0x000002dfU
744 #define _reg_PI_CALVL_CS                                   0x000002e0U
745 #define _reg_RESERVED_R2                                   0x000002e1U
746 #define _reg_RESERVED_R3                                   0x000002e2U
747 #define _reg_PI_CALVL_SEQ_EN                               0x000002e3U
748 #define _reg_PI_CALVL_PERIODIC                             0x000002e4U
749 #define _reg_PI_CALVL_ON_SREF_EXIT                         0x000002e5U
750 #define _reg_PI_CALVL_DISABLE_DFS                          0x000002e6U
751 #define _reg_PI_CALVL_ROTATE                               0x000002e7U
752 #define _reg_PI_CALVL_CS_MAP                               0x000002e8U
753 #define _reg_PI_TDFI_CALVL_EN                              0x000002e9U
754 #define _reg_PI_TDFI_CALVL_CC_F0                           0x000002eaU
755 #define _reg_PI_TDFI_CALVL_CAPTURE_F0                      0x000002ebU
756 #define _reg_PI_TDFI_CALVL_CC_F1                           0x000002ecU
757 #define _reg_PI_TDFI_CALVL_CAPTURE_F1                      0x000002edU
758 #define _reg_PI_TDFI_CALVL_CC_F2                           0x000002eeU
759 #define _reg_PI_TDFI_CALVL_CAPTURE_F2                      0x000002efU
760 #define _reg_PI_TDFI_CALVL_RESP                            0x000002f0U
761 #define _reg_PI_TDFI_CALVL_MAX                             0x000002f1U
762 #define _reg_PI_CALVL_RESP_MASK                            0x000002f2U
763 #define _reg_PI_CALVL_EN_F0                                0x000002f3U
764 #define _reg_PI_CALVL_EN_F1                                0x000002f4U
765 #define _reg_PI_CALVL_EN_F2                                0x000002f5U
766 #define _reg_PI_CALVL_EN                                   0x000002f6U
767 #define _reg_PI_CALVL_ERROR_STATUS                         0x000002f7U
768 #define _reg_PI_CALVL_INTERVAL                             0x000002f8U
769 #define _reg_PI_TCACKEL                                    0x000002f9U
770 #define _reg_PI_TCAMRD                                     0x000002faU
771 #define _reg_PI_TCACKEH                                    0x000002fbU
772 #define _reg_PI_TMRZ_F0                                    0x000002fcU
773 #define _reg_PI_TCAENT_F0                                  0x000002fdU
774 #define _reg_PI_TMRZ_F1                                    0x000002feU
775 #define _reg_PI_TCAENT_F1                                  0x000002ffU
776 #define _reg_PI_TMRZ_F2                                    0x00000300U
777 #define _reg_PI_TCAENT_F2                                  0x00000301U
778 #define _reg_PI_TCAEXT                                     0x00000302U
779 #define _reg_PI_CA_TRAIN_VREF_EN                           0x00000303U
780 #define _reg_PI_TDFI_CACSCA_F0                             0x00000304U
781 #define _reg_PI_TDFI_CASEL_F0                              0x00000305U
782 #define _reg_PI_TVREF_SHORT_F0                             0x00000306U
783 #define _reg_PI_TVREF_LONG_F0                              0x00000307U
784 #define _reg_PI_TDFI_CACSCA_F1                             0x00000308U
785 #define _reg_PI_TDFI_CASEL_F1                              0x00000309U
786 #define _reg_PI_TVREF_SHORT_F1                             0x0000030aU
787 #define _reg_PI_TVREF_LONG_F1                              0x0000030bU
788 #define _reg_PI_TDFI_CACSCA_F2                             0x0000030cU
789 #define _reg_PI_TDFI_CASEL_F2                              0x0000030dU
790 #define _reg_PI_TVREF_SHORT_F2                             0x0000030eU
791 #define _reg_PI_TVREF_LONG_F2                              0x0000030fU
792 #define _reg_PI_CALVL_VREF_INITIAL_START_POINT_F0          0x00000310U
793 #define _reg_PI_CALVL_VREF_INITIAL_STOP_POINT_F0           0x00000311U
794 #define _reg_PI_CALVL_VREF_INITIAL_START_POINT_F1          0x00000312U
795 #define _reg_PI_CALVL_VREF_INITIAL_STOP_POINT_F1           0x00000313U
796 #define _reg_PI_CALVL_VREF_INITIAL_START_POINT_F2          0x00000314U
797 #define _reg_PI_CALVL_VREF_INITIAL_STOP_POINT_F2           0x00000315U
798 #define _reg_PI_CALVL_VREF_INITIAL_START_POINT             0x00000316U
799 #define _reg_PI_CALVL_VREF_INITIAL_STOP_POINT              0x00000317U
800 #define _reg_PI_CALVL_VREF_INITIAL_STEPSIZE                0x00000318U
801 #define _reg_PI_CALVL_VREF_NORMAL_STEPSIZE                 0x00000319U
802 #define _reg_PI_CALVL_VREF_DELTA_F0                        0x0000031aU
803 #define _reg_PI_CALVL_VREF_DELTA_F1                        0x0000031bU
804 #define _reg_PI_CALVL_VREF_DELTA_F2                        0x0000031cU
805 #define _reg_PI_CALVL_VREF_DELTA                           0x0000031dU
806 #define _reg_PI_TDFI_INIT_START_MIN                        0x0000031eU
807 #define _reg_PI_TDFI_INIT_COMPLETE_MIN                     0x0000031fU
808 #define _reg_PI_TDFI_CALVL_STROBE_F0                       0x00000320U
809 #define _reg_PI_TXP_F0                                     0x00000321U
810 #define _reg_PI_TMRWCKEL_F0                                0x00000322U
811 #define _reg_PI_TCKELCK_F0                                 0x00000323U
812 #define _reg_PI_TDFI_CALVL_STROBE_F1                       0x00000324U
813 #define _reg_PI_TXP_F1                                     0x00000325U
814 #define _reg_PI_TMRWCKEL_F1                                0x00000326U
815 #define _reg_PI_TCKELCK_F1                                 0x00000327U
816 #define _reg_PI_TDFI_CALVL_STROBE_F2                       0x00000328U
817 #define _reg_PI_TXP_F2                                     0x00000329U
818 #define _reg_PI_TMRWCKEL_F2                                0x0000032aU
819 #define _reg_PI_TCKELCK_F2                                 0x0000032bU
820 #define _reg_PI_TCKCKEH                                    0x0000032cU
821 #define _reg_PI_CALVL_STROBE_NUM                           0x0000032dU
822 #define _reg_PI_SW_CA_TRAIN_VREF                           0x0000032eU
823 #define _reg_PI_TDFI_INIT_START_F0                         0x0000032fU
824 #define _reg_PI_TDFI_INIT_COMPLETE_F0                      0x00000330U
825 #define _reg_PI_TDFI_INIT_START_F1                         0x00000331U
826 #define _reg_PI_TDFI_INIT_COMPLETE_F1                      0x00000332U
827 #define _reg_PI_TDFI_INIT_START_F2                         0x00000333U
828 #define _reg_PI_TDFI_INIT_COMPLETE_F2                      0x00000334U
829 #define _reg_PI_CLKDISABLE_2_INIT_START                    0x00000335U
830 #define _reg_PI_INIT_STARTORCOMPLETE_2_CLKDISABLE          0x00000336U
831 #define _reg_PI_DRAM_CLK_DISABLE_DEASSERT_SEL              0x00000337U
832 #define _reg_PI_REFRESH_BETWEEN_SEGMENT_DISABLE            0x00000338U
833 #define _reg_PI_TCKEHDQS_F0                                0x00000339U
834 #define _reg_PI_TCKEHDQS_F1                                0x0000033aU
835 #define _reg_PI_TCKEHDQS_F2                                0x0000033bU
836 #define _reg_PI_MC_DFS_PI_SET_VREF_ENABLE                  0x0000033cU
837 #define _reg_PI_WDQLVL_VREF_EN                             0x0000033dU
838 #define _reg_PI_WDQLVL_BST_NUM                             0x0000033eU
839 #define _reg_PI_TDFI_WDQLVL_WR_F0                          0x0000033fU
840 #define _reg_PI_TDFI_WDQLVL_WR_F1                          0x00000340U
841 #define _reg_PI_TDFI_WDQLVL_WR_F2                          0x00000341U
842 #define _reg_PI_TDFI_WDQLVL_WR                             0x00000342U
843 #define _reg_PI_TDFI_WDQLVL_RW                             0x00000343U
844 #define _reg_PI_WDQLVL_RESP_MASK                           0x00000344U
845 #define _reg_PI_WDQLVL_ROTATE                              0x00000345U
846 #define _reg_PI_WDQLVL_CS_MAP                              0x00000346U
847 #define _reg_PI_WDQLVL_VREF_INITIAL_START_POINT_F0         0x00000347U
848 #define _reg_PI_WDQLVL_VREF_INITIAL_STOP_POINT_F0          0x00000348U
849 #define _reg_PI_WDQLVL_VREF_INITIAL_START_POINT_F1         0x00000349U
850 #define _reg_PI_WDQLVL_VREF_INITIAL_STOP_POINT_F1          0x0000034aU
851 #define _reg_PI_WDQLVL_VREF_INITIAL_START_POINT_F2         0x0000034bU
852 #define _reg_PI_WDQLVL_VREF_INITIAL_STOP_POINT_F2          0x0000034cU
853 #define _reg_PI_WDQLVL_VREF_INITIAL_START_POINT            0x0000034dU
854 #define _reg_PI_WDQLVL_VREF_INITIAL_STOP_POINT             0x0000034eU
855 #define _reg_PI_WDQLVL_VREF_INITIAL_STEPSIZE               0x0000034fU
856 #define _reg_PI_WDQLVL_VREF_NORMAL_STEPSIZE                0x00000350U
857 #define _reg_PI_WDQLVL_VREF_DELTA_F0                       0x00000351U
858 #define _reg_PI_WDQLVL_VREF_DELTA_F1                       0x00000352U
859 #define _reg_PI_WDQLVL_VREF_DELTA_F2                       0x00000353U
860 #define _reg_PI_WDQLVL_VREF_DELTA                          0x00000354U
861 #define _reg_PI_WDQLVL_PERIODIC                            0x00000355U
862 #define _reg_PI_WDQLVL_REQ                                 0x00000356U
863 #define _reg_PI_WDQLVL_CS                                  0x00000357U
864 #define _reg_PI_TDFI_WDQLVL_EN                             0x00000358U
865 #define _reg_PI_TDFI_WDQLVL_RESP                           0x00000359U
866 #define _reg_PI_TDFI_WDQLVL_MAX                            0x0000035aU
867 #define _reg_PI_WDQLVL_INTERVAL                            0x0000035bU
868 #define _reg_PI_WDQLVL_EN_F0                               0x0000035cU
869 #define _reg_PI_WDQLVL_EN_F1                               0x0000035dU
870 #define _reg_PI_WDQLVL_EN_F2                               0x0000035eU
871 #define _reg_PI_WDQLVL_EN                                  0x0000035fU
872 #define _reg_PI_WDQLVL_ON_SREF_EXIT                        0x00000360U
873 #define _reg_PI_WDQLVL_DISABLE_DFS                         0x00000361U
874 #define _reg_PI_WDQLVL_ERROR_STATUS                        0x00000362U
875 #define _reg_PI_MR1_DATA_F0_0                              0x00000363U
876 #define _reg_PI_MR2_DATA_F0_0                              0x00000364U
877 #define _reg_PI_MR3_DATA_F0_0                              0x00000365U
878 #define _reg_PI_MR11_DATA_F0_0                             0x00000366U
879 #define _reg_PI_MR12_DATA_F0_0                             0x00000367U
880 #define _reg_PI_MR14_DATA_F0_0                             0x00000368U
881 #define _reg_PI_MR22_DATA_F0_0                             0x00000369U
882 #define _reg_PI_MR1_DATA_F1_0                              0x0000036aU
883 #define _reg_PI_MR2_DATA_F1_0                              0x0000036bU
884 #define _reg_PI_MR3_DATA_F1_0                              0x0000036cU
885 #define _reg_PI_MR11_DATA_F1_0                             0x0000036dU
886 #define _reg_PI_MR12_DATA_F1_0                             0x0000036eU
887 #define _reg_PI_MR14_DATA_F1_0                             0x0000036fU
888 #define _reg_PI_MR22_DATA_F1_0                             0x00000370U
889 #define _reg_PI_MR1_DATA_F2_0                              0x00000371U
890 #define _reg_PI_MR2_DATA_F2_0                              0x00000372U
891 #define _reg_PI_MR3_DATA_F2_0                              0x00000373U
892 #define _reg_PI_MR11_DATA_F2_0                             0x00000374U
893 #define _reg_PI_MR12_DATA_F2_0                             0x00000375U
894 #define _reg_PI_MR14_DATA_F2_0                             0x00000376U
895 #define _reg_PI_MR22_DATA_F2_0                             0x00000377U
896 #define _reg_PI_MR13_DATA_0                                0x00000378U
897 #define _reg_PI_MR1_DATA_F0_1                              0x00000379U
898 #define _reg_PI_MR2_DATA_F0_1                              0x0000037aU
899 #define _reg_PI_MR3_DATA_F0_1                              0x0000037bU
900 #define _reg_PI_MR11_DATA_F0_1                             0x0000037cU
901 #define _reg_PI_MR12_DATA_F0_1                             0x0000037dU
902 #define _reg_PI_MR14_DATA_F0_1                             0x0000037eU
903 #define _reg_PI_MR22_DATA_F0_1                             0x0000037fU
904 #define _reg_PI_MR1_DATA_F1_1                              0x00000380U
905 #define _reg_PI_MR2_DATA_F1_1                              0x00000381U
906 #define _reg_PI_MR3_DATA_F1_1                              0x00000382U
907 #define _reg_PI_MR11_DATA_F1_1                             0x00000383U
908 #define _reg_PI_MR12_DATA_F1_1                             0x00000384U
909 #define _reg_PI_MR14_DATA_F1_1                             0x00000385U
910 #define _reg_PI_MR22_DATA_F1_1                             0x00000386U
911 #define _reg_PI_MR1_DATA_F2_1                              0x00000387U
912 #define _reg_PI_MR2_DATA_F2_1                              0x00000388U
913 #define _reg_PI_MR3_DATA_F2_1                              0x00000389U
914 #define _reg_PI_MR11_DATA_F2_1                             0x0000038aU
915 #define _reg_PI_MR12_DATA_F2_1                             0x0000038bU
916 #define _reg_PI_MR14_DATA_F2_1                             0x0000038cU
917 #define _reg_PI_MR22_DATA_F2_1                             0x0000038dU
918 #define _reg_PI_MR13_DATA_1                                0x0000038eU
919 #define _reg_PI_MR1_DATA_F0_2                              0x0000038fU
920 #define _reg_PI_MR2_DATA_F0_2                              0x00000390U
921 #define _reg_PI_MR3_DATA_F0_2                              0x00000391U
922 #define _reg_PI_MR11_DATA_F0_2                             0x00000392U
923 #define _reg_PI_MR12_DATA_F0_2                             0x00000393U
924 #define _reg_PI_MR14_DATA_F0_2                             0x00000394U
925 #define _reg_PI_MR22_DATA_F0_2                             0x00000395U
926 #define _reg_PI_MR1_DATA_F1_2                              0x00000396U
927 #define _reg_PI_MR2_DATA_F1_2                              0x00000397U
928 #define _reg_PI_MR3_DATA_F1_2                              0x00000398U
929 #define _reg_PI_MR11_DATA_F1_2                             0x00000399U
930 #define _reg_PI_MR12_DATA_F1_2                             0x0000039aU
931 #define _reg_PI_MR14_DATA_F1_2                             0x0000039bU
932 #define _reg_PI_MR22_DATA_F1_2                             0x0000039cU
933 #define _reg_PI_MR1_DATA_F2_2                              0x0000039dU
934 #define _reg_PI_MR2_DATA_F2_2                              0x0000039eU
935 #define _reg_PI_MR3_DATA_F2_2                              0x0000039fU
936 #define _reg_PI_MR11_DATA_F2_2                             0x000003a0U
937 #define _reg_PI_MR12_DATA_F2_2                             0x000003a1U
938 #define _reg_PI_MR14_DATA_F2_2                             0x000003a2U
939 #define _reg_PI_MR22_DATA_F2_2                             0x000003a3U
940 #define _reg_PI_MR13_DATA_2                                0x000003a4U
941 #define _reg_PI_MR1_DATA_F0_3                              0x000003a5U
942 #define _reg_PI_MR2_DATA_F0_3                              0x000003a6U
943 #define _reg_PI_MR3_DATA_F0_3                              0x000003a7U
944 #define _reg_PI_MR11_DATA_F0_3                             0x000003a8U
945 #define _reg_PI_MR12_DATA_F0_3                             0x000003a9U
946 #define _reg_PI_MR14_DATA_F0_3                             0x000003aaU
947 #define _reg_PI_MR22_DATA_F0_3                             0x000003abU
948 #define _reg_PI_MR1_DATA_F1_3                              0x000003acU
949 #define _reg_PI_MR2_DATA_F1_3                              0x000003adU
950 #define _reg_PI_MR3_DATA_F1_3                              0x000003aeU
951 #define _reg_PI_MR11_DATA_F1_3                             0x000003afU
952 #define _reg_PI_MR12_DATA_F1_3                             0x000003b0U
953 #define _reg_PI_MR14_DATA_F1_3                             0x000003b1U
954 #define _reg_PI_MR22_DATA_F1_3                             0x000003b2U
955 #define _reg_PI_MR1_DATA_F2_3                              0x000003b3U
956 #define _reg_PI_MR2_DATA_F2_3                              0x000003b4U
957 #define _reg_PI_MR3_DATA_F2_3                              0x000003b5U
958 #define _reg_PI_MR11_DATA_F2_3                             0x000003b6U
959 #define _reg_PI_MR12_DATA_F2_3                             0x000003b7U
960 #define _reg_PI_MR14_DATA_F2_3                             0x000003b8U
961 #define _reg_PI_MR22_DATA_F2_3                             0x000003b9U
962 #define _reg_PI_MR13_DATA_3                                0x000003baU
963 #define _reg_PI_BANK_DIFF                                  0x000003bbU
964 #define _reg_PI_ROW_DIFF                                   0x000003bcU
965 #define _reg_PI_TFC_F0                                     0x000003bdU
966 #define _reg_PI_TFC_F1                                     0x000003beU
967 #define _reg_PI_TFC_F2                                     0x000003bfU
968 #define _reg_PI_TCCD                                       0x000003c0U
969 #define _reg_PI_TRTP_F0                                    0x000003c1U
970 #define _reg_PI_TRP_F0                                     0x000003c2U
971 #define _reg_PI_TRCD_F0                                    0x000003c3U
972 #define _reg_PI_TWTR_F0                                    0x000003c4U
973 #define _reg_PI_TWR_F0                                     0x000003c5U
974 #define _reg_PI_TRAS_MAX_F0                                0x000003c6U
975 #define _reg_PI_TRAS_MIN_F0                                0x000003c7U
976 #define _reg_PI_TDQSCK_MAX_F0                              0x000003c8U
977 #define _reg_PI_TCCDMW_F0                                  0x000003c9U
978 #define _reg_PI_TSR_F0                                     0x000003caU
979 #define _reg_PI_TMRD_F0                                    0x000003cbU
980 #define _reg_PI_TMRW_F0                                    0x000003ccU
981 #define _reg_PI_TMOD_F0                                    0x000003cdU
982 #define _reg_PI_TRTP_F1                                    0x000003ceU
983 #define _reg_PI_TRP_F1                                     0x000003cfU
984 #define _reg_PI_TRCD_F1                                    0x000003d0U
985 #define _reg_PI_TWTR_F1                                    0x000003d1U
986 #define _reg_PI_TWR_F1                                     0x000003d2U
987 #define _reg_PI_TRAS_MAX_F1                                0x000003d3U
988 #define _reg_PI_TRAS_MIN_F1                                0x000003d4U
989 #define _reg_PI_TDQSCK_MAX_F1                              0x000003d5U
990 #define _reg_PI_TCCDMW_F1                                  0x000003d6U
991 #define _reg_PI_TSR_F1                                     0x000003d7U
992 #define _reg_PI_TMRD_F1                                    0x000003d8U
993 #define _reg_PI_TMRW_F1                                    0x000003d9U
994 #define _reg_PI_TMOD_F1                                    0x000003daU
995 #define _reg_PI_TRTP_F2                                    0x000003dbU
996 #define _reg_PI_TRP_F2                                     0x000003dcU
997 #define _reg_PI_TRCD_F2                                    0x000003ddU
998 #define _reg_PI_TWTR_F2                                    0x000003deU
999 #define _reg_PI_TWR_F2                                     0x000003dfU
1000 #define _reg_PI_TRAS_MAX_F2                                0x000003e0U
1001 #define _reg_PI_TRAS_MIN_F2                                0x000003e1U
1002 #define _reg_PI_TDQSCK_MAX_F2                              0x000003e2U
1003 #define _reg_PI_TCCDMW_F2                                  0x000003e3U
1004 #define _reg_PI_TSR_F2                                     0x000003e4U
1005 #define _reg_PI_TMRD_F2                                    0x000003e5U
1006 #define _reg_PI_TMRW_F2                                    0x000003e6U
1007 #define _reg_PI_TMOD_F2                                    0x000003e7U
1008 #define _reg_RESERVED_R4                                   0x000003e8U
1009 #define _reg_RESERVED_R5                                   0x000003e9U
1010 #define _reg_RESERVED_R6                                   0x000003eaU
1011 #define _reg_RESERVED_R7                                   0x000003ebU
1012 #define _reg_RESERVED_R8                                   0x000003ecU
1013 #define _reg_RESERVED_R9                                   0x000003edU
1014 #define _reg_RESERVED_R10                                  0x000003eeU
1015 #define _reg_RESERVED_R11                                  0x000003efU
1016 #define _reg_RESERVED_R12                                  0x000003f0U
1017 #define _reg_RESERVED_R13                                  0x000003f1U
1018 #define _reg_RESERVED_R14                                  0x000003f2U
1019 #define _reg_RESERVED_R15                                  0x000003f3U
1020 #define _reg_RESERVED_R16                                  0x000003f4U
1021 #define _reg_RESERVED_R17                                  0x000003f5U
1022 #define _reg_RESERVED_R18                                  0x000003f6U
1023 #define _reg_RESERVED_R19                                  0x000003f7U
1024 #define _reg_RESERVED_R20                                  0x000003f8U
1025 #define _reg_RESERVED_R21                                  0x000003f9U
1026 #define _reg_RESERVED_R22                                  0x000003faU
1027 #define _reg_RESERVED_R23                                  0x000003fbU
1028 #define _reg_PI_INT_STATUS                                 0x000003fcU
1029 #define _reg_PI_INT_ACK                                    0x000003fdU
1030 #define _reg_PI_INT_MASK                                   0x000003feU
1031 #define _reg_PI_BIST_EXP_DATA_P0                           0x000003ffU
1032 #define _reg_PI_BIST_EXP_DATA_P1                           0x00000400U
1033 #define _reg_PI_BIST_EXP_DATA_P2                           0x00000401U
1034 #define _reg_PI_BIST_EXP_DATA_P3                           0x00000402U
1035 #define _reg_PI_BIST_FAIL_DATA_P0                          0x00000403U
1036 #define _reg_PI_BIST_FAIL_DATA_P1                          0x00000404U
1037 #define _reg_PI_BIST_FAIL_DATA_P2                          0x00000405U
1038 #define _reg_PI_BIST_FAIL_DATA_P3                          0x00000406U
1039 #define _reg_PI_BIST_FAIL_ADDR_P0                          0x00000407U
1040 #define _reg_PI_BIST_FAIL_ADDR_P1                          0x00000408U
1041 #define _reg_PI_BSTLEN                                     0x00000409U
1042 #define _reg_PI_LONG_COUNT_MASK                            0x0000040aU
1043 #define _reg_PI_CMD_SWAP_EN                                0x0000040bU
1044 #define _reg_PI_CKE_MUX_0                                  0x0000040cU
1045 #define _reg_PI_CKE_MUX_1                                  0x0000040dU
1046 #define _reg_PI_CKE_MUX_2                                  0x0000040eU
1047 #define _reg_PI_CKE_MUX_3                                  0x0000040fU
1048 #define _reg_PI_CS_MUX_0                                   0x00000410U
1049 #define _reg_PI_CS_MUX_1                                   0x00000411U
1050 #define _reg_PI_CS_MUX_2                                   0x00000412U
1051 #define _reg_PI_CS_MUX_3                                   0x00000413U
1052 #define _reg_PI_RAS_N_MUX                                  0x00000414U
1053 #define _reg_PI_CAS_N_MUX                                  0x00000415U
1054 #define _reg_PI_WE_N_MUX                                   0x00000416U
1055 #define _reg_PI_BANK_MUX_0                                 0x00000417U
1056 #define _reg_PI_BANK_MUX_1                                 0x00000418U
1057 #define _reg_PI_BANK_MUX_2                                 0x00000419U
1058 #define _reg_PI_ODT_MUX_0                                  0x0000041aU
1059 #define _reg_PI_ODT_MUX_1                                  0x0000041bU
1060 #define _reg_PI_ODT_MUX_2                                  0x0000041cU
1061 #define _reg_PI_ODT_MUX_3                                  0x0000041dU
1062 #define _reg_PI_RESET_N_MUX_0                              0x0000041eU
1063 #define _reg_PI_RESET_N_MUX_1                              0x0000041fU
1064 #define _reg_PI_RESET_N_MUX_2                              0x00000420U
1065 #define _reg_PI_RESET_N_MUX_3                              0x00000421U
1066 #define _reg_PI_DATA_BYTE_SWAP_EN                          0x00000422U
1067 #define _reg_PI_DATA_BYTE_SWAP_SLICE0                      0x00000423U
1068 #define _reg_PI_DATA_BYTE_SWAP_SLICE1                      0x00000424U
1069 #define _reg_PI_DATA_BYTE_SWAP_SLICE2                      0x00000425U
1070 #define _reg_PI_DATA_BYTE_SWAP_SLICE3                      0x00000426U
1071 #define _reg_PI_CTRLUPD_REQ_PER_AREF_EN                    0x00000427U
1072 #define _reg_PI_TDFI_CTRLUPD_MIN                           0x00000428U
1073 #define _reg_PI_TDFI_CTRLUPD_MAX_F0                        0x00000429U
1074 #define _reg_PI_TDFI_CTRLUPD_INTERVAL_F0                   0x0000042aU
1075 #define _reg_PI_TDFI_CTRLUPD_MAX_F1                        0x0000042bU
1076 #define _reg_PI_TDFI_CTRLUPD_INTERVAL_F1                   0x0000042cU
1077 #define _reg_PI_TDFI_CTRLUPD_MAX_F2                        0x0000042dU
1078 #define _reg_PI_TDFI_CTRLUPD_INTERVAL_F2                   0x0000042eU
1079 #define _reg_PI_UPDATE_ERROR_STATUS                        0x0000042fU
1080 #define _reg_PI_BIST_GO                                    0x00000430U
1081 #define _reg_PI_BIST_RESULT                                0x00000431U
1082 #define _reg_PI_ADDR_SPACE                                 0x00000432U
1083 #define _reg_PI_BIST_DATA_CHECK                            0x00000433U
1084 #define _reg_PI_BIST_ADDR_CHECK                            0x00000434U
1085 #define _reg_PI_BIST_START_ADDRESS_P0                      0x00000435U
1086 #define _reg_PI_BIST_START_ADDRESS_P1                      0x00000436U
1087 #define _reg_PI_BIST_DATA_MASK_P0                          0x00000437U
1088 #define _reg_PI_BIST_DATA_MASK_P1                          0x00000438U
1089 #define _reg_PI_BIST_ERR_COUNT                             0x00000439U
1090 #define _reg_PI_BIST_ERR_STOP                              0x0000043aU
1091 #define _reg_PI_BIST_ADDR_MASK_0_P0                        0x0000043bU
1092 #define _reg_PI_BIST_ADDR_MASK_0_P1                        0x0000043cU
1093 #define _reg_PI_BIST_ADDR_MASK_1_P0                        0x0000043dU
1094 #define _reg_PI_BIST_ADDR_MASK_1_P1                        0x0000043eU
1095 #define _reg_PI_BIST_ADDR_MASK_2_P0                        0x0000043fU
1096 #define _reg_PI_BIST_ADDR_MASK_2_P1                        0x00000440U
1097 #define _reg_PI_BIST_ADDR_MASK_3_P0                        0x00000441U
1098 #define _reg_PI_BIST_ADDR_MASK_3_P1                        0x00000442U
1099 #define _reg_PI_BIST_ADDR_MASK_4_P0                        0x00000443U
1100 #define _reg_PI_BIST_ADDR_MASK_4_P1                        0x00000444U
1101 #define _reg_PI_BIST_ADDR_MASK_5_P0                        0x00000445U
1102 #define _reg_PI_BIST_ADDR_MASK_5_P1                        0x00000446U
1103 #define _reg_PI_BIST_ADDR_MASK_6_P0                        0x00000447U
1104 #define _reg_PI_BIST_ADDR_MASK_6_P1                        0x00000448U
1105 #define _reg_PI_BIST_ADDR_MASK_7_P0                        0x00000449U
1106 #define _reg_PI_BIST_ADDR_MASK_7_P1                        0x0000044aU
1107 #define _reg_PI_BIST_ADDR_MASK_8_P0                        0x0000044bU
1108 #define _reg_PI_BIST_ADDR_MASK_8_P1                        0x0000044cU
1109 #define _reg_PI_BIST_ADDR_MASK_9_P0                        0x0000044dU
1110 #define _reg_PI_BIST_ADDR_MASK_9_P1                        0x0000044eU
1111 #define _reg_PI_BIST_MODE                                  0x0000044fU
1112 #define _reg_PI_BIST_ADDR_MODE                             0x00000450U
1113 #define _reg_PI_BIST_PAT_MODE                              0x00000451U
1114 #define _reg_PI_BIST_USER_PAT_P0                           0x00000452U
1115 #define _reg_PI_BIST_USER_PAT_P1                           0x00000453U
1116 #define _reg_PI_BIST_USER_PAT_P2                           0x00000454U
1117 #define _reg_PI_BIST_USER_PAT_P3                           0x00000455U
1118 #define _reg_PI_BIST_PAT_NUM                               0x00000456U
1119 #define _reg_PI_BIST_STAGE_0                               0x00000457U
1120 #define _reg_PI_BIST_STAGE_1                               0x00000458U
1121 #define _reg_PI_BIST_STAGE_2                               0x00000459U
1122 #define _reg_PI_BIST_STAGE_3                               0x0000045aU
1123 #define _reg_PI_BIST_STAGE_4                               0x0000045bU
1124 #define _reg_PI_BIST_STAGE_5                               0x0000045cU
1125 #define _reg_PI_BIST_STAGE_6                               0x0000045dU
1126 #define _reg_PI_BIST_STAGE_7                               0x0000045eU
1127 #define _reg_PI_COL_DIFF                                   0x0000045fU
1128 #define _reg_PI_SELF_REFRESH_EN                            0x00000460U
1129 #define _reg_PI_TXSR_F0                                    0x00000461U
1130 #define _reg_PI_TXSR_F1                                    0x00000462U
1131 #define _reg_PI_TXSR_F2                                    0x00000463U
1132 #define _reg_PI_MONITOR_SRC_SEL_0                          0x00000464U
1133 #define _reg_PI_MONITOR_CAP_SEL_0                          0x00000465U
1134 #define _reg_PI_MONITOR_0                                  0x00000466U
1135 #define _reg_PI_MONITOR_SRC_SEL_1                          0x00000467U
1136 #define _reg_PI_MONITOR_CAP_SEL_1                          0x00000468U
1137 #define _reg_PI_MONITOR_1                                  0x00000469U
1138 #define _reg_PI_MONITOR_SRC_SEL_2                          0x0000046aU
1139 #define _reg_PI_MONITOR_CAP_SEL_2                          0x0000046bU
1140 #define _reg_PI_MONITOR_2                                  0x0000046cU
1141 #define _reg_PI_MONITOR_SRC_SEL_3                          0x0000046dU
1142 #define _reg_PI_MONITOR_CAP_SEL_3                          0x0000046eU
1143 #define _reg_PI_MONITOR_3                                  0x0000046fU
1144 #define _reg_PI_MONITOR_SRC_SEL_4                          0x00000470U
1145 #define _reg_PI_MONITOR_CAP_SEL_4                          0x00000471U
1146 #define _reg_PI_MONITOR_4                                  0x00000472U
1147 #define _reg_PI_MONITOR_SRC_SEL_5                          0x00000473U
1148 #define _reg_PI_MONITOR_CAP_SEL_5                          0x00000474U
1149 #define _reg_PI_MONITOR_5                                  0x00000475U
1150 #define _reg_PI_MONITOR_SRC_SEL_6                          0x00000476U
1151 #define _reg_PI_MONITOR_CAP_SEL_6                          0x00000477U
1152 #define _reg_PI_MONITOR_6                                  0x00000478U
1153 #define _reg_PI_MONITOR_SRC_SEL_7                          0x00000479U
1154 #define _reg_PI_MONITOR_CAP_SEL_7                          0x0000047aU
1155 #define _reg_PI_MONITOR_7                                  0x0000047bU
1156 #define _reg_PI_MONITOR_STROBE                             0x0000047cU
1157 #define _reg_PI_DLL_LOCK                                   0x0000047dU
1158 #define _reg_PI_FREQ_NUMBER_STATUS                         0x0000047eU
1159 #define _reg_RESERVED_R24                                  0x0000047fU
1160 #define _reg_PI_PHYMSTR_TYPE                               0x00000480U
1161 #define _reg_PI_POWER_REDUC_EN                             0x00000481U
1162 #define _reg_RESERVED_R25                                  0x00000482U
1163 #define _reg_RESERVED_R26                                  0x00000483U
1164 #define _reg_RESERVED_R27                                  0x00000484U
1165 #define _reg_RESERVED_R28                                  0x00000485U
1166 #define _reg_RESERVED_R29                                  0x00000486U
1167 #define _reg_RESERVED_R30                                  0x00000487U
1168 #define _reg_RESERVED_R31                                  0x00000488U
1169 #define _reg_RESERVED_R32                                  0x00000489U
1170 #define _reg_RESERVED_R33                                  0x0000048aU
1171 #define _reg_RESERVED_R34                                  0x0000048bU
1172 #define _reg_RESERVED_R35                                  0x0000048cU
1173 #define _reg_RESERVED_R36                                  0x0000048dU
1174 #define _reg_RESERVED_R37                                  0x0000048eU
1175 #define _reg_RESERVED_R38                                  0x0000048fU
1176 #define _reg_RESERVED_R39                                  0x00000490U
1177 #define _reg_PI_WRLVL_MAX_STROBE_PEND                      0x00000491U
1178 #define _reg_PI_TSDO_F0                                    0x00000492U
1179 #define _reg_PI_TSDO_F1                                    0x00000493U
1180 #define _reg_PI_TSDO_F2                                    0x00000494U
1181 
1182 #define DDR_REGDEF_ADR(regdef) ((regdef) & 0xffff)
1183 #define DDR_REGDEF_LEN(regdef) (((regdef) >> 16) & 0xff)
1184 #define DDR_REGDEF_LSB(regdef) (((regdef) >> 24) & 0xff)
1185 
1186 static const uint32_t DDR_REGDEF_TBL[4][1173] = {
1187 	{
1188 /*0000*/ 0xffffffffU,
1189 /*0001*/ 0xffffffffU,
1190 /*0002*/ 0x000b0400U,
1191 /*0003*/ 0xffffffffU,
1192 /*0004*/ 0xffffffffU,
1193 /*0005*/ 0x10010400U,
1194 /*0006*/ 0x18050400U,
1195 /*0007*/ 0x00050401U,
1196 /*0008*/ 0x08050401U,
1197 /*0009*/ 0x10050401U,
1198 /*000a*/ 0x18050401U,
1199 /*000b*/ 0x00050402U,
1200 /*000c*/ 0x08050402U,
1201 /*000d*/ 0x10050402U,
1202 /*000e*/ 0x18050402U,
1203 /*000f*/ 0x00040403U,
1204 /*0010*/ 0x08030403U,
1205 /*0011*/ 0x00180404U,
1206 /*0012*/ 0x18030404U,
1207 /*0013*/ 0x00180405U,
1208 /*0014*/ 0x18020405U,
1209 /*0015*/ 0x00010406U,
1210 /*0016*/ 0x08020406U,
1211 /*0017*/ 0x10010406U,
1212 /*0018*/ 0x18010406U,
1213 /*0019*/ 0x00020407U,
1214 /*001a*/ 0x08040407U,
1215 /*001b*/ 0x10040407U,
1216 /*001c*/ 0x18040407U,
1217 /*001d*/ 0x000a0408U,
1218 /*001e*/ 0x10040408U,
1219 /*001f*/ 0xffffffffU,
1220 /*0020*/ 0xffffffffU,
1221 /*0021*/ 0x18070408U,
1222 /*0022*/ 0xffffffffU,
1223 /*0023*/ 0xffffffffU,
1224 /*0024*/ 0xffffffffU,
1225 /*0025*/ 0xffffffffU,
1226 /*0026*/ 0xffffffffU,
1227 /*0027*/ 0xffffffffU,
1228 /*0028*/ 0x000a0409U,
1229 /*0029*/ 0x10040409U,
1230 /*002a*/ 0x18010409U,
1231 /*002b*/ 0x0001040aU,
1232 /*002c*/ 0x0802040aU,
1233 /*002d*/ 0x1009040aU,
1234 /*002e*/ 0x0009040bU,
1235 /*002f*/ 0x1002040bU,
1236 /*0030*/ 0x0020040cU,
1237 /*0031*/ 0xffffffffU,
1238 /*0032*/ 0x0001040dU,
1239 /*0033*/ 0xffffffffU,
1240 /*0034*/ 0xffffffffU,
1241 /*0035*/ 0xffffffffU,
1242 /*0036*/ 0xffffffffU,
1243 /*0037*/ 0x0020040eU,
1244 /*0038*/ 0x0020040fU,
1245 /*0039*/ 0x00200410U,
1246 /*003a*/ 0x00200411U,
1247 /*003b*/ 0x00030412U,
1248 /*003c*/ 0x08010412U,
1249 /*003d*/ 0x10030412U,
1250 /*003e*/ 0x18030412U,
1251 /*003f*/ 0x00040413U,
1252 /*0040*/ 0x08040413U,
1253 /*0041*/ 0x10040413U,
1254 /*0042*/ 0x18040413U,
1255 /*0043*/ 0x00010414U,
1256 /*0044*/ 0x08010414U,
1257 /*0045*/ 0x10060414U,
1258 /*0046*/ 0x18040414U,
1259 /*0047*/ 0xffffffffU,
1260 /*0048*/ 0x00060415U,
1261 /*0049*/ 0x08040415U,
1262 /*004a*/ 0x10060415U,
1263 /*004b*/ 0x18040415U,
1264 /*004c*/ 0x00020416U,
1265 /*004d*/ 0x08050416U,
1266 /*004e*/ 0x10080416U,
1267 /*004f*/ 0x00200417U,
1268 /*0050*/ 0x00060418U,
1269 /*0051*/ 0x08030418U,
1270 /*0052*/ 0x100b0418U,
1271 /*0053*/ 0x00040419U,
1272 /*0054*/ 0x08040419U,
1273 /*0055*/ 0x10040419U,
1274 /*0056*/ 0xffffffffU,
1275 /*0057*/ 0x18010419U,
1276 /*0058*/ 0x0009041aU,
1277 /*0059*/ 0x0020041bU,
1278 /*005a*/ 0x0020041cU,
1279 /*005b*/ 0x0020041dU,
1280 /*005c*/ 0x0020041eU,
1281 /*005d*/ 0x0010041fU,
1282 /*005e*/ 0x00200420U,
1283 /*005f*/ 0x00010421U,
1284 /*0060*/ 0x08060421U,
1285 /*0061*/ 0x10080421U,
1286 /*0062*/ 0x00200422U,
1287 /*0063*/ 0xffffffffU,
1288 /*0064*/ 0x000a0423U,
1289 /*0065*/ 0x10060423U,
1290 /*0066*/ 0x18070423U,
1291 /*0067*/ 0x00080424U,
1292 /*0068*/ 0x08080424U,
1293 /*0069*/ 0x100a0424U,
1294 /*006a*/ 0x00070425U,
1295 /*006b*/ 0x08080425U,
1296 /*006c*/ 0x10080425U,
1297 /*006d*/ 0x18030425U,
1298 /*006e*/ 0x000a0426U,
1299 /*006f*/ 0x100a0426U,
1300 /*0070*/ 0x00110427U,
1301 /*0071*/ 0x00090428U,
1302 /*0072*/ 0x10090428U,
1303 /*0073*/ 0x00100429U,
1304 /*0074*/ 0x100e0429U,
1305 /*0075*/ 0x000e042aU,
1306 /*0076*/ 0x100c042aU,
1307 /*0077*/ 0x000a042bU,
1308 /*0078*/ 0x100a042bU,
1309 /*0079*/ 0x0002042cU,
1310 /*007a*/ 0x0020042dU,
1311 /*007b*/ 0x000b042eU,
1312 /*007c*/ 0x100b042eU,
1313 /*007d*/ 0x0020042fU,
1314 /*007e*/ 0x00120430U,
1315 /*007f*/ 0x00200431U,
1316 /*0080*/ 0x00200432U,
1317 /*0081*/ 0xffffffffU,
1318 /*0082*/ 0xffffffffU,
1319 /*0083*/ 0x00010433U,
1320 /*0084*/ 0x08010433U,
1321 /*0085*/ 0x10080433U,
1322 /*0086*/ 0x000c0434U,
1323 /*0087*/ 0x100c0434U,
1324 /*0088*/ 0x000c0435U,
1325 /*0089*/ 0x100c0435U,
1326 /*008a*/ 0x000c0436U,
1327 /*008b*/ 0x100c0436U,
1328 /*008c*/ 0x000c0437U,
1329 /*008d*/ 0x100c0437U,
1330 /*008e*/ 0x000c0438U,
1331 /*008f*/ 0x100c0438U,
1332 /*0090*/ 0x000c0439U,
1333 /*0091*/ 0x100b0439U,
1334 /*0092*/ 0xffffffffU,
1335 /*0093*/ 0xffffffffU,
1336 /*0094*/ 0x000b043aU,
1337 /*0095*/ 0x100b043aU,
1338 /*0096*/ 0x000b043bU,
1339 /*0097*/ 0x100b043bU,
1340 /*0098*/ 0x000b043cU,
1341 /*0099*/ 0x100b043cU,
1342 /*009a*/ 0x000b043dU,
1343 /*009b*/ 0x100b043dU,
1344 /*009c*/ 0x000b043eU,
1345 /*009d*/ 0x100a043eU,
1346 /*009e*/ 0xffffffffU,
1347 /*009f*/ 0x000a043fU,
1348 /*00a0*/ 0x100a043fU,
1349 /*00a1*/ 0x000a0440U,
1350 /*00a2*/ 0x100a0440U,
1351 /*00a3*/ 0x000a0441U,
1352 /*00a4*/ 0x100a0441U,
1353 /*00a5*/ 0x000a0442U,
1354 /*00a6*/ 0x100a0442U,
1355 /*00a7*/ 0xffffffffU,
1356 /*00a8*/ 0x000a0443U,
1357 /*00a9*/ 0x100a0443U,
1358 /*00aa*/ 0x000a0444U,
1359 /*00ab*/ 0x100a0444U,
1360 /*00ac*/ 0x000a0445U,
1361 /*00ad*/ 0x100a0445U,
1362 /*00ae*/ 0x000a0446U,
1363 /*00af*/ 0x100a0446U,
1364 /*00b0*/ 0x000a0447U,
1365 /*00b1*/ 0x100a0447U,
1366 /*00b2*/ 0x000a0448U,
1367 /*00b3*/ 0x100a0448U,
1368 /*00b4*/ 0x000a0449U,
1369 /*00b5*/ 0x100a0449U,
1370 /*00b6*/ 0x000a044aU,
1371 /*00b7*/ 0x100a044aU,
1372 /*00b8*/ 0x000a044bU,
1373 /*00b9*/ 0x100a044bU,
1374 /*00ba*/ 0x000a044cU,
1375 /*00bb*/ 0x1004044cU,
1376 /*00bc*/ 0x1803044cU,
1377 /*00bd*/ 0x000a044dU,
1378 /*00be*/ 0x100a044dU,
1379 /*00bf*/ 0x0001044eU,
1380 /*00c0*/ 0x080a044eU,
1381 /*00c1*/ 0x1804044eU,
1382 /*00c2*/ 0x000b044fU,
1383 /*00c3*/ 0x100a044fU,
1384 /*00c4*/ 0xffffffffU,
1385 /*00c5*/ 0x00080450U,
1386 /*00c6*/ 0x08080450U,
1387 /*00c7*/ 0x10080450U,
1388 /*00c8*/ 0x18080450U,
1389 /*00c9*/ 0x00080451U,
1390 /*00ca*/ 0xffffffffU,
1391 /*00cb*/ 0x08080451U,
1392 /*00cc*/ 0x10010451U,
1393 /*00cd*/ 0x18080451U,
1394 /*00ce*/ 0x00080452U,
1395 /*00cf*/ 0x08020452U,
1396 /*00d0*/ 0x10020452U,
1397 /*00d1*/ 0x18040452U,
1398 /*00d2*/ 0x00040453U,
1399 /*00d3*/ 0xffffffffU,
1400 /*00d4*/ 0x08040453U,
1401 /*00d5*/ 0x100a0453U,
1402 /*00d6*/ 0x00060454U,
1403 /*00d7*/ 0x08080454U,
1404 /*00d8*/ 0xffffffffU,
1405 /*00d9*/ 0x10040454U,
1406 /*00da*/ 0x18040454U,
1407 /*00db*/ 0x00050455U,
1408 /*00dc*/ 0x08040455U,
1409 /*00dd*/ 0x10050455U,
1410 /*00de*/ 0x000a0456U,
1411 /*00df*/ 0x100a0456U,
1412 /*00e0*/ 0x00080457U,
1413 /*00e1*/ 0xffffffffU,
1414 /*00e2*/ 0x08040457U,
1415 /*00e3*/ 0xffffffffU,
1416 /*00e4*/ 0xffffffffU,
1417 /*00e5*/ 0x00050600U,
1418 /*00e6*/ 0x08050600U,
1419 /*00e7*/ 0x10050600U,
1420 /*00e8*/ 0x18050600U,
1421 /*00e9*/ 0x00050601U,
1422 /*00ea*/ 0x08050601U,
1423 /*00eb*/ 0x100b0601U,
1424 /*00ec*/ 0x00010602U,
1425 /*00ed*/ 0x08030602U,
1426 /*00ee*/ 0x00200603U,
1427 /*00ef*/ 0xffffffffU,
1428 /*00f0*/ 0x00030604U,
1429 /*00f1*/ 0x080a0604U,
1430 /*00f2*/ 0xffffffffU,
1431 /*00f3*/ 0xffffffffU,
1432 /*00f4*/ 0x18030604U,
1433 /*00f5*/ 0x00030605U,
1434 /*00f6*/ 0x08010605U,
1435 /*00f7*/ 0x10010605U,
1436 /*00f8*/ 0x18060605U,
1437 /*00f9*/ 0xffffffffU,
1438 /*00fa*/ 0xffffffffU,
1439 /*00fb*/ 0xffffffffU,
1440 /*00fc*/ 0x00020606U,
1441 /*00fd*/ 0x08030606U,
1442 /*00fe*/ 0x10010606U,
1443 /*00ff*/ 0x000f0607U,
1444 /*0100*/ 0x00200608U,
1445 /*0101*/ 0x00200609U,
1446 /*0102*/ 0x000b060aU,
1447 /*0103*/ 0x100b060aU,
1448 /*0104*/ 0x000b060bU,
1449 /*0105*/ 0xffffffffU,
1450 /*0106*/ 0xffffffffU,
1451 /*0107*/ 0x0018060cU,
1452 /*0108*/ 0x0018060dU,
1453 /*0109*/ 0x0018060eU,
1454 /*010a*/ 0x0018060fU,
1455 /*010b*/ 0x1804060fU,
1456 /*010c*/ 0x00050610U,
1457 /*010d*/ 0x08020610U,
1458 /*010e*/ 0x10040610U,
1459 /*010f*/ 0x18040610U,
1460 /*0110*/ 0x00010611U,
1461 /*0111*/ 0x08010611U,
1462 /*0112*/ 0x10010611U,
1463 /*0113*/ 0x18030611U,
1464 /*0114*/ 0x00200612U,
1465 /*0115*/ 0x00200613U,
1466 /*0116*/ 0x00010614U,
1467 /*0117*/ 0x08140614U,
1468 /*0118*/ 0x00140615U,
1469 /*0119*/ 0x00140616U,
1470 /*011a*/ 0x00140617U,
1471 /*011b*/ 0x00140618U,
1472 /*011c*/ 0x00140619U,
1473 /*011d*/ 0x0014061aU,
1474 /*011e*/ 0x0014061bU,
1475 /*011f*/ 0x0018061cU,
1476 /*0120*/ 0x000a061dU,
1477 /*0121*/ 0x1006061dU,
1478 /*0122*/ 0x1806061dU,
1479 /*0123*/ 0x0006061eU,
1480 /*0124*/ 0xffffffffU,
1481 /*0125*/ 0xffffffffU,
1482 /*0126*/ 0x0008061fU,
1483 /*0127*/ 0x080b061fU,
1484 /*0128*/ 0x000b0620U,
1485 /*0129*/ 0x100b0620U,
1486 /*012a*/ 0x000b0621U,
1487 /*012b*/ 0x100b0621U,
1488 /*012c*/ 0x000b0622U,
1489 /*012d*/ 0x10040622U,
1490 /*012e*/ 0x000a0623U,
1491 /*012f*/ 0x10060623U,
1492 /*0130*/ 0x18080623U,
1493 /*0131*/ 0xffffffffU,
1494 /*0132*/ 0x00040624U,
1495 /*0133*/ 0xffffffffU,
1496 /*0134*/ 0xffffffffU,
1497 /*0135*/ 0x00010700U,
1498 /*0136*/ 0x08020700U,
1499 /*0137*/ 0x10050700U,
1500 /*0138*/ 0x18050700U,
1501 /*0139*/ 0x00050701U,
1502 /*013a*/ 0x08050701U,
1503 /*013b*/ 0x100b0701U,
1504 /*013c*/ 0x00050702U,
1505 /*013d*/ 0x08010702U,
1506 /*013e*/ 0x10010702U,
1507 /*013f*/ 0xffffffffU,
1508 /*0140*/ 0x18010702U,
1509 /*0141*/ 0x00010703U,
1510 /*0142*/ 0x08040703U,
1511 /*0143*/ 0x100b0703U,
1512 /*0144*/ 0x000b0704U,
1513 /*0145*/ 0xffffffffU,
1514 /*0146*/ 0x10040704U,
1515 /*0147*/ 0x000b0705U,
1516 /*0148*/ 0x10040705U,
1517 /*0149*/ 0x18010705U,
1518 /*014a*/ 0x00010706U,
1519 /*014b*/ 0x08010706U,
1520 /*014c*/ 0x00200707U,
1521 /*014d*/ 0x00200708U,
1522 /*014e*/ 0x00080709U,
1523 /*014f*/ 0x080a0709U,
1524 /*0150*/ 0x18050709U,
1525 /*0151*/ 0x000a070aU,
1526 /*0152*/ 0x1003070aU,
1527 /*0153*/ 0x1803070aU,
1528 /*0154*/ 0x0001070bU,
1529 /*0155*/ 0x0802070bU,
1530 /*0156*/ 0x1001070bU,
1531 /*0157*/ 0x1801070bU,
1532 /*0158*/ 0x0001070cU,
1533 /*0159*/ 0x0802070cU,
1534 /*015a*/ 0xffffffffU,
1535 /*015b*/ 0xffffffffU,
1536 /*015c*/ 0xffffffffU,
1537 /*015d*/ 0xffffffffU,
1538 /*015e*/ 0xffffffffU,
1539 /*015f*/ 0xffffffffU,
1540 /*0160*/ 0xffffffffU,
1541 /*0161*/ 0xffffffffU,
1542 /*0162*/ 0xffffffffU,
1543 /*0163*/ 0xffffffffU,
1544 /*0164*/ 0xffffffffU,
1545 /*0165*/ 0xffffffffU,
1546 /*0166*/ 0x1001070cU,
1547 /*0167*/ 0x1801070cU,
1548 /*0168*/ 0x000d070dU,
1549 /*0169*/ 0xffffffffU,
1550 /*016a*/ 0xffffffffU,
1551 /*016b*/ 0x0005070eU,
1552 /*016c*/ 0x0001070fU,
1553 /*016d*/ 0x080e070fU,
1554 /*016e*/ 0x000e0710U,
1555 /*016f*/ 0x100e0710U,
1556 /*0170*/ 0x000e0711U,
1557 /*0171*/ 0x100e0711U,
1558 /*0172*/ 0x00040712U,
1559 /*0173*/ 0xffffffffU,
1560 /*0174*/ 0xffffffffU,
1561 /*0175*/ 0xffffffffU,
1562 /*0176*/ 0xffffffffU,
1563 /*0177*/ 0x080b0712U,
1564 /*0178*/ 0x000b0713U,
1565 /*0179*/ 0x100b0713U,
1566 /*017a*/ 0x000b0714U,
1567 /*017b*/ 0xffffffffU,
1568 /*017c*/ 0xffffffffU,
1569 /*017d*/ 0xffffffffU,
1570 /*017e*/ 0xffffffffU,
1571 /*017f*/ 0x000d0715U,
1572 /*0180*/ 0xffffffffU,
1573 /*0181*/ 0xffffffffU,
1574 /*0182*/ 0x10100715U,
1575 /*0183*/ 0x00080716U,
1576 /*0184*/ 0xffffffffU,
1577 /*0185*/ 0x08100716U,
1578 /*0186*/ 0x00100717U,
1579 /*0187*/ 0x10100717U,
1580 /*0188*/ 0x00100718U,
1581 /*0189*/ 0x10100718U,
1582 /*018a*/ 0x00030719U,
1583 /*018b*/ 0x08040719U,
1584 /*018c*/ 0x10010719U,
1585 /*018d*/ 0x18040719U,
1586 /*018e*/ 0xffffffffU,
1587 /*018f*/ 0xffffffffU,
1588 /*0190*/ 0x0001071aU,
1589 /*0191*/ 0x0812071aU,
1590 /*0192*/ 0x000a071bU,
1591 /*0193*/ 0x100c071bU,
1592 /*0194*/ 0x0012071cU,
1593 /*0195*/ 0x0014071dU,
1594 /*0196*/ 0x0012071eU,
1595 /*0197*/ 0x0011071fU,
1596 /*0198*/ 0x00110720U,
1597 /*0199*/ 0x00120721U,
1598 /*019a*/ 0x00120722U,
1599 /*019b*/ 0x00120723U,
1600 /*019c*/ 0x00120724U,
1601 /*019d*/ 0x00120725U,
1602 /*019e*/ 0x00120726U,
1603 /*019f*/ 0x00120727U,
1604 /*01a0*/ 0x00120728U,
1605 /*01a1*/ 0xffffffffU,
1606 /*01a2*/ 0xffffffffU,
1607 /*01a3*/ 0x00190729U,
1608 /*01a4*/ 0x0019072aU,
1609 /*01a5*/ 0x0020072bU,
1610 /*01a6*/ 0x0017072cU,
1611 /*01a7*/ 0x1808072cU,
1612 /*01a8*/ 0x0001072dU,
1613 /*01a9*/ 0x0801072dU,
1614 /*01aa*/ 0x0020072eU,
1615 /*01ab*/ 0x0008072fU,
1616 /*01ac*/ 0xffffffffU,
1617 /*01ad*/ 0x0803072fU,
1618 /*01ae*/ 0x00180730U,
1619 /*01af*/ 0x00180731U,
1620 /*01b0*/ 0xffffffffU,
1621 /*01b1*/ 0xffffffffU,
1622 /*01b2*/ 0xffffffffU,
1623 /*01b3*/ 0xffffffffU,
1624 /*01b4*/ 0xffffffffU,
1625 /*01b5*/ 0xffffffffU,
1626 /*01b6*/ 0xffffffffU,
1627 /*01b7*/ 0xffffffffU,
1628 /*01b8*/ 0xffffffffU,
1629 /*01b9*/ 0xffffffffU,
1630 /*01ba*/ 0xffffffffU,
1631 /*01bb*/ 0xffffffffU,
1632 /*01bc*/ 0xffffffffU,
1633 /*01bd*/ 0xffffffffU,
1634 /*01be*/ 0xffffffffU,
1635 /*01bf*/ 0x00100732U,
1636 /*01c0*/ 0x10010732U,
1637 /*01c1*/ 0x18010732U,
1638 /*01c2*/ 0x00050733U,
1639 /*01c3*/ 0x00200734U,
1640 /*01c4*/ 0x00090735U,
1641 /*01c5*/ 0xffffffffU,
1642 /*01c6*/ 0xffffffffU,
1643 /*01c7*/ 0x00200736U,
1644 /*01c8*/ 0x00040737U,
1645 /*01c9*/ 0x08100737U,
1646 /*01ca*/ 0x18060737U,
1647 /*01cb*/ 0x00100738U,
1648 /*01cc*/ 0xffffffffU,
1649 /*01cd*/ 0xffffffffU,
1650 /*01ce*/ 0xffffffffU,
1651 /*01cf*/ 0xffffffffU,
1652 /*01d0*/ 0xffffffffU,
1653 /*01d1*/ 0xffffffffU,
1654 /*01d2*/ 0xffffffffU,
1655 /*01d3*/ 0xffffffffU,
1656 /*01d4*/ 0x00200739U,
1657 /*01d5*/ 0x000b073aU,
1658 /*01d6*/ 0xffffffffU,
1659 /*01d7*/ 0xffffffffU,
1660 /*01d8*/ 0xffffffffU,
1661 /*01d9*/ 0xffffffffU,
1662 /*01da*/ 0xffffffffU,
1663 /*01db*/ 0xffffffffU,
1664 /*01dc*/ 0xffffffffU,
1665 /*01dd*/ 0xffffffffU,
1666 /*01de*/ 0x00010200U,
1667 /*01df*/ 0x08040200U,
1668 /*01e0*/ 0x10100200U,
1669 /*01e1*/ 0x00010201U,
1670 /*01e2*/ 0x08010201U,
1671 /*01e3*/ 0xffffffffU,
1672 /*01e4*/ 0xffffffffU,
1673 /*01e5*/ 0x10100201U,
1674 /*01e6*/ 0xffffffffU,
1675 /*01e7*/ 0xffffffffU,
1676 /*01e8*/ 0xffffffffU,
1677 /*01e9*/ 0xffffffffU,
1678 /*01ea*/ 0xffffffffU,
1679 /*01eb*/ 0xffffffffU,
1680 /*01ec*/ 0xffffffffU,
1681 /*01ed*/ 0xffffffffU,
1682 /*01ee*/ 0xffffffffU,
1683 /*01ef*/ 0x00200202U,
1684 /*01f0*/ 0x00100203U,
1685 /*01f1*/ 0x00200204U,
1686 /*01f2*/ 0x00100205U,
1687 /*01f3*/ 0x00200206U,
1688 /*01f4*/ 0x00100207U,
1689 /*01f5*/ 0x10100207U,
1690 /*01f6*/ 0x00200208U,
1691 /*01f7*/ 0x00200209U,
1692 /*01f8*/ 0x0020020aU,
1693 /*01f9*/ 0x0020020bU,
1694 /*01fa*/ 0x0010020cU,
1695 /*01fb*/ 0x0020020dU,
1696 /*01fc*/ 0x0020020eU,
1697 /*01fd*/ 0x0020020fU,
1698 /*01fe*/ 0x00200210U,
1699 /*01ff*/ 0x00100211U,
1700 /*0200*/ 0x00200212U,
1701 /*0201*/ 0x00200213U,
1702 /*0202*/ 0x00200214U,
1703 /*0203*/ 0x00200215U,
1704 /*0204*/ 0x00090216U,
1705 /*0205*/ 0x10010216U,
1706 /*0206*/ 0x00200217U,
1707 /*0207*/ 0x00050218U,
1708 /*0208*/ 0x08010218U,
1709 /*0209*/ 0x10080218U,
1710 /*020a*/ 0x18080218U,
1711 /*020b*/ 0x001c0219U,
1712 /*020c*/ 0x001c021aU,
1713 /*020d*/ 0x001c021bU,
1714 /*020e*/ 0x001c021cU,
1715 /*020f*/ 0x001c021dU,
1716 /*0210*/ 0x001c021eU,
1717 /*0211*/ 0x001c021fU,
1718 /*0212*/ 0x001c0220U,
1719 /*0213*/ 0x001c0221U,
1720 /*0214*/ 0x001c0222U,
1721 /*0215*/ 0x001c0223U,
1722 /*0216*/ 0x001c0224U,
1723 /*0217*/ 0x001c0225U,
1724 /*0218*/ 0x001c0226U,
1725 /*0219*/ 0x001c0227U,
1726 /*021a*/ 0x001c0228U,
1727 /*021b*/ 0x00010229U,
1728 /*021c*/ 0x08010229U,
1729 /*021d*/ 0x10010229U,
1730 /*021e*/ 0x18040229U,
1731 /*021f*/ 0x0008022aU,
1732 /*0220*/ 0x0808022aU,
1733 /*0221*/ 0x1008022aU,
1734 /*0222*/ 0x1804022aU,
1735 /*0223*/ 0x0006022bU,
1736 /*0224*/ 0xffffffffU,
1737 /*0225*/ 0x0807022bU,
1738 /*0226*/ 0x1006022bU,
1739 /*0227*/ 0xffffffffU,
1740 /*0228*/ 0x1807022bU,
1741 /*0229*/ 0x0006022cU,
1742 /*022a*/ 0xffffffffU,
1743 /*022b*/ 0x0807022cU,
1744 /*022c*/ 0x1002022cU,
1745 /*022d*/ 0x1801022cU,
1746 /*022e*/ 0xffffffffU,
1747 /*022f*/ 0x000a022dU,
1748 /*0230*/ 0x1010022dU,
1749 /*0231*/ 0x000a022eU,
1750 /*0232*/ 0x1010022eU,
1751 /*0233*/ 0x000a022fU,
1752 /*0234*/ 0x1010022fU,
1753 /*0235*/ 0xffffffffU,
1754 /*0236*/ 0x00100230U,
1755 /*0237*/ 0xffffffffU,
1756 /*0238*/ 0xffffffffU,
1757 /*0239*/ 0x10010230U,
1758 /*023a*/ 0x18010230U,
1759 /*023b*/ 0x00010231U,
1760 /*023c*/ 0x08010231U,
1761 /*023d*/ 0x10010231U,
1762 /*023e*/ 0x18010231U,
1763 /*023f*/ 0x00020232U,
1764 /*0240*/ 0x08020232U,
1765 /*0241*/ 0x10020232U,
1766 /*0242*/ 0x18020232U,
1767 /*0243*/ 0x00020233U,
1768 /*0244*/ 0x08030233U,
1769 /*0245*/ 0x10010233U,
1770 /*0246*/ 0x18010233U,
1771 /*0247*/ 0x00010234U,
1772 /*0248*/ 0x08010234U,
1773 /*0249*/ 0xffffffffU,
1774 /*024a*/ 0x10020234U,
1775 /*024b*/ 0x18010234U,
1776 /*024c*/ 0x00010235U,
1777 /*024d*/ 0xffffffffU,
1778 /*024e*/ 0x08020235U,
1779 /*024f*/ 0x10010235U,
1780 /*0250*/ 0x18010235U,
1781 /*0251*/ 0xffffffffU,
1782 /*0252*/ 0x00020236U,
1783 /*0253*/ 0x08010236U,
1784 /*0254*/ 0x10010236U,
1785 /*0255*/ 0xffffffffU,
1786 /*0256*/ 0x18020236U,
1787 /*0257*/ 0x00070237U,
1788 /*0258*/ 0x08010237U,
1789 /*0259*/ 0x10010237U,
1790 /*025a*/ 0x18010237U,
1791 /*025b*/ 0x00010238U,
1792 /*025c*/ 0x08010238U,
1793 /*025d*/ 0x10010238U,
1794 /*025e*/ 0xffffffffU,
1795 /*025f*/ 0x18010238U,
1796 /*0260*/ 0x00040239U,
1797 /*0261*/ 0x08040239U,
1798 /*0262*/ 0x10040239U,
1799 /*0263*/ 0x18010239U,
1800 /*0264*/ 0x0002023aU,
1801 /*0265*/ 0x0806023aU,
1802 /*0266*/ 0x1006023aU,
1803 /*0267*/ 0xffffffffU,
1804 /*0268*/ 0xffffffffU,
1805 /*0269*/ 0xffffffffU,
1806 /*026a*/ 0x1802023aU,
1807 /*026b*/ 0x0010023bU,
1808 /*026c*/ 0x1001023bU,
1809 /*026d*/ 0x1801023bU,
1810 /*026e*/ 0xffffffffU,
1811 /*026f*/ 0x0004023cU,
1812 /*0270*/ 0x0801023cU,
1813 /*0271*/ 0x1004023cU,
1814 /*0272*/ 0x1802023cU,
1815 /*0273*/ 0x0008023dU,
1816 /*0274*/ 0xffffffffU,
1817 /*0275*/ 0xffffffffU,
1818 /*0276*/ 0xffffffffU,
1819 /*0277*/ 0x080a023dU,
1820 /*0278*/ 0x0020023eU,
1821 /*0279*/ 0x0020023fU,
1822 /*027a*/ 0x00050240U,
1823 /*027b*/ 0x08010240U,
1824 /*027c*/ 0x10050240U,
1825 /*027d*/ 0x18080240U,
1826 /*027e*/ 0x00010241U,
1827 /*027f*/ 0x08080241U,
1828 /*0280*/ 0x10010241U,
1829 /*0281*/ 0x18080241U,
1830 /*0282*/ 0x00010242U,
1831 /*0283*/ 0x08040242U,
1832 /*0284*/ 0x10040242U,
1833 /*0285*/ 0x18040242U,
1834 /*0286*/ 0x00040243U,
1835 /*0287*/ 0x08040243U,
1836 /*0288*/ 0x10040243U,
1837 /*0289*/ 0x18040243U,
1838 /*028a*/ 0x00040244U,
1839 /*028b*/ 0x08040244U,
1840 /*028c*/ 0x10040244U,
1841 /*028d*/ 0x18010244U,
1842 /*028e*/ 0x00040245U,
1843 /*028f*/ 0x08040245U,
1844 /*0290*/ 0x10040245U,
1845 /*0291*/ 0x18040245U,
1846 /*0292*/ 0x00040246U,
1847 /*0293*/ 0x08040246U,
1848 /*0294*/ 0x10060246U,
1849 /*0295*/ 0x18060246U,
1850 /*0296*/ 0x00060247U,
1851 /*0297*/ 0x08060247U,
1852 /*0298*/ 0x10060247U,
1853 /*0299*/ 0x18060247U,
1854 /*029a*/ 0xffffffffU,
1855 /*029b*/ 0x00010248U,
1856 /*029c*/ 0x08010248U,
1857 /*029d*/ 0x10020248U,
1858 /*029e*/ 0xffffffffU,
1859 /*029f*/ 0xffffffffU,
1860 /*02a0*/ 0xffffffffU,
1861 /*02a1*/ 0xffffffffU,
1862 /*02a2*/ 0xffffffffU,
1863 /*02a3*/ 0xffffffffU,
1864 /*02a4*/ 0xffffffffU,
1865 /*02a5*/ 0xffffffffU,
1866 /*02a6*/ 0x18040248U,
1867 /*02a7*/ 0x00040249U,
1868 /*02a8*/ 0x08010249U,
1869 /*02a9*/ 0x10010249U,
1870 /*02aa*/ 0xffffffffU,
1871 /*02ab*/ 0x18010249U,
1872 /*02ac*/ 0x0001024aU,
1873 /*02ad*/ 0xffffffffU,
1874 /*02ae*/ 0x0801024aU,
1875 /*02af*/ 0x1001024aU,
1876 /*02b0*/ 0x1801024aU,
1877 /*02b1*/ 0x0004024bU,
1878 /*02b2*/ 0x0804024bU,
1879 /*02b3*/ 0x100a024bU,
1880 /*02b4*/ 0x0020024cU,
1881 /*02b5*/ 0x0004024dU,
1882 /*02b6*/ 0x0808024dU,
1883 /*02b7*/ 0xffffffffU,
1884 /*02b8*/ 0xffffffffU,
1885 /*02b9*/ 0xffffffffU,
1886 /*02ba*/ 0xffffffffU,
1887 /*02bb*/ 0xffffffffU,
1888 /*02bc*/ 0xffffffffU,
1889 /*02bd*/ 0x1002024dU,
1890 /*02be*/ 0x1802024dU,
1891 /*02bf*/ 0x0020024eU,
1892 /*02c0*/ 0x0002024fU,
1893 /*02c1*/ 0x0810024fU,
1894 /*02c2*/ 0x00100250U,
1895 /*02c3*/ 0x10040250U,
1896 /*02c4*/ 0x18040250U,
1897 /*02c5*/ 0x00050251U,
1898 /*02c6*/ 0x08050251U,
1899 /*02c7*/ 0xffffffffU,
1900 /*02c8*/ 0xffffffffU,
1901 /*02c9*/ 0xffffffffU,
1902 /*02ca*/ 0xffffffffU,
1903 /*02cb*/ 0x10010251U,
1904 /*02cc*/ 0x18010251U,
1905 /*02cd*/ 0x00070252U,
1906 /*02ce*/ 0x08070252U,
1907 /*02cf*/ 0x10070252U,
1908 /*02d0*/ 0x18070252U,
1909 /*02d1*/ 0x00070253U,
1910 /*02d2*/ 0x08070253U,
1911 /*02d3*/ 0x10070253U,
1912 /*02d4*/ 0x18070253U,
1913 /*02d5*/ 0x00070254U,
1914 /*02d6*/ 0x08070254U,
1915 /*02d7*/ 0x10070254U,
1916 /*02d8*/ 0xffffffffU,
1917 /*02d9*/ 0xffffffffU,
1918 /*02da*/ 0xffffffffU,
1919 /*02db*/ 0xffffffffU,
1920 /*02dc*/ 0xffffffffU,
1921 /*02dd*/ 0xffffffffU,
1922 /*02de*/ 0x18030254U,
1923 /*02df*/ 0x00010255U,
1924 /*02e0*/ 0x08020255U,
1925 /*02e1*/ 0x10010255U,
1926 /*02e2*/ 0x18040255U,
1927 /*02e3*/ 0x00020256U,
1928 /*02e4*/ 0x08010256U,
1929 /*02e5*/ 0x10010256U,
1930 /*02e6*/ 0xffffffffU,
1931 /*02e7*/ 0x18010256U,
1932 /*02e8*/ 0x00040257U,
1933 /*02e9*/ 0x08080257U,
1934 /*02ea*/ 0x100a0257U,
1935 /*02eb*/ 0x000a0258U,
1936 /*02ec*/ 0x100a0258U,
1937 /*02ed*/ 0x000a0259U,
1938 /*02ee*/ 0x100a0259U,
1939 /*02ef*/ 0x000a025aU,
1940 /*02f0*/ 0x0020025bU,
1941 /*02f1*/ 0x0020025cU,
1942 /*02f2*/ 0x0001025dU,
1943 /*02f3*/ 0xffffffffU,
1944 /*02f4*/ 0xffffffffU,
1945 /*02f5*/ 0xffffffffU,
1946 /*02f6*/ 0x0802025dU,
1947 /*02f7*/ 0x1002025dU,
1948 /*02f8*/ 0x0010025eU,
1949 /*02f9*/ 0x1005025eU,
1950 /*02fa*/ 0x1806025eU,
1951 /*02fb*/ 0x0005025fU,
1952 /*02fc*/ 0x0805025fU,
1953 /*02fd*/ 0x100e025fU,
1954 /*02fe*/ 0x00050260U,
1955 /*02ff*/ 0x080e0260U,
1956 /*0300*/ 0x18050260U,
1957 /*0301*/ 0x000e0261U,
1958 /*0302*/ 0x10050261U,
1959 /*0303*/ 0x18010261U,
1960 /*0304*/ 0x00050262U,
1961 /*0305*/ 0x08050262U,
1962 /*0306*/ 0x100a0262U,
1963 /*0307*/ 0x000a0263U,
1964 /*0308*/ 0x10050263U,
1965 /*0309*/ 0x18050263U,
1966 /*030a*/ 0x000a0264U,
1967 /*030b*/ 0x100a0264U,
1968 /*030c*/ 0x00050265U,
1969 /*030d*/ 0x08050265U,
1970 /*030e*/ 0x100a0265U,
1971 /*030f*/ 0x000a0266U,
1972 /*0310*/ 0xffffffffU,
1973 /*0311*/ 0xffffffffU,
1974 /*0312*/ 0xffffffffU,
1975 /*0313*/ 0xffffffffU,
1976 /*0314*/ 0xffffffffU,
1977 /*0315*/ 0xffffffffU,
1978 /*0316*/ 0x10070266U,
1979 /*0317*/ 0x18070266U,
1980 /*0318*/ 0x00040267U,
1981 /*0319*/ 0x08040267U,
1982 /*031a*/ 0xffffffffU,
1983 /*031b*/ 0xffffffffU,
1984 /*031c*/ 0xffffffffU,
1985 /*031d*/ 0x10040267U,
1986 /*031e*/ 0x18080267U,
1987 /*031f*/ 0x00080268U,
1988 /*0320*/ 0x08040268U,
1989 /*0321*/ 0xffffffffU,
1990 /*0322*/ 0xffffffffU,
1991 /*0323*/ 0xffffffffU,
1992 /*0324*/ 0x10040268U,
1993 /*0325*/ 0xffffffffU,
1994 /*0326*/ 0xffffffffU,
1995 /*0327*/ 0xffffffffU,
1996 /*0328*/ 0x18040268U,
1997 /*0329*/ 0xffffffffU,
1998 /*032a*/ 0xffffffffU,
1999 /*032b*/ 0xffffffffU,
2000 /*032c*/ 0x00040269U,
2001 /*032d*/ 0x08050269U,
2002 /*032e*/ 0x10070269U,
2003 /*032f*/ 0x18080269U,
2004 /*0330*/ 0x0010026aU,
2005 /*0331*/ 0x1008026aU,
2006 /*0332*/ 0x0010026bU,
2007 /*0333*/ 0x1008026bU,
2008 /*0334*/ 0x0010026cU,
2009 /*0335*/ 0x1008026cU,
2010 /*0336*/ 0x1808026cU,
2011 /*0337*/ 0x0001026dU,
2012 /*0338*/ 0x0801026dU,
2013 /*0339*/ 0x1006026dU,
2014 /*033a*/ 0x1806026dU,
2015 /*033b*/ 0x0006026eU,
2016 /*033c*/ 0xffffffffU,
2017 /*033d*/ 0x0801026eU,
2018 /*033e*/ 0x1003026eU,
2019 /*033f*/ 0xffffffffU,
2020 /*0340*/ 0xffffffffU,
2021 /*0341*/ 0xffffffffU,
2022 /*0342*/ 0x000a026fU,
2023 /*0343*/ 0x100a026fU,
2024 /*0344*/ 0x00040270U,
2025 /*0345*/ 0x08010270U,
2026 /*0346*/ 0x10040270U,
2027 /*0347*/ 0xffffffffU,
2028 /*0348*/ 0xffffffffU,
2029 /*0349*/ 0xffffffffU,
2030 /*034a*/ 0xffffffffU,
2031 /*034b*/ 0xffffffffU,
2032 /*034c*/ 0xffffffffU,
2033 /*034d*/ 0x18070270U,
2034 /*034e*/ 0x00070271U,
2035 /*034f*/ 0x08050271U,
2036 /*0350*/ 0x10050271U,
2037 /*0351*/ 0xffffffffU,
2038 /*0352*/ 0xffffffffU,
2039 /*0353*/ 0xffffffffU,
2040 /*0354*/ 0x18040271U,
2041 /*0355*/ 0x00010272U,
2042 /*0356*/ 0x08010272U,
2043 /*0357*/ 0x10020272U,
2044 /*0358*/ 0x18080272U,
2045 /*0359*/ 0x00200273U,
2046 /*035a*/ 0x00200274U,
2047 /*035b*/ 0x00100275U,
2048 /*035c*/ 0xffffffffU,
2049 /*035d*/ 0xffffffffU,
2050 /*035e*/ 0xffffffffU,
2051 /*035f*/ 0x10020275U,
2052 /*0360*/ 0x18010275U,
2053 /*0361*/ 0xffffffffU,
2054 /*0362*/ 0x00020276U,
2055 /*0363*/ 0x08080276U,
2056 /*0364*/ 0x10080276U,
2057 /*0365*/ 0x18080276U,
2058 /*0366*/ 0x00080277U,
2059 /*0367*/ 0x08080277U,
2060 /*0368*/ 0x10080277U,
2061 /*0369*/ 0xffffffffU,
2062 /*036a*/ 0x18080277U,
2063 /*036b*/ 0x00080278U,
2064 /*036c*/ 0x08080278U,
2065 /*036d*/ 0x10080278U,
2066 /*036e*/ 0x18080278U,
2067 /*036f*/ 0x00080279U,
2068 /*0370*/ 0xffffffffU,
2069 /*0371*/ 0x08080279U,
2070 /*0372*/ 0x10080279U,
2071 /*0373*/ 0x18080279U,
2072 /*0374*/ 0x0008027aU,
2073 /*0375*/ 0x0808027aU,
2074 /*0376*/ 0x1008027aU,
2075 /*0377*/ 0xffffffffU,
2076 /*0378*/ 0x1808027aU,
2077 /*0379*/ 0x0008027bU,
2078 /*037a*/ 0x0808027bU,
2079 /*037b*/ 0x1008027bU,
2080 /*037c*/ 0x1808027bU,
2081 /*037d*/ 0x0008027cU,
2082 /*037e*/ 0x0808027cU,
2083 /*037f*/ 0xffffffffU,
2084 /*0380*/ 0x1008027cU,
2085 /*0381*/ 0x1808027cU,
2086 /*0382*/ 0x0008027dU,
2087 /*0383*/ 0x0808027dU,
2088 /*0384*/ 0x1008027dU,
2089 /*0385*/ 0x1808027dU,
2090 /*0386*/ 0xffffffffU,
2091 /*0387*/ 0x0008027eU,
2092 /*0388*/ 0x0808027eU,
2093 /*0389*/ 0x1008027eU,
2094 /*038a*/ 0x1808027eU,
2095 /*038b*/ 0x0008027fU,
2096 /*038c*/ 0x0808027fU,
2097 /*038d*/ 0xffffffffU,
2098 /*038e*/ 0x1008027fU,
2099 /*038f*/ 0x1808027fU,
2100 /*0390*/ 0x00080280U,
2101 /*0391*/ 0x08080280U,
2102 /*0392*/ 0x10080280U,
2103 /*0393*/ 0x18080280U,
2104 /*0394*/ 0x00080281U,
2105 /*0395*/ 0xffffffffU,
2106 /*0396*/ 0x08080281U,
2107 /*0397*/ 0x10080281U,
2108 /*0398*/ 0x18080281U,
2109 /*0399*/ 0x00080282U,
2110 /*039a*/ 0x08080282U,
2111 /*039b*/ 0x10080282U,
2112 /*039c*/ 0xffffffffU,
2113 /*039d*/ 0x18080282U,
2114 /*039e*/ 0x00080283U,
2115 /*039f*/ 0x08080283U,
2116 /*03a0*/ 0x10080283U,
2117 /*03a1*/ 0x18080283U,
2118 /*03a2*/ 0x00080284U,
2119 /*03a3*/ 0xffffffffU,
2120 /*03a4*/ 0x08080284U,
2121 /*03a5*/ 0x10080284U,
2122 /*03a6*/ 0x18080284U,
2123 /*03a7*/ 0x00080285U,
2124 /*03a8*/ 0x08080285U,
2125 /*03a9*/ 0x10080285U,
2126 /*03aa*/ 0x18080285U,
2127 /*03ab*/ 0xffffffffU,
2128 /*03ac*/ 0x00080286U,
2129 /*03ad*/ 0x08080286U,
2130 /*03ae*/ 0x10080286U,
2131 /*03af*/ 0x18080286U,
2132 /*03b0*/ 0x00080287U,
2133 /*03b1*/ 0x08080287U,
2134 /*03b2*/ 0xffffffffU,
2135 /*03b3*/ 0x10080287U,
2136 /*03b4*/ 0x18080287U,
2137 /*03b5*/ 0x00080288U,
2138 /*03b6*/ 0x08080288U,
2139 /*03b7*/ 0x10080288U,
2140 /*03b8*/ 0x18080288U,
2141 /*03b9*/ 0xffffffffU,
2142 /*03ba*/ 0x00080289U,
2143 /*03bb*/ 0x08020289U,
2144 /*03bc*/ 0x10030289U,
2145 /*03bd*/ 0x000a028aU,
2146 /*03be*/ 0x100a028aU,
2147 /*03bf*/ 0x000a028bU,
2148 /*03c0*/ 0x1005028bU,
2149 /*03c1*/ 0x1804028bU,
2150 /*03c2*/ 0x0008028cU,
2151 /*03c3*/ 0x0808028cU,
2152 /*03c4*/ 0x1006028cU,
2153 /*03c5*/ 0x1806028cU,
2154 /*03c6*/ 0x0011028dU,
2155 /*03c7*/ 0x1808028dU,
2156 /*03c8*/ 0x0004028eU,
2157 /*03c9*/ 0x0806028eU,
2158 /*03ca*/ 0xffffffffU,
2159 /*03cb*/ 0x1006028eU,
2160 /*03cc*/ 0x1808028eU,
2161 /*03cd*/ 0xffffffffU,
2162 /*03ce*/ 0x0004028fU,
2163 /*03cf*/ 0x0808028fU,
2164 /*03d0*/ 0x1008028fU,
2165 /*03d1*/ 0x1806028fU,
2166 /*03d2*/ 0x00060290U,
2167 /*03d3*/ 0x08110290U,
2168 /*03d4*/ 0x00080291U,
2169 /*03d5*/ 0x08040291U,
2170 /*03d6*/ 0x10060291U,
2171 /*03d7*/ 0xffffffffU,
2172 /*03d8*/ 0x18060291U,
2173 /*03d9*/ 0x00080292U,
2174 /*03da*/ 0xffffffffU,
2175 /*03db*/ 0x08040292U,
2176 /*03dc*/ 0x10080292U,
2177 /*03dd*/ 0x18080292U,
2178 /*03de*/ 0x00060293U,
2179 /*03df*/ 0x08060293U,
2180 /*03e0*/ 0x00110294U,
2181 /*03e1*/ 0x18080294U,
2182 /*03e2*/ 0x00040295U,
2183 /*03e3*/ 0x08060295U,
2184 /*03e4*/ 0xffffffffU,
2185 /*03e5*/ 0x10060295U,
2186 /*03e6*/ 0x18080295U,
2187 /*03e7*/ 0xffffffffU,
2188 /*03e8*/ 0x00040296U,
2189 /*03e9*/ 0x08040296U,
2190 /*03ea*/ 0x10040296U,
2191 /*03eb*/ 0x18040296U,
2192 /*03ec*/ 0x00040297U,
2193 /*03ed*/ 0x08040297U,
2194 /*03ee*/ 0x10040297U,
2195 /*03ef*/ 0x18040297U,
2196 /*03f0*/ 0x00040298U,
2197 /*03f1*/ 0x08040298U,
2198 /*03f2*/ 0x10040298U,
2199 /*03f3*/ 0x18040298U,
2200 /*03f4*/ 0x00040299U,
2201 /*03f5*/ 0x08040299U,
2202 /*03f6*/ 0x10040299U,
2203 /*03f7*/ 0x18040299U,
2204 /*03f8*/ 0x0004029aU,
2205 /*03f9*/ 0x0804029aU,
2206 /*03fa*/ 0x1004029aU,
2207 /*03fb*/ 0x1804029aU,
2208 /*03fc*/ 0x0011029bU,
2209 /*03fd*/ 0x0010029cU,
2210 /*03fe*/ 0x0011029dU,
2211 /*03ff*/ 0x0020029eU,
2212 /*0400*/ 0x0020029fU,
2213 /*0401*/ 0x002002a0U,
2214 /*0402*/ 0x002002a1U,
2215 /*0403*/ 0x002002a2U,
2216 /*0404*/ 0x002002a3U,
2217 /*0405*/ 0x002002a4U,
2218 /*0406*/ 0x002002a5U,
2219 /*0407*/ 0x002002a6U,
2220 /*0408*/ 0x000202a7U,
2221 /*0409*/ 0x080502a7U,
2222 /*040a*/ 0x100502a7U,
2223 /*040b*/ 0xffffffffU,
2224 /*040c*/ 0xffffffffU,
2225 /*040d*/ 0xffffffffU,
2226 /*040e*/ 0xffffffffU,
2227 /*040f*/ 0xffffffffU,
2228 /*0410*/ 0xffffffffU,
2229 /*0411*/ 0xffffffffU,
2230 /*0412*/ 0xffffffffU,
2231 /*0413*/ 0xffffffffU,
2232 /*0414*/ 0xffffffffU,
2233 /*0415*/ 0xffffffffU,
2234 /*0416*/ 0xffffffffU,
2235 /*0417*/ 0xffffffffU,
2236 /*0418*/ 0xffffffffU,
2237 /*0419*/ 0xffffffffU,
2238 /*041a*/ 0xffffffffU,
2239 /*041b*/ 0xffffffffU,
2240 /*041c*/ 0xffffffffU,
2241 /*041d*/ 0xffffffffU,
2242 /*041e*/ 0xffffffffU,
2243 /*041f*/ 0xffffffffU,
2244 /*0420*/ 0xffffffffU,
2245 /*0421*/ 0xffffffffU,
2246 /*0422*/ 0xffffffffU,
2247 /*0423*/ 0xffffffffU,
2248 /*0424*/ 0xffffffffU,
2249 /*0425*/ 0xffffffffU,
2250 /*0426*/ 0xffffffffU,
2251 /*0427*/ 0x180102a7U,
2252 /*0428*/ 0x000402a8U,
2253 /*0429*/ 0x081002a8U,
2254 /*042a*/ 0x002002a9U,
2255 /*042b*/ 0x001002aaU,
2256 /*042c*/ 0x002002abU,
2257 /*042d*/ 0x001002acU,
2258 /*042e*/ 0x002002adU,
2259 /*042f*/ 0x000702aeU,
2260 /*0430*/ 0x080102aeU,
2261 /*0431*/ 0x100202aeU,
2262 /*0432*/ 0x180602aeU,
2263 /*0433*/ 0x000102afU,
2264 /*0434*/ 0x080102afU,
2265 /*0435*/ 0x002002b0U,
2266 /*0436*/ 0x000202b1U,
2267 /*0437*/ 0x002002b2U,
2268 /*0438*/ 0x002002b3U,
2269 /*0439*/ 0xffffffffU,
2270 /*043a*/ 0xffffffffU,
2271 /*043b*/ 0xffffffffU,
2272 /*043c*/ 0xffffffffU,
2273 /*043d*/ 0xffffffffU,
2274 /*043e*/ 0xffffffffU,
2275 /*043f*/ 0xffffffffU,
2276 /*0440*/ 0xffffffffU,
2277 /*0441*/ 0xffffffffU,
2278 /*0442*/ 0xffffffffU,
2279 /*0443*/ 0xffffffffU,
2280 /*0444*/ 0xffffffffU,
2281 /*0445*/ 0xffffffffU,
2282 /*0446*/ 0xffffffffU,
2283 /*0447*/ 0xffffffffU,
2284 /*0448*/ 0xffffffffU,
2285 /*0449*/ 0xffffffffU,
2286 /*044a*/ 0xffffffffU,
2287 /*044b*/ 0xffffffffU,
2288 /*044c*/ 0xffffffffU,
2289 /*044d*/ 0xffffffffU,
2290 /*044e*/ 0xffffffffU,
2291 /*044f*/ 0xffffffffU,
2292 /*0450*/ 0xffffffffU,
2293 /*0451*/ 0xffffffffU,
2294 /*0452*/ 0xffffffffU,
2295 /*0453*/ 0xffffffffU,
2296 /*0454*/ 0xffffffffU,
2297 /*0455*/ 0xffffffffU,
2298 /*0456*/ 0xffffffffU,
2299 /*0457*/ 0xffffffffU,
2300 /*0458*/ 0xffffffffU,
2301 /*0459*/ 0xffffffffU,
2302 /*045a*/ 0xffffffffU,
2303 /*045b*/ 0xffffffffU,
2304 /*045c*/ 0xffffffffU,
2305 /*045d*/ 0xffffffffU,
2306 /*045e*/ 0xffffffffU,
2307 /*045f*/ 0x000402b4U,
2308 /*0460*/ 0xffffffffU,
2309 /*0461*/ 0xffffffffU,
2310 /*0462*/ 0xffffffffU,
2311 /*0463*/ 0xffffffffU,
2312 /*0464*/ 0xffffffffU,
2313 /*0465*/ 0xffffffffU,
2314 /*0466*/ 0xffffffffU,
2315 /*0467*/ 0xffffffffU,
2316 /*0468*/ 0xffffffffU,
2317 /*0469*/ 0xffffffffU,
2318 /*046a*/ 0xffffffffU,
2319 /*046b*/ 0xffffffffU,
2320 /*046c*/ 0xffffffffU,
2321 /*046d*/ 0xffffffffU,
2322 /*046e*/ 0xffffffffU,
2323 /*046f*/ 0xffffffffU,
2324 /*0470*/ 0xffffffffU,
2325 /*0471*/ 0xffffffffU,
2326 /*0472*/ 0xffffffffU,
2327 /*0473*/ 0xffffffffU,
2328 /*0474*/ 0xffffffffU,
2329 /*0475*/ 0xffffffffU,
2330 /*0476*/ 0xffffffffU,
2331 /*0477*/ 0xffffffffU,
2332 /*0478*/ 0xffffffffU,
2333 /*0479*/ 0xffffffffU,
2334 /*047a*/ 0xffffffffU,
2335 /*047b*/ 0xffffffffU,
2336 /*047c*/ 0xffffffffU,
2337 /*047d*/ 0xffffffffU,
2338 /*047e*/ 0xffffffffU,
2339 /*047f*/ 0xffffffffU,
2340 /*0480*/ 0xffffffffU,
2341 /*0481*/ 0xffffffffU,
2342 /*0482*/ 0xffffffffU,
2343 /*0483*/ 0xffffffffU,
2344 /*0484*/ 0xffffffffU,
2345 /*0485*/ 0xffffffffU,
2346 /*0486*/ 0xffffffffU,
2347 /*0487*/ 0xffffffffU,
2348 /*0488*/ 0xffffffffU,
2349 /*0489*/ 0xffffffffU,
2350 /*048a*/ 0xffffffffU,
2351 /*048b*/ 0xffffffffU,
2352 /*048c*/ 0xffffffffU,
2353 /*048d*/ 0xffffffffU,
2354 /*048e*/ 0xffffffffU,
2355 /*048f*/ 0xffffffffU,
2356 /*0490*/ 0xffffffffU,
2357 /*0491*/ 0xffffffffU,
2358 /*0492*/ 0xffffffffU,
2359 /*0493*/ 0xffffffffU,
2360 /*0494*/ 0xffffffffU,
2361 	 },
2362 	{
2363 /*0000*/ 0x00200800U,
2364 /*0001*/ 0x00040801U,
2365 /*0002*/ 0x080b0801U,
2366 /*0003*/ 0xffffffffU,
2367 /*0004*/ 0xffffffffU,
2368 /*0005*/ 0x18010801U,
2369 /*0006*/ 0x00050802U,
2370 /*0007*/ 0x08050802U,
2371 /*0008*/ 0x10050802U,
2372 /*0009*/ 0x18050802U,
2373 /*000a*/ 0x00050803U,
2374 /*000b*/ 0x08050803U,
2375 /*000c*/ 0x10050803U,
2376 /*000d*/ 0x18050803U,
2377 /*000e*/ 0x00050804U,
2378 /*000f*/ 0x08040804U,
2379 /*0010*/ 0x10030804U,
2380 /*0011*/ 0x00180805U,
2381 /*0012*/ 0x18030805U,
2382 /*0013*/ 0x00180806U,
2383 /*0014*/ 0x18020806U,
2384 /*0015*/ 0x00010807U,
2385 /*0016*/ 0x08020807U,
2386 /*0017*/ 0x10010807U,
2387 /*0018*/ 0x18010807U,
2388 /*0019*/ 0x00020808U,
2389 /*001a*/ 0x08040808U,
2390 /*001b*/ 0x10040808U,
2391 /*001c*/ 0x18040808U,
2392 /*001d*/ 0x000a0809U,
2393 /*001e*/ 0x10040809U,
2394 /*001f*/ 0xffffffffU,
2395 /*0020*/ 0xffffffffU,
2396 /*0021*/ 0x18070809U,
2397 /*0022*/ 0xffffffffU,
2398 /*0023*/ 0xffffffffU,
2399 /*0024*/ 0xffffffffU,
2400 /*0025*/ 0xffffffffU,
2401 /*0026*/ 0xffffffffU,
2402 /*0027*/ 0xffffffffU,
2403 /*0028*/ 0x000a080aU,
2404 /*0029*/ 0x1005080aU,
2405 /*002a*/ 0x1801080aU,
2406 /*002b*/ 0x0001080bU,
2407 /*002c*/ 0x0802080bU,
2408 /*002d*/ 0x1009080bU,
2409 /*002e*/ 0x0009080cU,
2410 /*002f*/ 0x1002080cU,
2411 /*0030*/ 0x0020080dU,
2412 /*0031*/ 0xffffffffU,
2413 /*0032*/ 0x0001080eU,
2414 /*0033*/ 0xffffffffU,
2415 /*0034*/ 0xffffffffU,
2416 /*0035*/ 0xffffffffU,
2417 /*0036*/ 0xffffffffU,
2418 /*0037*/ 0x0020080fU,
2419 /*0038*/ 0x00200810U,
2420 /*0039*/ 0x00200811U,
2421 /*003a*/ 0x00200812U,
2422 /*003b*/ 0x00030813U,
2423 /*003c*/ 0x08010813U,
2424 /*003d*/ 0x10030813U,
2425 /*003e*/ 0x18030813U,
2426 /*003f*/ 0x00040814U,
2427 /*0040*/ 0x08040814U,
2428 /*0041*/ 0x10040814U,
2429 /*0042*/ 0x18040814U,
2430 /*0043*/ 0x00010815U,
2431 /*0044*/ 0x08010815U,
2432 /*0045*/ 0x10060815U,
2433 /*0046*/ 0x18040815U,
2434 /*0047*/ 0xffffffffU,
2435 /*0048*/ 0x00060816U,
2436 /*0049*/ 0x08040816U,
2437 /*004a*/ 0x10060816U,
2438 /*004b*/ 0x18040816U,
2439 /*004c*/ 0x00020817U,
2440 /*004d*/ 0x08050817U,
2441 /*004e*/ 0x10080817U,
2442 /*004f*/ 0x00200818U,
2443 /*0050*/ 0x00060819U,
2444 /*0051*/ 0x08030819U,
2445 /*0052*/ 0x100b0819U,
2446 /*0053*/ 0x0004081aU,
2447 /*0054*/ 0x0804081aU,
2448 /*0055*/ 0x1004081aU,
2449 /*0056*/ 0xffffffffU,
2450 /*0057*/ 0x1801081aU,
2451 /*0058*/ 0x0009081bU,
2452 /*0059*/ 0x0020081cU,
2453 /*005a*/ 0x0020081dU,
2454 /*005b*/ 0x0020081eU,
2455 /*005c*/ 0x0020081fU,
2456 /*005d*/ 0x00100820U,
2457 /*005e*/ 0xffffffffU,
2458 /*005f*/ 0x10010820U,
2459 /*0060*/ 0x18060820U,
2460 /*0061*/ 0x00080821U,
2461 /*0062*/ 0x00200822U,
2462 /*0063*/ 0xffffffffU,
2463 /*0064*/ 0x000a0823U,
2464 /*0065*/ 0x10060823U,
2465 /*0066*/ 0x18070823U,
2466 /*0067*/ 0x00080824U,
2467 /*0068*/ 0x08080824U,
2468 /*0069*/ 0x100a0824U,
2469 /*006a*/ 0x00070825U,
2470 /*006b*/ 0x08080825U,
2471 /*006c*/ 0x10080825U,
2472 /*006d*/ 0x18030825U,
2473 /*006e*/ 0x000a0826U,
2474 /*006f*/ 0x100a0826U,
2475 /*0070*/ 0x00110827U,
2476 /*0071*/ 0x00090828U,
2477 /*0072*/ 0x10090828U,
2478 /*0073*/ 0x00100829U,
2479 /*0074*/ 0x100e0829U,
2480 /*0075*/ 0x000e082aU,
2481 /*0076*/ 0x100c082aU,
2482 /*0077*/ 0x000a082bU,
2483 /*0078*/ 0x100a082bU,
2484 /*0079*/ 0x0002082cU,
2485 /*007a*/ 0x0020082dU,
2486 /*007b*/ 0x000b082eU,
2487 /*007c*/ 0x100b082eU,
2488 /*007d*/ 0x0020082fU,
2489 /*007e*/ 0x00120830U,
2490 /*007f*/ 0x00200831U,
2491 /*0080*/ 0x00200832U,
2492 /*0081*/ 0xffffffffU,
2493 /*0082*/ 0xffffffffU,
2494 /*0083*/ 0x00010833U,
2495 /*0084*/ 0x08010833U,
2496 /*0085*/ 0x10080833U,
2497 /*0086*/ 0x000c0834U,
2498 /*0087*/ 0x100c0834U,
2499 /*0088*/ 0x000c0835U,
2500 /*0089*/ 0x100c0835U,
2501 /*008a*/ 0x000c0836U,
2502 /*008b*/ 0x100c0836U,
2503 /*008c*/ 0x000c0837U,
2504 /*008d*/ 0x100c0837U,
2505 /*008e*/ 0x000c0838U,
2506 /*008f*/ 0x100c0838U,
2507 /*0090*/ 0x000c0839U,
2508 /*0091*/ 0x100b0839U,
2509 /*0092*/ 0xffffffffU,
2510 /*0093*/ 0xffffffffU,
2511 /*0094*/ 0x000b083aU,
2512 /*0095*/ 0x100b083aU,
2513 /*0096*/ 0x000b083bU,
2514 /*0097*/ 0x100b083bU,
2515 /*0098*/ 0x000b083cU,
2516 /*0099*/ 0x100b083cU,
2517 /*009a*/ 0x000b083dU,
2518 /*009b*/ 0x100b083dU,
2519 /*009c*/ 0x000b083eU,
2520 /*009d*/ 0x100a083eU,
2521 /*009e*/ 0xffffffffU,
2522 /*009f*/ 0x000a083fU,
2523 /*00a0*/ 0x100a083fU,
2524 /*00a1*/ 0x000a0840U,
2525 /*00a2*/ 0x100a0840U,
2526 /*00a3*/ 0x000a0841U,
2527 /*00a4*/ 0x100a0841U,
2528 /*00a5*/ 0x000a0842U,
2529 /*00a6*/ 0x100a0842U,
2530 /*00a7*/ 0x000a0843U,
2531 /*00a8*/ 0x100a0843U,
2532 /*00a9*/ 0x000a0844U,
2533 /*00aa*/ 0x100a0844U,
2534 /*00ab*/ 0x000a0845U,
2535 /*00ac*/ 0x100a0845U,
2536 /*00ad*/ 0x000a0846U,
2537 /*00ae*/ 0x100a0846U,
2538 /*00af*/ 0x000a0847U,
2539 /*00b0*/ 0x100a0847U,
2540 /*00b1*/ 0x000a0848U,
2541 /*00b2*/ 0x100a0848U,
2542 /*00b3*/ 0x000a0849U,
2543 /*00b4*/ 0x100a0849U,
2544 /*00b5*/ 0x000a084aU,
2545 /*00b6*/ 0x100a084aU,
2546 /*00b7*/ 0x000a084bU,
2547 /*00b8*/ 0x100a084bU,
2548 /*00b9*/ 0x000a084cU,
2549 /*00ba*/ 0x100a084cU,
2550 /*00bb*/ 0x0004084dU,
2551 /*00bc*/ 0x0803084dU,
2552 /*00bd*/ 0x100a084dU,
2553 /*00be*/ 0x000a084eU,
2554 /*00bf*/ 0x1001084eU,
2555 /*00c0*/ 0x000a084fU,
2556 /*00c1*/ 0x1004084fU,
2557 /*00c2*/ 0x000b0850U,
2558 /*00c3*/ 0x100a0850U,
2559 /*00c4*/ 0xffffffffU,
2560 /*00c5*/ 0x00080851U,
2561 /*00c6*/ 0x08080851U,
2562 /*00c7*/ 0x10080851U,
2563 /*00c8*/ 0x18080851U,
2564 /*00c9*/ 0x00080852U,
2565 /*00ca*/ 0xffffffffU,
2566 /*00cb*/ 0x08080852U,
2567 /*00cc*/ 0x10010852U,
2568 /*00cd*/ 0x18080852U,
2569 /*00ce*/ 0x00080853U,
2570 /*00cf*/ 0x08020853U,
2571 /*00d0*/ 0x10020853U,
2572 /*00d1*/ 0x18040853U,
2573 /*00d2*/ 0x00040854U,
2574 /*00d3*/ 0xffffffffU,
2575 /*00d4*/ 0x08040854U,
2576 /*00d5*/ 0x100a0854U,
2577 /*00d6*/ 0x00060855U,
2578 /*00d7*/ 0x08080855U,
2579 /*00d8*/ 0xffffffffU,
2580 /*00d9*/ 0x10040855U,
2581 /*00da*/ 0x18040855U,
2582 /*00db*/ 0x00050856U,
2583 /*00dc*/ 0x08040856U,
2584 /*00dd*/ 0x10050856U,
2585 /*00de*/ 0x000a0857U,
2586 /*00df*/ 0x100a0857U,
2587 /*00e0*/ 0x00080858U,
2588 /*00e1*/ 0xffffffffU,
2589 /*00e2*/ 0x08040858U,
2590 /*00e3*/ 0xffffffffU,
2591 /*00e4*/ 0xffffffffU,
2592 /*00e5*/ 0x00050a00U,
2593 /*00e6*/ 0x08050a00U,
2594 /*00e7*/ 0x10050a00U,
2595 /*00e8*/ 0x18050a00U,
2596 /*00e9*/ 0x00050a01U,
2597 /*00ea*/ 0x08050a01U,
2598 /*00eb*/ 0x100b0a01U,
2599 /*00ec*/ 0x00010a02U,
2600 /*00ed*/ 0x08030a02U,
2601 /*00ee*/ 0x00200a03U,
2602 /*00ef*/ 0xffffffffU,
2603 /*00f0*/ 0x00030a04U,
2604 /*00f1*/ 0x080a0a04U,
2605 /*00f2*/ 0xffffffffU,
2606 /*00f3*/ 0xffffffffU,
2607 /*00f4*/ 0x18030a04U,
2608 /*00f5*/ 0x00030a05U,
2609 /*00f6*/ 0x08010a05U,
2610 /*00f7*/ 0x10010a05U,
2611 /*00f8*/ 0x18060a05U,
2612 /*00f9*/ 0xffffffffU,
2613 /*00fa*/ 0xffffffffU,
2614 /*00fb*/ 0xffffffffU,
2615 /*00fc*/ 0x00020a06U,
2616 /*00fd*/ 0x08030a06U,
2617 /*00fe*/ 0x10010a06U,
2618 /*00ff*/ 0x000f0a07U,
2619 /*0100*/ 0x00200a08U,
2620 /*0101*/ 0x00200a09U,
2621 /*0102*/ 0x000b0a0aU,
2622 /*0103*/ 0x100b0a0aU,
2623 /*0104*/ 0x000b0a0bU,
2624 /*0105*/ 0xffffffffU,
2625 /*0106*/ 0xffffffffU,
2626 /*0107*/ 0x00180a0cU,
2627 /*0108*/ 0x00180a0dU,
2628 /*0109*/ 0x00180a0eU,
2629 /*010a*/ 0x00180a0fU,
2630 /*010b*/ 0x18040a0fU,
2631 /*010c*/ 0x00020a10U,
2632 /*010d*/ 0x08020a10U,
2633 /*010e*/ 0x10040a10U,
2634 /*010f*/ 0x18040a10U,
2635 /*0110*/ 0x00010a11U,
2636 /*0111*/ 0x08010a11U,
2637 /*0112*/ 0x10010a11U,
2638 /*0113*/ 0x18030a11U,
2639 /*0114*/ 0x00200a12U,
2640 /*0115*/ 0x00200a13U,
2641 /*0116*/ 0xffffffffU,
2642 /*0117*/ 0x00140a14U,
2643 /*0118*/ 0x00140a15U,
2644 /*0119*/ 0x00140a16U,
2645 /*011a*/ 0x00140a17U,
2646 /*011b*/ 0x00140a18U,
2647 /*011c*/ 0x00140a19U,
2648 /*011d*/ 0x00140a1aU,
2649 /*011e*/ 0x00140a1bU,
2650 /*011f*/ 0x001e0a1cU,
2651 /*0120*/ 0x000a0a1dU,
2652 /*0121*/ 0x10060a1dU,
2653 /*0122*/ 0x18060a1dU,
2654 /*0123*/ 0x00060a1eU,
2655 /*0124*/ 0xffffffffU,
2656 /*0125*/ 0x08060a1eU,
2657 /*0126*/ 0x00080a1fU,
2658 /*0127*/ 0x080b0a1fU,
2659 /*0128*/ 0x000b0a20U,
2660 /*0129*/ 0x100b0a20U,
2661 /*012a*/ 0x000b0a21U,
2662 /*012b*/ 0x100b0a21U,
2663 /*012c*/ 0x000b0a22U,
2664 /*012d*/ 0x10040a22U,
2665 /*012e*/ 0x000a0a23U,
2666 /*012f*/ 0x10060a23U,
2667 /*0130*/ 0x18080a23U,
2668 /*0131*/ 0xffffffffU,
2669 /*0132*/ 0x00040a24U,
2670 /*0133*/ 0xffffffffU,
2671 /*0134*/ 0xffffffffU,
2672 /*0135*/ 0x00010b80U,
2673 /*0136*/ 0x08020b80U,
2674 /*0137*/ 0x10050b80U,
2675 /*0138*/ 0x18050b80U,
2676 /*0139*/ 0x00050b81U,
2677 /*013a*/ 0x08050b81U,
2678 /*013b*/ 0x100b0b81U,
2679 /*013c*/ 0x00050b82U,
2680 /*013d*/ 0x08010b82U,
2681 /*013e*/ 0x10010b82U,
2682 /*013f*/ 0xffffffffU,
2683 /*0140*/ 0x18010b82U,
2684 /*0141*/ 0x00010b83U,
2685 /*0142*/ 0x08040b83U,
2686 /*0143*/ 0x100b0b83U,
2687 /*0144*/ 0x000b0b84U,
2688 /*0145*/ 0xffffffffU,
2689 /*0146*/ 0x10040b84U,
2690 /*0147*/ 0x000b0b85U,
2691 /*0148*/ 0x10040b85U,
2692 /*0149*/ 0x18010b85U,
2693 /*014a*/ 0x00010b86U,
2694 /*014b*/ 0x08010b86U,
2695 /*014c*/ 0x00200b87U,
2696 /*014d*/ 0x00200b88U,
2697 /*014e*/ 0x00080b89U,
2698 /*014f*/ 0x080a0b89U,
2699 /*0150*/ 0x18050b89U,
2700 /*0151*/ 0x000a0b8aU,
2701 /*0152*/ 0x10030b8aU,
2702 /*0153*/ 0x18030b8aU,
2703 /*0154*/ 0x00010b8bU,
2704 /*0155*/ 0x08020b8bU,
2705 /*0156*/ 0x10010b8bU,
2706 /*0157*/ 0x18010b8bU,
2707 /*0158*/ 0x00010b8cU,
2708 /*0159*/ 0x08030b8cU,
2709 /*015a*/ 0xffffffffU,
2710 /*015b*/ 0x10040b8cU,
2711 /*015c*/ 0x18040b8cU,
2712 /*015d*/ 0x00040b8dU,
2713 /*015e*/ 0x08040b8dU,
2714 /*015f*/ 0xffffffffU,
2715 /*0160*/ 0xffffffffU,
2716 /*0161*/ 0xffffffffU,
2717 /*0162*/ 0xffffffffU,
2718 /*0163*/ 0xffffffffU,
2719 /*0164*/ 0xffffffffU,
2720 /*0165*/ 0xffffffffU,
2721 /*0166*/ 0xffffffffU,
2722 /*0167*/ 0xffffffffU,
2723 /*0168*/ 0x000d0b8eU,
2724 /*0169*/ 0x100d0b8eU,
2725 /*016a*/ 0x000d0b8fU,
2726 /*016b*/ 0x00050b90U,
2727 /*016c*/ 0x00010b91U,
2728 /*016d*/ 0x080e0b91U,
2729 /*016e*/ 0x000e0b92U,
2730 /*016f*/ 0x100e0b92U,
2731 /*0170*/ 0x000e0b93U,
2732 /*0171*/ 0x100e0b93U,
2733 /*0172*/ 0x00040b94U,
2734 /*0173*/ 0x08040b94U,
2735 /*0174*/ 0x10040b94U,
2736 /*0175*/ 0x18040b94U,
2737 /*0176*/ 0x00040b95U,
2738 /*0177*/ 0x080b0b95U,
2739 /*0178*/ 0x000b0b96U,
2740 /*0179*/ 0x100b0b96U,
2741 /*017a*/ 0x000b0b97U,
2742 /*017b*/ 0xffffffffU,
2743 /*017c*/ 0xffffffffU,
2744 /*017d*/ 0xffffffffU,
2745 /*017e*/ 0xffffffffU,
2746 /*017f*/ 0x000d0b98U,
2747 /*0180*/ 0x100d0b98U,
2748 /*0181*/ 0x000d0b99U,
2749 /*0182*/ 0x10100b99U,
2750 /*0183*/ 0x10080b8dU,
2751 /*0184*/ 0x18080b8dU,
2752 /*0185*/ 0x00100b9aU,
2753 /*0186*/ 0x10100b9aU,
2754 /*0187*/ 0x00100b9bU,
2755 /*0188*/ 0x10100b9bU,
2756 /*0189*/ 0x00100b9cU,
2757 /*018a*/ 0x10030b9cU,
2758 /*018b*/ 0x18040b9cU,
2759 /*018c*/ 0x00010b9dU,
2760 /*018d*/ 0x08040b9dU,
2761 /*018e*/ 0xffffffffU,
2762 /*018f*/ 0xffffffffU,
2763 /*0190*/ 0x10010b9dU,
2764 /*0191*/ 0x00140b9eU,
2765 /*0192*/ 0x000a0b9fU,
2766 /*0193*/ 0x100c0b9fU,
2767 /*0194*/ 0x00120ba0U,
2768 /*0195*/ 0x00140ba1U,
2769 /*0196*/ 0x00120ba2U,
2770 /*0197*/ 0x00110ba3U,
2771 /*0198*/ 0x00110ba4U,
2772 /*0199*/ 0x00120ba5U,
2773 /*019a*/ 0x00120ba6U,
2774 /*019b*/ 0x00120ba7U,
2775 /*019c*/ 0x00120ba8U,
2776 /*019d*/ 0x00120ba9U,
2777 /*019e*/ 0x00120baaU,
2778 /*019f*/ 0x00120babU,
2779 /*01a0*/ 0x00120bacU,
2780 /*01a1*/ 0xffffffffU,
2781 /*01a2*/ 0xffffffffU,
2782 /*01a3*/ 0x00190badU,
2783 /*01a4*/ 0x00190baeU,
2784 /*01a5*/ 0x00200bafU,
2785 /*01a6*/ 0x00170bb0U,
2786 /*01a7*/ 0x18080bb0U,
2787 /*01a8*/ 0x00010bb1U,
2788 /*01a9*/ 0x08010bb1U,
2789 /*01aa*/ 0x00200bb2U,
2790 /*01ab*/ 0x00080bb3U,
2791 /*01ac*/ 0xffffffffU,
2792 /*01ad*/ 0x08030bb3U,
2793 /*01ae*/ 0x00180bb4U,
2794 /*01af*/ 0x00180bb5U,
2795 /*01b0*/ 0xffffffffU,
2796 /*01b1*/ 0xffffffffU,
2797 /*01b2*/ 0xffffffffU,
2798 /*01b3*/ 0xffffffffU,
2799 /*01b4*/ 0xffffffffU,
2800 /*01b5*/ 0xffffffffU,
2801 /*01b6*/ 0xffffffffU,
2802 /*01b7*/ 0xffffffffU,
2803 /*01b8*/ 0xffffffffU,
2804 /*01b9*/ 0xffffffffU,
2805 /*01ba*/ 0xffffffffU,
2806 /*01bb*/ 0xffffffffU,
2807 /*01bc*/ 0xffffffffU,
2808 /*01bd*/ 0xffffffffU,
2809 /*01be*/ 0xffffffffU,
2810 /*01bf*/ 0x00100bb6U,
2811 /*01c0*/ 0x10010bb6U,
2812 /*01c1*/ 0x18010bb6U,
2813 /*01c2*/ 0x00050bb7U,
2814 /*01c3*/ 0x00200bb8U,
2815 /*01c4*/ 0x00090bb9U,
2816 /*01c5*/ 0xffffffffU,
2817 /*01c6*/ 0xffffffffU,
2818 /*01c7*/ 0x00200bbaU,
2819 /*01c8*/ 0x00040bbbU,
2820 /*01c9*/ 0x08100bbbU,
2821 /*01ca*/ 0x18060bbbU,
2822 /*01cb*/ 0x00100bbcU,
2823 /*01cc*/ 0xffffffffU,
2824 /*01cd*/ 0x10080bbcU,
2825 /*01ce*/ 0xffffffffU,
2826 /*01cf*/ 0xffffffffU,
2827 /*01d0*/ 0xffffffffU,
2828 /*01d1*/ 0x18030bbcU,
2829 /*01d2*/ 0x00020bbdU,
2830 /*01d3*/ 0xffffffffU,
2831 /*01d4*/ 0x00200bbeU,
2832 /*01d5*/ 0x000b0bbfU,
2833 /*01d6*/ 0xffffffffU,
2834 /*01d7*/ 0xffffffffU,
2835 /*01d8*/ 0xffffffffU,
2836 /*01d9*/ 0x10020bbfU,
2837 /*01da*/ 0xffffffffU,
2838 /*01db*/ 0xffffffffU,
2839 /*01dc*/ 0xffffffffU,
2840 /*01dd*/ 0xffffffffU,
2841 /*01de*/ 0x00010200U,
2842 /*01df*/ 0x08040200U,
2843 /*01e0*/ 0x10100200U,
2844 /*01e1*/ 0x00010201U,
2845 /*01e2*/ 0x08010201U,
2846 /*01e3*/ 0xffffffffU,
2847 /*01e4*/ 0xffffffffU,
2848 /*01e5*/ 0x10100201U,
2849 /*01e6*/ 0xffffffffU,
2850 /*01e7*/ 0xffffffffU,
2851 /*01e8*/ 0xffffffffU,
2852 /*01e9*/ 0xffffffffU,
2853 /*01ea*/ 0xffffffffU,
2854 /*01eb*/ 0xffffffffU,
2855 /*01ec*/ 0xffffffffU,
2856 /*01ed*/ 0xffffffffU,
2857 /*01ee*/ 0xffffffffU,
2858 /*01ef*/ 0x00200202U,
2859 /*01f0*/ 0x00100203U,
2860 /*01f1*/ 0x00200204U,
2861 /*01f2*/ 0x00100205U,
2862 /*01f3*/ 0x00200206U,
2863 /*01f4*/ 0x00100207U,
2864 /*01f5*/ 0x10100207U,
2865 /*01f6*/ 0x00200208U,
2866 /*01f7*/ 0x00200209U,
2867 /*01f8*/ 0x0020020aU,
2868 /*01f9*/ 0x0020020bU,
2869 /*01fa*/ 0x0010020cU,
2870 /*01fb*/ 0x0020020dU,
2871 /*01fc*/ 0x0020020eU,
2872 /*01fd*/ 0x0020020fU,
2873 /*01fe*/ 0x00200210U,
2874 /*01ff*/ 0x00100211U,
2875 /*0200*/ 0x00200212U,
2876 /*0201*/ 0x00200213U,
2877 /*0202*/ 0x00200214U,
2878 /*0203*/ 0x00200215U,
2879 /*0204*/ 0x00090216U,
2880 /*0205*/ 0x10010216U,
2881 /*0206*/ 0x00200217U,
2882 /*0207*/ 0x00050218U,
2883 /*0208*/ 0x08010218U,
2884 /*0209*/ 0x10080218U,
2885 /*020a*/ 0x18080218U,
2886 /*020b*/ 0x001e0219U,
2887 /*020c*/ 0x001e021aU,
2888 /*020d*/ 0x001e021bU,
2889 /*020e*/ 0x001e021cU,
2890 /*020f*/ 0x001e021dU,
2891 /*0210*/ 0x001e021eU,
2892 /*0211*/ 0x001e021fU,
2893 /*0212*/ 0x001e0220U,
2894 /*0213*/ 0x001e0221U,
2895 /*0214*/ 0x001e0222U,
2896 /*0215*/ 0x001e0223U,
2897 /*0216*/ 0x001e0224U,
2898 /*0217*/ 0x001e0225U,
2899 /*0218*/ 0x001e0226U,
2900 /*0219*/ 0x001e0227U,
2901 /*021a*/ 0x001e0228U,
2902 /*021b*/ 0x00010229U,
2903 /*021c*/ 0x08010229U,
2904 /*021d*/ 0x10010229U,
2905 /*021e*/ 0x18040229U,
2906 /*021f*/ 0x0008022aU,
2907 /*0220*/ 0x0808022aU,
2908 /*0221*/ 0x1008022aU,
2909 /*0222*/ 0x1804022aU,
2910 /*0223*/ 0x0005022bU,
2911 /*0224*/ 0x0806022bU,
2912 /*0225*/ 0x1007022bU,
2913 /*0226*/ 0x1805022bU,
2914 /*0227*/ 0x0006022cU,
2915 /*0228*/ 0x0807022cU,
2916 /*0229*/ 0x1005022cU,
2917 /*022a*/ 0x1806022cU,
2918 /*022b*/ 0x0007022dU,
2919 /*022c*/ 0x0802022dU,
2920 /*022d*/ 0x1001022dU,
2921 /*022e*/ 0xffffffffU,
2922 /*022f*/ 0x000a022eU,
2923 /*0230*/ 0x1010022eU,
2924 /*0231*/ 0x000a022fU,
2925 /*0232*/ 0x1010022fU,
2926 /*0233*/ 0x000a0230U,
2927 /*0234*/ 0x10100230U,
2928 /*0235*/ 0xffffffffU,
2929 /*0236*/ 0x00100231U,
2930 /*0237*/ 0xffffffffU,
2931 /*0238*/ 0xffffffffU,
2932 /*0239*/ 0x10010231U,
2933 /*023a*/ 0x18010231U,
2934 /*023b*/ 0x00010232U,
2935 /*023c*/ 0x08010232U,
2936 /*023d*/ 0x10010232U,
2937 /*023e*/ 0x18010232U,
2938 /*023f*/ 0x00020233U,
2939 /*0240*/ 0x08020233U,
2940 /*0241*/ 0x10020233U,
2941 /*0242*/ 0x18020233U,
2942 /*0243*/ 0x00020234U,
2943 /*0244*/ 0x08030234U,
2944 /*0245*/ 0x10010234U,
2945 /*0246*/ 0x18010234U,
2946 /*0247*/ 0x00010235U,
2947 /*0248*/ 0x08010235U,
2948 /*0249*/ 0xffffffffU,
2949 /*024a*/ 0x10020235U,
2950 /*024b*/ 0x18010235U,
2951 /*024c*/ 0x00010236U,
2952 /*024d*/ 0xffffffffU,
2953 /*024e*/ 0x08020236U,
2954 /*024f*/ 0x10010236U,
2955 /*0250*/ 0x18010236U,
2956 /*0251*/ 0xffffffffU,
2957 /*0252*/ 0x00020237U,
2958 /*0253*/ 0x08010237U,
2959 /*0254*/ 0x10010237U,
2960 /*0255*/ 0xffffffffU,
2961 /*0256*/ 0x18020237U,
2962 /*0257*/ 0x00070238U,
2963 /*0258*/ 0x08010238U,
2964 /*0259*/ 0x10010238U,
2965 /*025a*/ 0x18010238U,
2966 /*025b*/ 0x00010239U,
2967 /*025c*/ 0x08010239U,
2968 /*025d*/ 0x10010239U,
2969 /*025e*/ 0xffffffffU,
2970 /*025f*/ 0x18010239U,
2971 /*0260*/ 0x0004023aU,
2972 /*0261*/ 0x0804023aU,
2973 /*0262*/ 0x1004023aU,
2974 /*0263*/ 0x1801023aU,
2975 /*0264*/ 0x0002023bU,
2976 /*0265*/ 0x0806023bU,
2977 /*0266*/ 0x1006023bU,
2978 /*0267*/ 0xffffffffU,
2979 /*0268*/ 0xffffffffU,
2980 /*0269*/ 0xffffffffU,
2981 /*026a*/ 0x1802023bU,
2982 /*026b*/ 0x0010023cU,
2983 /*026c*/ 0x1001023cU,
2984 /*026d*/ 0x1801023cU,
2985 /*026e*/ 0xffffffffU,
2986 /*026f*/ 0x0004023dU,
2987 /*0270*/ 0x0801023dU,
2988 /*0271*/ 0x1004023dU,
2989 /*0272*/ 0x1802023dU,
2990 /*0273*/ 0x0008023eU,
2991 /*0274*/ 0xffffffffU,
2992 /*0275*/ 0xffffffffU,
2993 /*0276*/ 0xffffffffU,
2994 /*0277*/ 0x080a023eU,
2995 /*0278*/ 0x0020023fU,
2996 /*0279*/ 0x00200240U,
2997 /*027a*/ 0x00050241U,
2998 /*027b*/ 0x08010241U,
2999 /*027c*/ 0x10050241U,
3000 /*027d*/ 0x18080241U,
3001 /*027e*/ 0x00010242U,
3002 /*027f*/ 0x08080242U,
3003 /*0280*/ 0x10010242U,
3004 /*0281*/ 0x18080242U,
3005 /*0282*/ 0x00010243U,
3006 /*0283*/ 0x08040243U,
3007 /*0284*/ 0x10040243U,
3008 /*0285*/ 0x18040243U,
3009 /*0286*/ 0x00040244U,
3010 /*0287*/ 0x08040244U,
3011 /*0288*/ 0x10040244U,
3012 /*0289*/ 0x18040244U,
3013 /*028a*/ 0x00040245U,
3014 /*028b*/ 0x08040245U,
3015 /*028c*/ 0x10040245U,
3016 /*028d*/ 0x18010245U,
3017 /*028e*/ 0x00040246U,
3018 /*028f*/ 0x08040246U,
3019 /*0290*/ 0x10040246U,
3020 /*0291*/ 0x18040246U,
3021 /*0292*/ 0x00040247U,
3022 /*0293*/ 0x08040247U,
3023 /*0294*/ 0x10060247U,
3024 /*0295*/ 0x18060247U,
3025 /*0296*/ 0x00060248U,
3026 /*0297*/ 0x08060248U,
3027 /*0298*/ 0x10060248U,
3028 /*0299*/ 0x18060248U,
3029 /*029a*/ 0x00040249U,
3030 /*029b*/ 0x08010249U,
3031 /*029c*/ 0x10010249U,
3032 /*029d*/ 0x18020249U,
3033 /*029e*/ 0xffffffffU,
3034 /*029f*/ 0xffffffffU,
3035 /*02a0*/ 0xffffffffU,
3036 /*02a1*/ 0xffffffffU,
3037 /*02a2*/ 0xffffffffU,
3038 /*02a3*/ 0xffffffffU,
3039 /*02a4*/ 0xffffffffU,
3040 /*02a5*/ 0xffffffffU,
3041 /*02a6*/ 0x0004024aU,
3042 /*02a7*/ 0x0804024aU,
3043 /*02a8*/ 0x1001024aU,
3044 /*02a9*/ 0x1801024aU,
3045 /*02aa*/ 0xffffffffU,
3046 /*02ab*/ 0x0001024bU,
3047 /*02ac*/ 0x0801024bU,
3048 /*02ad*/ 0xffffffffU,
3049 /*02ae*/ 0x1001024bU,
3050 /*02af*/ 0x1801024bU,
3051 /*02b0*/ 0x0001024cU,
3052 /*02b1*/ 0x0804024cU,
3053 /*02b2*/ 0x1004024cU,
3054 /*02b3*/ 0x000a024dU,
3055 /*02b4*/ 0x0020024eU,
3056 /*02b5*/ 0x0004024fU,
3057 /*02b6*/ 0x0808024fU,
3058 /*02b7*/ 0xffffffffU,
3059 /*02b8*/ 0xffffffffU,
3060 /*02b9*/ 0xffffffffU,
3061 /*02ba*/ 0xffffffffU,
3062 /*02bb*/ 0xffffffffU,
3063 /*02bc*/ 0xffffffffU,
3064 /*02bd*/ 0x1002024fU,
3065 /*02be*/ 0x1802024fU,
3066 /*02bf*/ 0x00200250U,
3067 /*02c0*/ 0x00020251U,
3068 /*02c1*/ 0x08100251U,
3069 /*02c2*/ 0x00100252U,
3070 /*02c3*/ 0x10040252U,
3071 /*02c4*/ 0x18040252U,
3072 /*02c5*/ 0x00050253U,
3073 /*02c6*/ 0x08050253U,
3074 /*02c7*/ 0xffffffffU,
3075 /*02c8*/ 0xffffffffU,
3076 /*02c9*/ 0xffffffffU,
3077 /*02ca*/ 0xffffffffU,
3078 /*02cb*/ 0x10010253U,
3079 /*02cc*/ 0x18010253U,
3080 /*02cd*/ 0x00080254U,
3081 /*02ce*/ 0x08080254U,
3082 /*02cf*/ 0x10080254U,
3083 /*02d0*/ 0x18080254U,
3084 /*02d1*/ 0x00080255U,
3085 /*02d2*/ 0x08080255U,
3086 /*02d3*/ 0x10080255U,
3087 /*02d4*/ 0x18080255U,
3088 /*02d5*/ 0x00080256U,
3089 /*02d6*/ 0x08080256U,
3090 /*02d7*/ 0x10080256U,
3091 /*02d8*/ 0xffffffffU,
3092 /*02d9*/ 0xffffffffU,
3093 /*02da*/ 0xffffffffU,
3094 /*02db*/ 0xffffffffU,
3095 /*02dc*/ 0xffffffffU,
3096 /*02dd*/ 0xffffffffU,
3097 /*02de*/ 0x18030256U,
3098 /*02df*/ 0x00010257U,
3099 /*02e0*/ 0x08020257U,
3100 /*02e1*/ 0x10010257U,
3101 /*02e2*/ 0x18040257U,
3102 /*02e3*/ 0x00020258U,
3103 /*02e4*/ 0x08010258U,
3104 /*02e5*/ 0x10010258U,
3105 /*02e6*/ 0xffffffffU,
3106 /*02e7*/ 0x18010258U,
3107 /*02e8*/ 0x00040259U,
3108 /*02e9*/ 0x08080259U,
3109 /*02ea*/ 0x100a0259U,
3110 /*02eb*/ 0x000a025aU,
3111 /*02ec*/ 0x100a025aU,
3112 /*02ed*/ 0x000a025bU,
3113 /*02ee*/ 0x100a025bU,
3114 /*02ef*/ 0x000a025cU,
3115 /*02f0*/ 0x0020025dU,
3116 /*02f1*/ 0x0020025eU,
3117 /*02f2*/ 0x0001025fU,
3118 /*02f3*/ 0xffffffffU,
3119 /*02f4*/ 0xffffffffU,
3120 /*02f5*/ 0xffffffffU,
3121 /*02f6*/ 0x0802025fU,
3122 /*02f7*/ 0x1002025fU,
3123 /*02f8*/ 0x00100260U,
3124 /*02f9*/ 0x10050260U,
3125 /*02fa*/ 0x18060260U,
3126 /*02fb*/ 0x00050261U,
3127 /*02fc*/ 0x08050261U,
3128 /*02fd*/ 0x100e0261U,
3129 /*02fe*/ 0x00050262U,
3130 /*02ff*/ 0x080e0262U,
3131 /*0300*/ 0x18050262U,
3132 /*0301*/ 0x000e0263U,
3133 /*0302*/ 0x10050263U,
3134 /*0303*/ 0x18010263U,
3135 /*0304*/ 0x00050264U,
3136 /*0305*/ 0x08050264U,
3137 /*0306*/ 0x100a0264U,
3138 /*0307*/ 0x000a0265U,
3139 /*0308*/ 0x10050265U,
3140 /*0309*/ 0x18050265U,
3141 /*030a*/ 0x000a0266U,
3142 /*030b*/ 0x100a0266U,
3143 /*030c*/ 0x00050267U,
3144 /*030d*/ 0x08050267U,
3145 /*030e*/ 0x100a0267U,
3146 /*030f*/ 0x000a0268U,
3147 /*0310*/ 0xffffffffU,
3148 /*0311*/ 0xffffffffU,
3149 /*0312*/ 0xffffffffU,
3150 /*0313*/ 0xffffffffU,
3151 /*0314*/ 0xffffffffU,
3152 /*0315*/ 0xffffffffU,
3153 /*0316*/ 0x10070268U,
3154 /*0317*/ 0x18070268U,
3155 /*0318*/ 0x00040269U,
3156 /*0319*/ 0x08040269U,
3157 /*031a*/ 0xffffffffU,
3158 /*031b*/ 0xffffffffU,
3159 /*031c*/ 0xffffffffU,
3160 /*031d*/ 0x10040269U,
3161 /*031e*/ 0x18080269U,
3162 /*031f*/ 0x0008026aU,
3163 /*0320*/ 0x0804026aU,
3164 /*0321*/ 0xffffffffU,
3165 /*0322*/ 0xffffffffU,
3166 /*0323*/ 0xffffffffU,
3167 /*0324*/ 0x1004026aU,
3168 /*0325*/ 0xffffffffU,
3169 /*0326*/ 0xffffffffU,
3170 /*0327*/ 0xffffffffU,
3171 /*0328*/ 0x1804026aU,
3172 /*0329*/ 0xffffffffU,
3173 /*032a*/ 0xffffffffU,
3174 /*032b*/ 0xffffffffU,
3175 /*032c*/ 0x0004026bU,
3176 /*032d*/ 0x0805026bU,
3177 /*032e*/ 0x1007026bU,
3178 /*032f*/ 0x1808026bU,
3179 /*0330*/ 0x0010026cU,
3180 /*0331*/ 0x1008026cU,
3181 /*0332*/ 0x0010026dU,
3182 /*0333*/ 0x1008026dU,
3183 /*0334*/ 0x0010026eU,
3184 /*0335*/ 0x1008026eU,
3185 /*0336*/ 0x1808026eU,
3186 /*0337*/ 0x0001026fU,
3187 /*0338*/ 0x0801026fU,
3188 /*0339*/ 0x1006026fU,
3189 /*033a*/ 0x1806026fU,
3190 /*033b*/ 0x00060270U,
3191 /*033c*/ 0xffffffffU,
3192 /*033d*/ 0x08010270U,
3193 /*033e*/ 0x10030270U,
3194 /*033f*/ 0xffffffffU,
3195 /*0340*/ 0xffffffffU,
3196 /*0341*/ 0xffffffffU,
3197 /*0342*/ 0x000a0271U,
3198 /*0343*/ 0x100a0271U,
3199 /*0344*/ 0x00040272U,
3200 /*0345*/ 0x08010272U,
3201 /*0346*/ 0x10040272U,
3202 /*0347*/ 0xffffffffU,
3203 /*0348*/ 0xffffffffU,
3204 /*0349*/ 0xffffffffU,
3205 /*034a*/ 0xffffffffU,
3206 /*034b*/ 0xffffffffU,
3207 /*034c*/ 0xffffffffU,
3208 /*034d*/ 0x18070272U,
3209 /*034e*/ 0x00070273U,
3210 /*034f*/ 0x08050273U,
3211 /*0350*/ 0x10050273U,
3212 /*0351*/ 0xffffffffU,
3213 /*0352*/ 0xffffffffU,
3214 /*0353*/ 0xffffffffU,
3215 /*0354*/ 0x18040273U,
3216 /*0355*/ 0x00010274U,
3217 /*0356*/ 0x08010274U,
3218 /*0357*/ 0x10020274U,
3219 /*0358*/ 0x18080274U,
3220 /*0359*/ 0x00200275U,
3221 /*035a*/ 0x00200276U,
3222 /*035b*/ 0x00100277U,
3223 /*035c*/ 0xffffffffU,
3224 /*035d*/ 0xffffffffU,
3225 /*035e*/ 0xffffffffU,
3226 /*035f*/ 0x10020277U,
3227 /*0360*/ 0x18010277U,
3228 /*0361*/ 0xffffffffU,
3229 /*0362*/ 0x00020278U,
3230 /*0363*/ 0x08100278U,
3231 /*0364*/ 0x00100279U,
3232 /*0365*/ 0x10100279U,
3233 /*0366*/ 0x0008027aU,
3234 /*0367*/ 0x0808027aU,
3235 /*0368*/ 0x1008027aU,
3236 /*0369*/ 0xffffffffU,
3237 /*036a*/ 0x0010027bU,
3238 /*036b*/ 0x1010027bU,
3239 /*036c*/ 0x0010027cU,
3240 /*036d*/ 0x1008027cU,
3241 /*036e*/ 0x1808027cU,
3242 /*036f*/ 0x0008027dU,
3243 /*0370*/ 0xffffffffU,
3244 /*0371*/ 0x0810027dU,
3245 /*0372*/ 0x0010027eU,
3246 /*0373*/ 0x1010027eU,
3247 /*0374*/ 0x0008027fU,
3248 /*0375*/ 0x0808027fU,
3249 /*0376*/ 0x1008027fU,
3250 /*0377*/ 0xffffffffU,
3251 /*0378*/ 0x1808027fU,
3252 /*0379*/ 0x00100280U,
3253 /*037a*/ 0x10100280U,
3254 /*037b*/ 0x00100281U,
3255 /*037c*/ 0x10080281U,
3256 /*037d*/ 0x18080281U,
3257 /*037e*/ 0x00080282U,
3258 /*037f*/ 0xffffffffU,
3259 /*0380*/ 0x08100282U,
3260 /*0381*/ 0x00100283U,
3261 /*0382*/ 0x10100283U,
3262 /*0383*/ 0x00080284U,
3263 /*0384*/ 0x08080284U,
3264 /*0385*/ 0x10080284U,
3265 /*0386*/ 0xffffffffU,
3266 /*0387*/ 0x00100285U,
3267 /*0388*/ 0x10100285U,
3268 /*0389*/ 0x00100286U,
3269 /*038a*/ 0x10080286U,
3270 /*038b*/ 0x18080286U,
3271 /*038c*/ 0x00080287U,
3272 /*038d*/ 0xffffffffU,
3273 /*038e*/ 0x08080287U,
3274 /*038f*/ 0x10100287U,
3275 /*0390*/ 0x00100288U,
3276 /*0391*/ 0x10100288U,
3277 /*0392*/ 0x00080289U,
3278 /*0393*/ 0x08080289U,
3279 /*0394*/ 0x10080289U,
3280 /*0395*/ 0xffffffffU,
3281 /*0396*/ 0x0010028aU,
3282 /*0397*/ 0x1010028aU,
3283 /*0398*/ 0x0010028bU,
3284 /*0399*/ 0x1008028bU,
3285 /*039a*/ 0x1808028bU,
3286 /*039b*/ 0x0008028cU,
3287 /*039c*/ 0xffffffffU,
3288 /*039d*/ 0x0810028cU,
3289 /*039e*/ 0x0010028dU,
3290 /*039f*/ 0x1010028dU,
3291 /*03a0*/ 0x0008028eU,
3292 /*03a1*/ 0x0808028eU,
3293 /*03a2*/ 0x1008028eU,
3294 /*03a3*/ 0xffffffffU,
3295 /*03a4*/ 0x1808028eU,
3296 /*03a5*/ 0x0010028fU,
3297 /*03a6*/ 0x1010028fU,
3298 /*03a7*/ 0x00100290U,
3299 /*03a8*/ 0x10080290U,
3300 /*03a9*/ 0x18080290U,
3301 /*03aa*/ 0x00080291U,
3302 /*03ab*/ 0xffffffffU,
3303 /*03ac*/ 0x08100291U,
3304 /*03ad*/ 0x00100292U,
3305 /*03ae*/ 0x10100292U,
3306 /*03af*/ 0x00080293U,
3307 /*03b0*/ 0x08080293U,
3308 /*03b1*/ 0x10080293U,
3309 /*03b2*/ 0xffffffffU,
3310 /*03b3*/ 0x00100294U,
3311 /*03b4*/ 0x10100294U,
3312 /*03b5*/ 0x00100295U,
3313 /*03b6*/ 0x10080295U,
3314 /*03b7*/ 0x18080295U,
3315 /*03b8*/ 0x00080296U,
3316 /*03b9*/ 0xffffffffU,
3317 /*03ba*/ 0x08080296U,
3318 /*03bb*/ 0x10020296U,
3319 /*03bc*/ 0x18030296U,
3320 /*03bd*/ 0x000a0297U,
3321 /*03be*/ 0x100a0297U,
3322 /*03bf*/ 0x000a0298U,
3323 /*03c0*/ 0x10050298U,
3324 /*03c1*/ 0x18040298U,
3325 /*03c2*/ 0x00080299U,
3326 /*03c3*/ 0x08080299U,
3327 /*03c4*/ 0x10060299U,
3328 /*03c5*/ 0x18060299U,
3329 /*03c6*/ 0x0011029aU,
3330 /*03c7*/ 0x1808029aU,
3331 /*03c8*/ 0x0004029bU,
3332 /*03c9*/ 0x0806029bU,
3333 /*03ca*/ 0xffffffffU,
3334 /*03cb*/ 0x1006029bU,
3335 /*03cc*/ 0x1808029bU,
3336 /*03cd*/ 0x0008029cU,
3337 /*03ce*/ 0x0804029cU,
3338 /*03cf*/ 0x1008029cU,
3339 /*03d0*/ 0x1808029cU,
3340 /*03d1*/ 0x0006029dU,
3341 /*03d2*/ 0x0806029dU,
3342 /*03d3*/ 0x0011029eU,
3343 /*03d4*/ 0x1808029eU,
3344 /*03d5*/ 0x0004029fU,
3345 /*03d6*/ 0x0806029fU,
3346 /*03d7*/ 0xffffffffU,
3347 /*03d8*/ 0x1006029fU,
3348 /*03d9*/ 0x1808029fU,
3349 /*03da*/ 0x000802a0U,
3350 /*03db*/ 0x080402a0U,
3351 /*03dc*/ 0x100802a0U,
3352 /*03dd*/ 0x180802a0U,
3353 /*03de*/ 0x000602a1U,
3354 /*03df*/ 0x080602a1U,
3355 /*03e0*/ 0x001102a2U,
3356 /*03e1*/ 0x180802a2U,
3357 /*03e2*/ 0x000402a3U,
3358 /*03e3*/ 0x080602a3U,
3359 /*03e4*/ 0xffffffffU,
3360 /*03e5*/ 0x100602a3U,
3361 /*03e6*/ 0x180802a3U,
3362 /*03e7*/ 0x000802a4U,
3363 /*03e8*/ 0x080402a4U,
3364 /*03e9*/ 0x100402a4U,
3365 /*03ea*/ 0x180402a4U,
3366 /*03eb*/ 0x000402a5U,
3367 /*03ec*/ 0x080402a5U,
3368 /*03ed*/ 0x100402a5U,
3369 /*03ee*/ 0x180402a5U,
3370 /*03ef*/ 0x000402a6U,
3371 /*03f0*/ 0x080402a6U,
3372 /*03f1*/ 0x100402a6U,
3373 /*03f2*/ 0x180402a6U,
3374 /*03f3*/ 0x000402a7U,
3375 /*03f4*/ 0x080402a7U,
3376 /*03f5*/ 0x100402a7U,
3377 /*03f6*/ 0x180402a7U,
3378 /*03f7*/ 0x000402a8U,
3379 /*03f8*/ 0x080402a8U,
3380 /*03f9*/ 0x100402a8U,
3381 /*03fa*/ 0x180402a8U,
3382 /*03fb*/ 0x000402a9U,
3383 /*03fc*/ 0x081202a9U,
3384 /*03fd*/ 0x001102aaU,
3385 /*03fe*/ 0x001202abU,
3386 /*03ff*/ 0x002002acU,
3387 /*0400*/ 0x002002adU,
3388 /*0401*/ 0x002002aeU,
3389 /*0402*/ 0x002002afU,
3390 /*0403*/ 0x002002b0U,
3391 /*0404*/ 0x002002b1U,
3392 /*0405*/ 0x002002b2U,
3393 /*0406*/ 0x002002b3U,
3394 /*0407*/ 0x002002b4U,
3395 /*0408*/ 0x000302b5U,
3396 /*0409*/ 0x080502b5U,
3397 /*040a*/ 0x100502b5U,
3398 /*040b*/ 0x180102b5U,
3399 /*040c*/ 0x000502b6U,
3400 /*040d*/ 0x080502b6U,
3401 /*040e*/ 0x100502b6U,
3402 /*040f*/ 0x180502b6U,
3403 /*0410*/ 0x000502b7U,
3404 /*0411*/ 0x080502b7U,
3405 /*0412*/ 0x100502b7U,
3406 /*0413*/ 0x180502b7U,
3407 /*0414*/ 0x000502b8U,
3408 /*0415*/ 0x080502b8U,
3409 /*0416*/ 0x100502b8U,
3410 /*0417*/ 0x180502b8U,
3411 /*0418*/ 0x000502b9U,
3412 /*0419*/ 0x080502b9U,
3413 /*041a*/ 0x100502b9U,
3414 /*041b*/ 0x180502b9U,
3415 /*041c*/ 0x000502baU,
3416 /*041d*/ 0x080502baU,
3417 /*041e*/ 0x100502baU,
3418 /*041f*/ 0x180502baU,
3419 /*0420*/ 0x000502bbU,
3420 /*0421*/ 0x080502bbU,
3421 /*0422*/ 0x100102bbU,
3422 /*0423*/ 0x180202bbU,
3423 /*0424*/ 0x000202bcU,
3424 /*0425*/ 0x080202bcU,
3425 /*0426*/ 0x100202bcU,
3426 /*0427*/ 0x180102bcU,
3427 /*0428*/ 0x000402bdU,
3428 /*0429*/ 0x081002bdU,
3429 /*042a*/ 0x002002beU,
3430 /*042b*/ 0x001002bfU,
3431 /*042c*/ 0x002002c0U,
3432 /*042d*/ 0x001002c1U,
3433 /*042e*/ 0x002002c2U,
3434 /*042f*/ 0x000702c3U,
3435 /*0430*/ 0x080102c3U,
3436 /*0431*/ 0x100202c3U,
3437 /*0432*/ 0x180602c3U,
3438 /*0433*/ 0x000102c4U,
3439 /*0434*/ 0x080102c4U,
3440 /*0435*/ 0x002002c5U,
3441 /*0436*/ 0x000302c6U,
3442 /*0437*/ 0x002002c7U,
3443 /*0438*/ 0x002002c8U,
3444 /*0439*/ 0xffffffffU,
3445 /*043a*/ 0xffffffffU,
3446 /*043b*/ 0xffffffffU,
3447 /*043c*/ 0xffffffffU,
3448 /*043d*/ 0xffffffffU,
3449 /*043e*/ 0xffffffffU,
3450 /*043f*/ 0xffffffffU,
3451 /*0440*/ 0xffffffffU,
3452 /*0441*/ 0xffffffffU,
3453 /*0442*/ 0xffffffffU,
3454 /*0443*/ 0xffffffffU,
3455 /*0444*/ 0xffffffffU,
3456 /*0445*/ 0xffffffffU,
3457 /*0446*/ 0xffffffffU,
3458 /*0447*/ 0xffffffffU,
3459 /*0448*/ 0xffffffffU,
3460 /*0449*/ 0xffffffffU,
3461 /*044a*/ 0xffffffffU,
3462 /*044b*/ 0xffffffffU,
3463 /*044c*/ 0xffffffffU,
3464 /*044d*/ 0xffffffffU,
3465 /*044e*/ 0xffffffffU,
3466 /*044f*/ 0xffffffffU,
3467 /*0450*/ 0xffffffffU,
3468 /*0451*/ 0xffffffffU,
3469 /*0452*/ 0xffffffffU,
3470 /*0453*/ 0xffffffffU,
3471 /*0454*/ 0xffffffffU,
3472 /*0455*/ 0xffffffffU,
3473 /*0456*/ 0xffffffffU,
3474 /*0457*/ 0xffffffffU,
3475 /*0458*/ 0xffffffffU,
3476 /*0459*/ 0xffffffffU,
3477 /*045a*/ 0xffffffffU,
3478 /*045b*/ 0xffffffffU,
3479 /*045c*/ 0xffffffffU,
3480 /*045d*/ 0xffffffffU,
3481 /*045e*/ 0xffffffffU,
3482 /*045f*/ 0x000402c9U,
3483 /*0460*/ 0xffffffffU,
3484 /*0461*/ 0xffffffffU,
3485 /*0462*/ 0xffffffffU,
3486 /*0463*/ 0xffffffffU,
3487 /*0464*/ 0xffffffffU,
3488 /*0465*/ 0xffffffffU,
3489 /*0466*/ 0xffffffffU,
3490 /*0467*/ 0xffffffffU,
3491 /*0468*/ 0xffffffffU,
3492 /*0469*/ 0xffffffffU,
3493 /*046a*/ 0xffffffffU,
3494 /*046b*/ 0xffffffffU,
3495 /*046c*/ 0xffffffffU,
3496 /*046d*/ 0xffffffffU,
3497 /*046e*/ 0xffffffffU,
3498 /*046f*/ 0xffffffffU,
3499 /*0470*/ 0xffffffffU,
3500 /*0471*/ 0xffffffffU,
3501 /*0472*/ 0xffffffffU,
3502 /*0473*/ 0xffffffffU,
3503 /*0474*/ 0xffffffffU,
3504 /*0475*/ 0xffffffffU,
3505 /*0476*/ 0xffffffffU,
3506 /*0477*/ 0xffffffffU,
3507 /*0478*/ 0xffffffffU,
3508 /*0479*/ 0xffffffffU,
3509 /*047a*/ 0xffffffffU,
3510 /*047b*/ 0xffffffffU,
3511 /*047c*/ 0xffffffffU,
3512 /*047d*/ 0xffffffffU,
3513 /*047e*/ 0xffffffffU,
3514 /*047f*/ 0xffffffffU,
3515 /*0480*/ 0xffffffffU,
3516 /*0481*/ 0xffffffffU,
3517 /*0482*/ 0xffffffffU,
3518 /*0483*/ 0xffffffffU,
3519 /*0484*/ 0xffffffffU,
3520 /*0485*/ 0xffffffffU,
3521 /*0486*/ 0xffffffffU,
3522 /*0487*/ 0xffffffffU,
3523 /*0488*/ 0xffffffffU,
3524 /*0489*/ 0xffffffffU,
3525 /*048a*/ 0xffffffffU,
3526 /*048b*/ 0xffffffffU,
3527 /*048c*/ 0xffffffffU,
3528 /*048d*/ 0xffffffffU,
3529 /*048e*/ 0xffffffffU,
3530 /*048f*/ 0xffffffffU,
3531 /*0490*/ 0xffffffffU,
3532 /*0491*/ 0xffffffffU,
3533 /*0492*/ 0xffffffffU,
3534 /*0493*/ 0xffffffffU,
3535 /*0494*/ 0xffffffffU,
3536 	 },
3537 	{
3538 /*0000*/ 0x00200400U,
3539 /*0001*/ 0x00040401U,
3540 /*0002*/ 0x080b0401U,
3541 /*0003*/ 0x000a0402U,
3542 /*0004*/ 0x10020402U,
3543 /*0005*/ 0x18010402U,
3544 /*0006*/ 0x00050403U,
3545 /*0007*/ 0x08050403U,
3546 /*0008*/ 0x10050403U,
3547 /*0009*/ 0x18050403U,
3548 /*000a*/ 0x00050404U,
3549 /*000b*/ 0x08050404U,
3550 /*000c*/ 0x10050404U,
3551 /*000d*/ 0x18050404U,
3552 /*000e*/ 0x00050405U,
3553 /*000f*/ 0x08040405U,
3554 /*0010*/ 0x10030405U,
3555 /*0011*/ 0x00180406U,
3556 /*0012*/ 0x18030406U,
3557 /*0013*/ 0x00180407U,
3558 /*0014*/ 0x18020407U,
3559 /*0015*/ 0x00010408U,
3560 /*0016*/ 0x08020408U,
3561 /*0017*/ 0x10010408U,
3562 /*0018*/ 0x18010408U,
3563 /*0019*/ 0x00020409U,
3564 /*001a*/ 0x08040409U,
3565 /*001b*/ 0x10040409U,
3566 /*001c*/ 0x18040409U,
3567 /*001d*/ 0xffffffffU,
3568 /*001e*/ 0x0004040aU,
3569 /*001f*/ 0xffffffffU,
3570 /*0020*/ 0xffffffffU,
3571 /*0021*/ 0x0809040aU,
3572 /*0022*/ 0x1801040aU,
3573 /*0023*/ 0x0020040bU,
3574 /*0024*/ 0x001c040cU,
3575 /*0025*/ 0x0001040dU,
3576 /*0026*/ 0x0807040dU,
3577 /*0027*/ 0x1009040dU,
3578 /*0028*/ 0x000a040eU,
3579 /*0029*/ 0x1005040eU,
3580 /*002a*/ 0x1801040eU,
3581 /*002b*/ 0x1001040fU,
3582 /*002c*/ 0x1802040fU,
3583 /*002d*/ 0x0009040fU,
3584 /*002e*/ 0x00090410U,
3585 /*002f*/ 0x10020410U,
3586 /*0030*/ 0x00200411U,
3587 /*0031*/ 0x00010412U,
3588 /*0032*/ 0x08020412U,
3589 /*0033*/ 0xffffffffU,
3590 /*0034*/ 0xffffffffU,
3591 /*0035*/ 0xffffffffU,
3592 /*0036*/ 0xffffffffU,
3593 /*0037*/ 0x00200413U,
3594 /*0038*/ 0x00200414U,
3595 /*0039*/ 0x00200415U,
3596 /*003a*/ 0x00200416U,
3597 /*003b*/ 0x00030417U,
3598 /*003c*/ 0x08010417U,
3599 /*003d*/ 0x10040417U,
3600 /*003e*/ 0x18030417U,
3601 /*003f*/ 0x00040418U,
3602 /*0040*/ 0x08040418U,
3603 /*0041*/ 0x10040418U,
3604 /*0042*/ 0x18040418U,
3605 /*0043*/ 0x00010419U,
3606 /*0044*/ 0x08010419U,
3607 /*0045*/ 0x10060419U,
3608 /*0046*/ 0x18040419U,
3609 /*0047*/ 0xffffffffU,
3610 /*0048*/ 0x0006041aU,
3611 /*0049*/ 0x0804041aU,
3612 /*004a*/ 0x1006041aU,
3613 /*004b*/ 0x1804041aU,
3614 /*004c*/ 0x0002041bU,
3615 /*004d*/ 0x0805041bU,
3616 /*004e*/ 0x1008041bU,
3617 /*004f*/ 0xffffffffU,
3618 /*0050*/ 0x1806041bU,
3619 /*0051*/ 0x0003041cU,
3620 /*0052*/ 0x080b041cU,
3621 /*0053*/ 0x1804041cU,
3622 /*0054*/ 0x0004041dU,
3623 /*0055*/ 0x0804041dU,
3624 /*0056*/ 0x1001041dU,
3625 /*0057*/ 0xffffffffU,
3626 /*0058*/ 0x0009041eU,
3627 /*0059*/ 0x0020041fU,
3628 /*005a*/ 0x00200420U,
3629 /*005b*/ 0x00200421U,
3630 /*005c*/ 0x00200422U,
3631 /*005d*/ 0x00100423U,
3632 /*005e*/ 0xffffffffU,
3633 /*005f*/ 0x10010423U,
3634 /*0060*/ 0x18060423U,
3635 /*0061*/ 0x00080424U,
3636 /*0062*/ 0x00200425U,
3637 /*0063*/ 0x00100426U,
3638 /*0064*/ 0x100a0426U,
3639 /*0065*/ 0x00060427U,
3640 /*0066*/ 0x08070427U,
3641 /*0067*/ 0x10080427U,
3642 /*0068*/ 0x18080427U,
3643 /*0069*/ 0x000a0428U,
3644 /*006a*/ 0x10070428U,
3645 /*006b*/ 0x18080428U,
3646 /*006c*/ 0x00080429U,
3647 /*006d*/ 0x08030429U,
3648 /*006e*/ 0x100a0429U,
3649 /*006f*/ 0x000a042aU,
3650 /*0070*/ 0x0011042bU,
3651 /*0071*/ 0x0009042cU,
3652 /*0072*/ 0x1009042cU,
3653 /*0073*/ 0x0010042dU,
3654 /*0074*/ 0x100e042dU,
3655 /*0075*/ 0x000e042eU,
3656 /*0076*/ 0x0012042fU,
3657 /*0077*/ 0x000a0430U,
3658 /*0078*/ 0x100a0430U,
3659 /*0079*/ 0x00020431U,
3660 /*007a*/ 0x00200432U,
3661 /*007b*/ 0x000b0433U,
3662 /*007c*/ 0x100b0433U,
3663 /*007d*/ 0x00200434U,
3664 /*007e*/ 0x00120435U,
3665 /*007f*/ 0x00200436U,
3666 /*0080*/ 0x00200437U,
3667 /*0081*/ 0x00080438U,
3668 /*0082*/ 0x08010438U,
3669 /*0083*/ 0x10010438U,
3670 /*0084*/ 0x18010438U,
3671 /*0085*/ 0x00080439U,
3672 /*0086*/ 0x080c0439U,
3673 /*0087*/ 0x000c043aU,
3674 /*0088*/ 0x100c043aU,
3675 /*0089*/ 0x000c043bU,
3676 /*008a*/ 0x100c043bU,
3677 /*008b*/ 0x000c043cU,
3678 /*008c*/ 0x100c043cU,
3679 /*008d*/ 0x000c043dU,
3680 /*008e*/ 0x100c043dU,
3681 /*008f*/ 0x000c043eU,
3682 /*0090*/ 0x100c043eU,
3683 /*0091*/ 0x000b043fU,
3684 /*0092*/ 0x1009043fU,
3685 /*0093*/ 0x00010440U,
3686 /*0094*/ 0x000b0441U,
3687 /*0095*/ 0x100b0441U,
3688 /*0096*/ 0x000b0442U,
3689 /*0097*/ 0x100b0442U,
3690 /*0098*/ 0x000b0443U,
3691 /*0099*/ 0x100b0443U,
3692 /*009a*/ 0x000b0444U,
3693 /*009b*/ 0x100b0444U,
3694 /*009c*/ 0x000b0445U,
3695 /*009d*/ 0x100a0445U,
3696 /*009e*/ 0x00020446U,
3697 /*009f*/ 0x080a0446U,
3698 /*00a0*/ 0x000a0447U,
3699 /*00a1*/ 0x100a0447U,
3700 /*00a2*/ 0x000a0448U,
3701 /*00a3*/ 0x100a0448U,
3702 /*00a4*/ 0x000a0449U,
3703 /*00a5*/ 0x100a0449U,
3704 /*00a6*/ 0x000a044aU,
3705 /*00a7*/ 0x100a044aU,
3706 /*00a8*/ 0x000a044bU,
3707 /*00a9*/ 0x100a044bU,
3708 /*00aa*/ 0x000a044cU,
3709 /*00ab*/ 0x100a044cU,
3710 /*00ac*/ 0x000a044dU,
3711 /*00ad*/ 0x100a044dU,
3712 /*00ae*/ 0x000a044eU,
3713 /*00af*/ 0x100a044eU,
3714 /*00b0*/ 0x000a044fU,
3715 /*00b1*/ 0x100a044fU,
3716 /*00b2*/ 0x000a0450U,
3717 /*00b3*/ 0x100a0450U,
3718 /*00b4*/ 0x000a0451U,
3719 /*00b5*/ 0x100a0451U,
3720 /*00b6*/ 0x000a0452U,
3721 /*00b7*/ 0x100a0452U,
3722 /*00b8*/ 0x000a0453U,
3723 /*00b9*/ 0x100a0453U,
3724 /*00ba*/ 0x000a0454U,
3725 /*00bb*/ 0x10040454U,
3726 /*00bc*/ 0x18030454U,
3727 /*00bd*/ 0x000a0455U,
3728 /*00be*/ 0x100a0455U,
3729 /*00bf*/ 0x00010456U,
3730 /*00c0*/ 0x080a0456U,
3731 /*00c1*/ 0x18040456U,
3732 /*00c2*/ 0x000b0457U,
3733 /*00c3*/ 0x100a0457U,
3734 /*00c4*/ 0x00030458U,
3735 /*00c5*/ 0x00080459U,
3736 /*00c6*/ 0x08080459U,
3737 /*00c7*/ 0x10080459U,
3738 /*00c8*/ 0x18080459U,
3739 /*00c9*/ 0x0008045aU,
3740 /*00ca*/ 0xffffffffU,
3741 /*00cb*/ 0x0808045aU,
3742 /*00cc*/ 0x1001045aU,
3743 /*00cd*/ 0x1808045aU,
3744 /*00ce*/ 0x0008045bU,
3745 /*00cf*/ 0x0802045bU,
3746 /*00d0*/ 0x1002045bU,
3747 /*00d1*/ 0x1805045bU,
3748 /*00d2*/ 0x0005045cU,
3749 /*00d3*/ 0xffffffffU,
3750 /*00d4*/ 0x0804045cU,
3751 /*00d5*/ 0x100a045cU,
3752 /*00d6*/ 0x0006045dU,
3753 /*00d7*/ 0x0808045dU,
3754 /*00d8*/ 0x1008045dU,
3755 /*00d9*/ 0x1804045dU,
3756 /*00da*/ 0x0004045eU,
3757 /*00db*/ 0x0805045eU,
3758 /*00dc*/ 0x1004045eU,
3759 /*00dd*/ 0x1805045eU,
3760 /*00de*/ 0x000a045fU,
3761 /*00df*/ 0x100a045fU,
3762 /*00e0*/ 0x00080460U,
3763 /*00e1*/ 0xffffffffU,
3764 /*00e2*/ 0x08040460U,
3765 /*00e3*/ 0xffffffffU,
3766 /*00e4*/ 0xffffffffU,
3767 /*00e5*/ 0x00050600U,
3768 /*00e6*/ 0x08050600U,
3769 /*00e7*/ 0x10050600U,
3770 /*00e8*/ 0x18050600U,
3771 /*00e9*/ 0x00050601U,
3772 /*00ea*/ 0x08050601U,
3773 /*00eb*/ 0x100b0601U,
3774 /*00ec*/ 0x00010602U,
3775 /*00ed*/ 0x08030602U,
3776 /*00ee*/ 0x00200603U,
3777 /*00ef*/ 0x00100604U,
3778 /*00f0*/ 0x10040604U,
3779 /*00f1*/ 0x000a0605U,
3780 /*00f2*/ 0x10090605U,
3781 /*00f3*/ 0x00080606U,
3782 /*00f4*/ 0x08030606U,
3783 /*00f5*/ 0x10030606U,
3784 /*00f6*/ 0x18010606U,
3785 /*00f7*/ 0x00010607U,
3786 /*00f8*/ 0x08070607U,
3787 /*00f9*/ 0x10070607U,
3788 /*00fa*/ 0x18050607U,
3789 /*00fb*/ 0x00010608U,
3790 /*00fc*/ 0x08020608U,
3791 /*00fd*/ 0x10030608U,
3792 /*00fe*/ 0x18010608U,
3793 /*00ff*/ 0x000f0609U,
3794 /*0100*/ 0x0020060aU,
3795 /*0101*/ 0x0020060bU,
3796 /*0102*/ 0x000b060cU,
3797 /*0103*/ 0x100b060cU,
3798 /*0104*/ 0x000b060dU,
3799 /*0105*/ 0x0018060eU,
3800 /*0106*/ 0x0018060fU,
3801 /*0107*/ 0xffffffffU,
3802 /*0108*/ 0xffffffffU,
3803 /*0109*/ 0xffffffffU,
3804 /*010a*/ 0xffffffffU,
3805 /*010b*/ 0xffffffffU,
3806 /*010c*/ 0x1802060fU,
3807 /*010d*/ 0x00020610U,
3808 /*010e*/ 0x08040610U,
3809 /*010f*/ 0x10040610U,
3810 /*0110*/ 0x18010610U,
3811 /*0111*/ 0x00010611U,
3812 /*0112*/ 0x08010611U,
3813 /*0113*/ 0x10030611U,
3814 /*0114*/ 0x00200612U,
3815 /*0115*/ 0x00200613U,
3816 /*0116*/ 0xffffffffU,
3817 /*0117*/ 0x00140614U,
3818 /*0118*/ 0x00140615U,
3819 /*0119*/ 0x00140616U,
3820 /*011a*/ 0x00140617U,
3821 /*011b*/ 0x00140618U,
3822 /*011c*/ 0x00140619U,
3823 /*011d*/ 0x0014061aU,
3824 /*011e*/ 0x0014061bU,
3825 /*011f*/ 0x0018061cU,
3826 /*0120*/ 0x000a061dU,
3827 /*0121*/ 0x1006061dU,
3828 /*0122*/ 0x1806061dU,
3829 /*0123*/ 0x0006061eU,
3830 /*0124*/ 0xffffffffU,
3831 /*0125*/ 0x0806061eU,
3832 /*0126*/ 0x0008061fU,
3833 /*0127*/ 0x080b061fU,
3834 /*0128*/ 0x000b0620U,
3835 /*0129*/ 0x100b0620U,
3836 /*012a*/ 0x000b0621U,
3837 /*012b*/ 0x100b0621U,
3838 /*012c*/ 0x000b0622U,
3839 /*012d*/ 0x10040622U,
3840 /*012e*/ 0x000a0623U,
3841 /*012f*/ 0x10060623U,
3842 /*0130*/ 0x18080623U,
3843 /*0131*/ 0x00080624U,
3844 /*0132*/ 0x08040624U,
3845 /*0133*/ 0x00020680U,
3846 /*0134*/ 0x00010681U,
3847 /*0135*/ 0x08010681U,
3848 /*0136*/ 0x10020681U,
3849 /*0137*/ 0x18050681U,
3850 /*0138*/ 0x00050682U,
3851 /*0139*/ 0x08050682U,
3852 /*013a*/ 0x10050682U,
3853 /*013b*/ 0x000b0683U,
3854 /*013c*/ 0x10050683U,
3855 /*013d*/ 0x18010683U,
3856 /*013e*/ 0x00010684U,
3857 /*013f*/ 0xffffffffU,
3858 /*0140*/ 0x08010684U,
3859 /*0141*/ 0x10010684U,
3860 /*0142*/ 0x18040684U,
3861 /*0143*/ 0x000b0685U,
3862 /*0144*/ 0x100b0685U,
3863 /*0145*/ 0x000b0686U,
3864 /*0146*/ 0x10040686U,
3865 /*0147*/ 0x000b0687U,
3866 /*0148*/ 0x10040687U,
3867 /*0149*/ 0x18010687U,
3868 /*014a*/ 0x00010688U,
3869 /*014b*/ 0x08010688U,
3870 /*014c*/ 0x00200689U,
3871 /*014d*/ 0x0020068aU,
3872 /*014e*/ 0x0008068bU,
3873 /*014f*/ 0x080a068bU,
3874 /*0150*/ 0x1805068bU,
3875 /*0151*/ 0x000a068cU,
3876 /*0152*/ 0x1003068cU,
3877 /*0153*/ 0x1803068cU,
3878 /*0154*/ 0x0001068dU,
3879 /*0155*/ 0x0802068dU,
3880 /*0156*/ 0x1001068dU,
3881 /*0157*/ 0x1801068dU,
3882 /*0158*/ 0x0001068eU,
3883 /*0159*/ 0x0802068eU,
3884 /*015a*/ 0x1001068eU,
3885 /*015b*/ 0x0004068fU,
3886 /*015c*/ 0x0804068fU,
3887 /*015d*/ 0x1004068fU,
3888 /*015e*/ 0x1804068fU,
3889 /*015f*/ 0x00010690U,
3890 /*0160*/ 0x08010690U,
3891 /*0161*/ 0x10010690U,
3892 /*0162*/ 0x00200691U,
3893 /*0163*/ 0x00200692U,
3894 /*0164*/ 0x00200693U,
3895 /*0165*/ 0x00200694U,
3896 /*0166*/ 0xffffffffU,
3897 /*0167*/ 0x1801068eU,
3898 /*0168*/ 0x000d0696U,
3899 /*0169*/ 0x100d0696U,
3900 /*016a*/ 0x000d0697U,
3901 /*016b*/ 0x00050698U,
3902 /*016c*/ 0x00010699U,
3903 /*016d*/ 0x080e0699U,
3904 /*016e*/ 0x000e069aU,
3905 /*016f*/ 0x100e069aU,
3906 /*0170*/ 0x000e069bU,
3907 /*0171*/ 0x100e069bU,
3908 /*0172*/ 0x0004069cU,
3909 /*0173*/ 0x0804069cU,
3910 /*0174*/ 0x1004069cU,
3911 /*0175*/ 0x1804069cU,
3912 /*0176*/ 0x0004069dU,
3913 /*0177*/ 0x080b069dU,
3914 /*0178*/ 0x000b069eU,
3915 /*0179*/ 0x100b069eU,
3916 /*017a*/ 0x000b069fU,
3917 /*017b*/ 0xffffffffU,
3918 /*017c*/ 0xffffffffU,
3919 /*017d*/ 0xffffffffU,
3920 /*017e*/ 0xffffffffU,
3921 /*017f*/ 0x000d06a0U,
3922 /*0180*/ 0x100d06a0U,
3923 /*0181*/ 0x000d06a1U,
3924 /*0182*/ 0x101006a1U,
3925 /*0183*/ 0x00080695U,
3926 /*0184*/ 0x08080695U,
3927 /*0185*/ 0x001006a2U,
3928 /*0186*/ 0x101006a2U,
3929 /*0187*/ 0x001006a3U,
3930 /*0188*/ 0x101006a3U,
3931 /*0189*/ 0x001006a4U,
3932 /*018a*/ 0x100306a4U,
3933 /*018b*/ 0x180406a4U,
3934 /*018c*/ 0x000106a5U,
3935 /*018d*/ 0x080806a5U,
3936 /*018e*/ 0x100106a5U,
3937 /*018f*/ 0x180506a5U,
3938 /*0190*/ 0x000106a6U,
3939 /*0191*/ 0x081406a6U,
3940 /*0192*/ 0x000a06a7U,
3941 /*0193*/ 0x100c06a7U,
3942 /*0194*/ 0x001206a8U,
3943 /*0195*/ 0x001406a9U,
3944 /*0196*/ 0x001206aaU,
3945 /*0197*/ 0x001106abU,
3946 /*0198*/ 0x001106acU,
3947 /*0199*/ 0x001206adU,
3948 /*019a*/ 0x001206aeU,
3949 /*019b*/ 0x001206afU,
3950 /*019c*/ 0x001206b0U,
3951 /*019d*/ 0x001206b1U,
3952 /*019e*/ 0x001206b2U,
3953 /*019f*/ 0x001206b3U,
3954 /*01a0*/ 0x001206b4U,
3955 /*01a1*/ 0x001206b5U,
3956 /*01a2*/ 0x001206b6U,
3957 /*01a3*/ 0x000e06b7U,
3958 /*01a4*/ 0x100d06b7U,
3959 /*01a5*/ 0x002006b8U,
3960 /*01a6*/ 0x001706b9U,
3961 /*01a7*/ 0x000906baU,
3962 /*01a8*/ 0x100106baU,
3963 /*01a9*/ 0x180106baU,
3964 /*01aa*/ 0x002006bbU,
3965 /*01ab*/ 0x000806bcU,
3966 /*01ac*/ 0x080306bcU,
3967 /*01ad*/ 0x100306bcU,
3968 /*01ae*/ 0x001806bdU,
3969 /*01af*/ 0x001806beU,
3970 /*01b0*/ 0x180706beU,
3971 /*01b1*/ 0x000506bfU,
3972 /*01b2*/ 0x080806bfU,
3973 /*01b3*/ 0x100806bfU,
3974 /*01b4*/ 0x180806bfU,
3975 /*01b5*/ 0x000106c0U,
3976 /*01b6*/ 0x080106c0U,
3977 /*01b7*/ 0x002006c1U,
3978 /*01b8*/ 0xffffffffU,
3979 /*01b9*/ 0xffffffffU,
3980 /*01ba*/ 0xffffffffU,
3981 /*01bb*/ 0xffffffffU,
3982 /*01bc*/ 0xffffffffU,
3983 /*01bd*/ 0xffffffffU,
3984 /*01be*/ 0xffffffffU,
3985 /*01bf*/ 0x001006c2U,
3986 /*01c0*/ 0x100106c2U,
3987 /*01c1*/ 0x180106c2U,
3988 /*01c2*/ 0x000206c3U,
3989 /*01c3*/ 0x080406c3U,
3990 /*01c4*/ 0x100906c3U,
3991 /*01c5*/ 0x000706c4U,
3992 /*01c6*/ 0x080406c4U,
3993 /*01c7*/ 0x002006c5U,
3994 /*01c8*/ 0x000106c6U,
3995 /*01c9*/ 0x080206c6U,
3996 /*01ca*/ 0x100606c6U,
3997 /*01cb*/ 0x001006c7U,
3998 /*01cc*/ 0x100106c7U,
3999 /*01cd*/ 0x002006c8U,
4000 /*01ce*/ 0x000806c9U,
4001 /*01cf*/ 0x080106c9U,
4002 /*01d0*/ 0x100506c9U,
4003 /*01d1*/ 0xffffffffU,
4004 /*01d2*/ 0x180206c9U,
4005 /*01d3*/ 0x000106caU,
4006 /*01d4*/ 0x002006cbU,
4007 /*01d5*/ 0x000b06ccU,
4008 /*01d6*/ 0x100106ccU,
4009 /*01d7*/ 0x180306ccU,
4010 /*01d8*/ 0x000806cdU,
4011 /*01d9*/ 0x080206cdU,
4012 /*01da*/ 0x100c06cdU,
4013 /*01db*/ 0x000406ceU,
4014 /*01dc*/ 0x080106ceU,
4015 /*01dd*/ 0xffffffffU,
4016 /*01de*/ 0x00010200U,
4017 /*01df*/ 0x08040200U,
4018 /*01e0*/ 0x10100200U,
4019 /*01e1*/ 0x00010201U,
4020 /*01e2*/ 0x08010201U,
4021 /*01e3*/ 0x10010201U,
4022 /*01e4*/ 0xffffffffU,
4023 /*01e5*/ 0x00100202U,
4024 /*01e6*/ 0x10080202U,
4025 /*01e7*/ 0xffffffffU,
4026 /*01e8*/ 0xffffffffU,
4027 /*01e9*/ 0xffffffffU,
4028 /*01ea*/ 0xffffffffU,
4029 /*01eb*/ 0xffffffffU,
4030 /*01ec*/ 0xffffffffU,
4031 /*01ed*/ 0xffffffffU,
4032 /*01ee*/ 0xffffffffU,
4033 /*01ef*/ 0x00200203U,
4034 /*01f0*/ 0x00100204U,
4035 /*01f1*/ 0x00200205U,
4036 /*01f2*/ 0x00100206U,
4037 /*01f3*/ 0x00200207U,
4038 /*01f4*/ 0x00100208U,
4039 /*01f5*/ 0x00140209U,
4040 /*01f6*/ 0x0020020aU,
4041 /*01f7*/ 0x0020020bU,
4042 /*01f8*/ 0x0020020cU,
4043 /*01f9*/ 0x0020020dU,
4044 /*01fa*/ 0x0014020eU,
4045 /*01fb*/ 0x0020020fU,
4046 /*01fc*/ 0x00200210U,
4047 /*01fd*/ 0x00200211U,
4048 /*01fe*/ 0x00200212U,
4049 /*01ff*/ 0x00140213U,
4050 /*0200*/ 0x00200214U,
4051 /*0201*/ 0x00200215U,
4052 /*0202*/ 0x00200216U,
4053 /*0203*/ 0x00200217U,
4054 /*0204*/ 0x00090218U,
4055 /*0205*/ 0x10010218U,
4056 /*0206*/ 0x00200219U,
4057 /*0207*/ 0x0005021aU,
4058 /*0208*/ 0x0801021aU,
4059 /*0209*/ 0x1008021aU,
4060 /*020a*/ 0x1808021aU,
4061 /*020b*/ 0x001c021bU,
4062 /*020c*/ 0x001c021cU,
4063 /*020d*/ 0x001c021dU,
4064 /*020e*/ 0x001c021eU,
4065 /*020f*/ 0x001c021fU,
4066 /*0210*/ 0x001c0220U,
4067 /*0211*/ 0x001c0221U,
4068 /*0212*/ 0x001c0222U,
4069 /*0213*/ 0x001c0223U,
4070 /*0214*/ 0x001c0224U,
4071 /*0215*/ 0x001c0225U,
4072 /*0216*/ 0x001c0226U,
4073 /*0217*/ 0x001c0227U,
4074 /*0218*/ 0x001c0228U,
4075 /*0219*/ 0x001c0229U,
4076 /*021a*/ 0x001c022aU,
4077 /*021b*/ 0x0001022bU,
4078 /*021c*/ 0x0801022bU,
4079 /*021d*/ 0x1001022bU,
4080 /*021e*/ 0x1804022bU,
4081 /*021f*/ 0x0008022cU,
4082 /*0220*/ 0x0808022cU,
4083 /*0221*/ 0x1008022cU,
4084 /*0222*/ 0x1804022cU,
4085 /*0223*/ 0x0007022dU,
4086 /*0224*/ 0xffffffffU,
4087 /*0225*/ 0x0807022dU,
4088 /*0226*/ 0x1007022dU,
4089 /*0227*/ 0xffffffffU,
4090 /*0228*/ 0x1807022dU,
4091 /*0229*/ 0x0007022eU,
4092 /*022a*/ 0xffffffffU,
4093 /*022b*/ 0x0807022eU,
4094 /*022c*/ 0x1002022eU,
4095 /*022d*/ 0x1801022eU,
4096 /*022e*/ 0x0001022fU,
4097 /*022f*/ 0x080a022fU,
4098 /*0230*/ 0x00140230U,
4099 /*0231*/ 0x000a0231U,
4100 /*0232*/ 0x00140232U,
4101 /*0233*/ 0x000a0233U,
4102 /*0234*/ 0x00140234U,
4103 /*0235*/ 0x18010234U,
4104 /*0236*/ 0x00100235U,
4105 /*0237*/ 0x10050235U,
4106 /*0238*/ 0x18010235U,
4107 /*0239*/ 0x00010236U,
4108 /*023a*/ 0x08010236U,
4109 /*023b*/ 0x10010236U,
4110 /*023c*/ 0x18010236U,
4111 /*023d*/ 0x00010237U,
4112 /*023e*/ 0x08010237U,
4113 /*023f*/ 0x10020237U,
4114 /*0240*/ 0x18020237U,
4115 /*0241*/ 0x00020238U,
4116 /*0242*/ 0x08020238U,
4117 /*0243*/ 0x10020238U,
4118 /*0244*/ 0x18030238U,
4119 /*0245*/ 0x00010239U,
4120 /*0246*/ 0x08010239U,
4121 /*0247*/ 0x10010239U,
4122 /*0248*/ 0x18010239U,
4123 /*0249*/ 0xffffffffU,
4124 /*024a*/ 0x0002023aU,
4125 /*024b*/ 0x0801023aU,
4126 /*024c*/ 0x1001023aU,
4127 /*024d*/ 0xffffffffU,
4128 /*024e*/ 0x1802023aU,
4129 /*024f*/ 0x0001023bU,
4130 /*0250*/ 0x0801023bU,
4131 /*0251*/ 0xffffffffU,
4132 /*0252*/ 0x1002023bU,
4133 /*0253*/ 0x1801023bU,
4134 /*0254*/ 0x0001023cU,
4135 /*0255*/ 0xffffffffU,
4136 /*0256*/ 0x0802023cU,
4137 /*0257*/ 0x1007023cU,
4138 /*0258*/ 0x1801023cU,
4139 /*0259*/ 0x0001023dU,
4140 /*025a*/ 0x0801023dU,
4141 /*025b*/ 0x1001023dU,
4142 /*025c*/ 0x1801023dU,
4143 /*025d*/ 0x0001023eU,
4144 /*025e*/ 0x0801023eU,
4145 /*025f*/ 0x1001023eU,
4146 /*0260*/ 0x1804023eU,
4147 /*0261*/ 0x0004023fU,
4148 /*0262*/ 0x0804023fU,
4149 /*0263*/ 0x1001023fU,
4150 /*0264*/ 0x1802023fU,
4151 /*0265*/ 0x00060240U,
4152 /*0266*/ 0x08060240U,
4153 /*0267*/ 0x10020240U,
4154 /*0268*/ 0x18020240U,
4155 /*0269*/ 0x00020241U,
4156 /*026a*/ 0xffffffffU,
4157 /*026b*/ 0x08100241U,
4158 /*026c*/ 0x18010241U,
4159 /*026d*/ 0x00010242U,
4160 /*026e*/ 0x08010242U,
4161 /*026f*/ 0x10040242U,
4162 /*0270*/ 0x18010242U,
4163 /*0271*/ 0x00040243U,
4164 /*0272*/ 0x08020243U,
4165 /*0273*/ 0x10080243U,
4166 /*0274*/ 0xffffffffU,
4167 /*0275*/ 0xffffffffU,
4168 /*0276*/ 0xffffffffU,
4169 /*0277*/ 0x000a0244U,
4170 /*0278*/ 0x00200245U,
4171 /*0279*/ 0x00200246U,
4172 /*027a*/ 0x00050247U,
4173 /*027b*/ 0x08010247U,
4174 /*027c*/ 0x10050247U,
4175 /*027d*/ 0x18080247U,
4176 /*027e*/ 0x00010248U,
4177 /*027f*/ 0x08080248U,
4178 /*0280*/ 0x10010248U,
4179 /*0281*/ 0x18080248U,
4180 /*0282*/ 0x00010249U,
4181 /*0283*/ 0x08040249U,
4182 /*0284*/ 0x10040249U,
4183 /*0285*/ 0x18040249U,
4184 /*0286*/ 0x0004024aU,
4185 /*0287*/ 0x0804024aU,
4186 /*0288*/ 0x1004024aU,
4187 /*0289*/ 0x1804024aU,
4188 /*028a*/ 0x0004024bU,
4189 /*028b*/ 0x0804024bU,
4190 /*028c*/ 0x1004024bU,
4191 /*028d*/ 0x1801024bU,
4192 /*028e*/ 0x0004024cU,
4193 /*028f*/ 0x0804024cU,
4194 /*0290*/ 0x1004024cU,
4195 /*0291*/ 0x1804024cU,
4196 /*0292*/ 0x0004024dU,
4197 /*0293*/ 0x0804024dU,
4198 /*0294*/ 0x1006024dU,
4199 /*0295*/ 0x1806024dU,
4200 /*0296*/ 0x0006024eU,
4201 /*0297*/ 0x0806024eU,
4202 /*0298*/ 0x1006024eU,
4203 /*0299*/ 0x1806024eU,
4204 /*029a*/ 0xffffffffU,
4205 /*029b*/ 0x0001024fU,
4206 /*029c*/ 0x0801024fU,
4207 /*029d*/ 0x1002024fU,
4208 /*029e*/ 0xffffffffU,
4209 /*029f*/ 0xffffffffU,
4210 /*02a0*/ 0xffffffffU,
4211 /*02a1*/ 0xffffffffU,
4212 /*02a2*/ 0xffffffffU,
4213 /*02a3*/ 0xffffffffU,
4214 /*02a4*/ 0xffffffffU,
4215 /*02a5*/ 0xffffffffU,
4216 /*02a6*/ 0x1804024fU,
4217 /*02a7*/ 0x00040250U,
4218 /*02a8*/ 0x08010250U,
4219 /*02a9*/ 0x10010250U,
4220 /*02aa*/ 0x18010250U,
4221 /*02ab*/ 0x00010251U,
4222 /*02ac*/ 0x08010251U,
4223 /*02ad*/ 0x10010251U,
4224 /*02ae*/ 0x18010251U,
4225 /*02af*/ 0x00010252U,
4226 /*02b0*/ 0x08010252U,
4227 /*02b1*/ 0x10040252U,
4228 /*02b2*/ 0x18040252U,
4229 /*02b3*/ 0x000a0253U,
4230 /*02b4*/ 0x00200254U,
4231 /*02b5*/ 0x00040255U,
4232 /*02b6*/ 0x08080255U,
4233 /*02b7*/ 0x10020255U,
4234 /*02b8*/ 0x18020255U,
4235 /*02b9*/ 0x00020256U,
4236 /*02ba*/ 0x08020256U,
4237 /*02bb*/ 0x10020256U,
4238 /*02bc*/ 0x18020256U,
4239 /*02bd*/ 0xffffffffU,
4240 /*02be*/ 0xffffffffU,
4241 /*02bf*/ 0x00200257U,
4242 /*02c0*/ 0x00020258U,
4243 /*02c1*/ 0x08100258U,
4244 /*02c2*/ 0x00100259U,
4245 /*02c3*/ 0x10040259U,
4246 /*02c4*/ 0x18040259U,
4247 /*02c5*/ 0x0005025aU,
4248 /*02c6*/ 0x0805025aU,
4249 /*02c7*/ 0x0020025bU,
4250 /*02c8*/ 0x0020025cU,
4251 /*02c9*/ 0x0020025dU,
4252 /*02ca*/ 0x0020025eU,
4253 /*02cb*/ 0x0001025fU,
4254 /*02cc*/ 0x0801025fU,
4255 /*02cd*/ 0x1007025fU,
4256 /*02ce*/ 0x1807025fU,
4257 /*02cf*/ 0x00070260U,
4258 /*02d0*/ 0x08070260U,
4259 /*02d1*/ 0x10070260U,
4260 /*02d2*/ 0x18070260U,
4261 /*02d3*/ 0x00070261U,
4262 /*02d4*/ 0x08070261U,
4263 /*02d5*/ 0x10070261U,
4264 /*02d6*/ 0x18070261U,
4265 /*02d7*/ 0x00070262U,
4266 /*02d8*/ 0x08070262U,
4267 /*02d9*/ 0x10070262U,
4268 /*02da*/ 0x18070262U,
4269 /*02db*/ 0x00030263U,
4270 /*02dc*/ 0x08030263U,
4271 /*02dd*/ 0x10030263U,
4272 /*02de*/ 0xffffffffU,
4273 /*02df*/ 0x18010263U,
4274 /*02e0*/ 0x00020264U,
4275 /*02e1*/ 0x08010264U,
4276 /*02e2*/ 0x10040264U,
4277 /*02e3*/ 0x18020264U,
4278 /*02e4*/ 0x00010265U,
4279 /*02e5*/ 0x08010265U,
4280 /*02e6*/ 0x10010265U,
4281 /*02e7*/ 0x18010265U,
4282 /*02e8*/ 0x00040266U,
4283 /*02e9*/ 0x08080266U,
4284 /*02ea*/ 0x100a0266U,
4285 /*02eb*/ 0x000a0267U,
4286 /*02ec*/ 0x100a0267U,
4287 /*02ed*/ 0x000a0268U,
4288 /*02ee*/ 0x100a0268U,
4289 /*02ef*/ 0x000a0269U,
4290 /*02f0*/ 0x0020026aU,
4291 /*02f1*/ 0x0020026bU,
4292 /*02f2*/ 0x0001026cU,
4293 /*02f3*/ 0x0802026cU,
4294 /*02f4*/ 0x1002026cU,
4295 /*02f5*/ 0x1802026cU,
4296 /*02f6*/ 0xffffffffU,
4297 /*02f7*/ 0x0002026dU,
4298 /*02f8*/ 0x0810026dU,
4299 /*02f9*/ 0x1805026dU,
4300 /*02fa*/ 0x0006026eU,
4301 /*02fb*/ 0x0805026eU,
4302 /*02fc*/ 0x1005026eU,
4303 /*02fd*/ 0x000e026fU,
4304 /*02fe*/ 0x1005026fU,
4305 /*02ff*/ 0x000e0270U,
4306 /*0300*/ 0x10050270U,
4307 /*0301*/ 0x000e0271U,
4308 /*0302*/ 0x10050271U,
4309 /*0303*/ 0x18010271U,
4310 /*0304*/ 0x00050272U,
4311 /*0305*/ 0x08050272U,
4312 /*0306*/ 0x100a0272U,
4313 /*0307*/ 0x000a0273U,
4314 /*0308*/ 0x10050273U,
4315 /*0309*/ 0x18050273U,
4316 /*030a*/ 0x000a0274U,
4317 /*030b*/ 0x100a0274U,
4318 /*030c*/ 0x00050275U,
4319 /*030d*/ 0x08050275U,
4320 /*030e*/ 0x100a0275U,
4321 /*030f*/ 0x000a0276U,
4322 /*0310*/ 0xffffffffU,
4323 /*0311*/ 0xffffffffU,
4324 /*0312*/ 0xffffffffU,
4325 /*0313*/ 0xffffffffU,
4326 /*0314*/ 0xffffffffU,
4327 /*0315*/ 0xffffffffU,
4328 /*0316*/ 0x10070276U,
4329 /*0317*/ 0x18070276U,
4330 /*0318*/ 0x00040277U,
4331 /*0319*/ 0x08040277U,
4332 /*031a*/ 0xffffffffU,
4333 /*031b*/ 0xffffffffU,
4334 /*031c*/ 0xffffffffU,
4335 /*031d*/ 0x10040277U,
4336 /*031e*/ 0x18080277U,
4337 /*031f*/ 0x00080278U,
4338 /*0320*/ 0x08040278U,
4339 /*0321*/ 0xffffffffU,
4340 /*0322*/ 0xffffffffU,
4341 /*0323*/ 0xffffffffU,
4342 /*0324*/ 0x10040278U,
4343 /*0325*/ 0xffffffffU,
4344 /*0326*/ 0xffffffffU,
4345 /*0327*/ 0xffffffffU,
4346 /*0328*/ 0x18040278U,
4347 /*0329*/ 0xffffffffU,
4348 /*032a*/ 0xffffffffU,
4349 /*032b*/ 0xffffffffU,
4350 /*032c*/ 0x00040279U,
4351 /*032d*/ 0x08050279U,
4352 /*032e*/ 0x10070279U,
4353 /*032f*/ 0x18080279U,
4354 /*0330*/ 0x0010027aU,
4355 /*0331*/ 0x1008027aU,
4356 /*0332*/ 0x0010027bU,
4357 /*0333*/ 0x1008027bU,
4358 /*0334*/ 0x0010027cU,
4359 /*0335*/ 0x1008027cU,
4360 /*0336*/ 0x1808027cU,
4361 /*0337*/ 0x0001027dU,
4362 /*0338*/ 0x0801027dU,
4363 /*0339*/ 0x1006027dU,
4364 /*033a*/ 0x1806027dU,
4365 /*033b*/ 0x0006027eU,
4366 /*033c*/ 0x0801027eU,
4367 /*033d*/ 0x1001027eU,
4368 /*033e*/ 0x1803027eU,
4369 /*033f*/ 0x000a027fU,
4370 /*0340*/ 0x100a027fU,
4371 /*0341*/ 0x000a0280U,
4372 /*0342*/ 0xffffffffU,
4373 /*0343*/ 0x100a0280U,
4374 /*0344*/ 0x00040281U,
4375 /*0345*/ 0x08010281U,
4376 /*0346*/ 0x10040281U,
4377 /*0347*/ 0xffffffffU,
4378 /*0348*/ 0xffffffffU,
4379 /*0349*/ 0xffffffffU,
4380 /*034a*/ 0xffffffffU,
4381 /*034b*/ 0xffffffffU,
4382 /*034c*/ 0xffffffffU,
4383 /*034d*/ 0x18070281U,
4384 /*034e*/ 0x00070282U,
4385 /*034f*/ 0x08050282U,
4386 /*0350*/ 0x10050282U,
4387 /*0351*/ 0xffffffffU,
4388 /*0352*/ 0xffffffffU,
4389 /*0353*/ 0xffffffffU,
4390 /*0354*/ 0x18040282U,
4391 /*0355*/ 0x00010283U,
4392 /*0356*/ 0x08010283U,
4393 /*0357*/ 0x10020283U,
4394 /*0358*/ 0x18080283U,
4395 /*0359*/ 0x00200284U,
4396 /*035a*/ 0x00200285U,
4397 /*035b*/ 0x00100286U,
4398 /*035c*/ 0x10020286U,
4399 /*035d*/ 0x18020286U,
4400 /*035e*/ 0x00020287U,
4401 /*035f*/ 0xffffffffU,
4402 /*0360*/ 0x08010287U,
4403 /*0361*/ 0x10010287U,
4404 /*0362*/ 0x18020287U,
4405 /*0363*/ 0x00080288U,
4406 /*0364*/ 0x08080288U,
4407 /*0365*/ 0x10080288U,
4408 /*0366*/ 0x18080288U,
4409 /*0367*/ 0x00080289U,
4410 /*0368*/ 0x08080289U,
4411 /*0369*/ 0xffffffffU,
4412 /*036a*/ 0x10080289U,
4413 /*036b*/ 0x18080289U,
4414 /*036c*/ 0x0008028aU,
4415 /*036d*/ 0x0808028aU,
4416 /*036e*/ 0x1008028aU,
4417 /*036f*/ 0x1808028aU,
4418 /*0370*/ 0xffffffffU,
4419 /*0371*/ 0x0008028bU,
4420 /*0372*/ 0x0808028bU,
4421 /*0373*/ 0x1008028bU,
4422 /*0374*/ 0x1808028bU,
4423 /*0375*/ 0x0008028cU,
4424 /*0376*/ 0x0808028cU,
4425 /*0377*/ 0xffffffffU,
4426 /*0378*/ 0x1008028cU,
4427 /*0379*/ 0x1808028cU,
4428 /*037a*/ 0x0008028dU,
4429 /*037b*/ 0x0808028dU,
4430 /*037c*/ 0x1008028dU,
4431 /*037d*/ 0x1808028dU,
4432 /*037e*/ 0x0008028eU,
4433 /*037f*/ 0xffffffffU,
4434 /*0380*/ 0x0808028eU,
4435 /*0381*/ 0x1008028eU,
4436 /*0382*/ 0x1808028eU,
4437 /*0383*/ 0x0008028fU,
4438 /*0384*/ 0x0808028fU,
4439 /*0385*/ 0x1008028fU,
4440 /*0386*/ 0xffffffffU,
4441 /*0387*/ 0x1808028fU,
4442 /*0388*/ 0x00080290U,
4443 /*0389*/ 0x08080290U,
4444 /*038a*/ 0x10080290U,
4445 /*038b*/ 0x18080290U,
4446 /*038c*/ 0x00080291U,
4447 /*038d*/ 0xffffffffU,
4448 /*038e*/ 0x08080291U,
4449 /*038f*/ 0x10080291U,
4450 /*0390*/ 0x18080291U,
4451 /*0391*/ 0x00080292U,
4452 /*0392*/ 0x08080292U,
4453 /*0393*/ 0x10080292U,
4454 /*0394*/ 0x18080292U,
4455 /*0395*/ 0xffffffffU,
4456 /*0396*/ 0x00080293U,
4457 /*0397*/ 0x08080293U,
4458 /*0398*/ 0x10080293U,
4459 /*0399*/ 0x18080293U,
4460 /*039a*/ 0x00080294U,
4461 /*039b*/ 0x08080294U,
4462 /*039c*/ 0xffffffffU,
4463 /*039d*/ 0x10080294U,
4464 /*039e*/ 0x18080294U,
4465 /*039f*/ 0x00080295U,
4466 /*03a0*/ 0x08080295U,
4467 /*03a1*/ 0x10080295U,
4468 /*03a2*/ 0x18080295U,
4469 /*03a3*/ 0xffffffffU,
4470 /*03a4*/ 0x00080296U,
4471 /*03a5*/ 0x08080296U,
4472 /*03a6*/ 0x10080296U,
4473 /*03a7*/ 0x18080296U,
4474 /*03a8*/ 0x00080297U,
4475 /*03a9*/ 0x08080297U,
4476 /*03aa*/ 0x10080297U,
4477 /*03ab*/ 0xffffffffU,
4478 /*03ac*/ 0x18080297U,
4479 /*03ad*/ 0x00080298U,
4480 /*03ae*/ 0x08080298U,
4481 /*03af*/ 0x10080298U,
4482 /*03b0*/ 0x18080298U,
4483 /*03b1*/ 0x00080299U,
4484 /*03b2*/ 0xffffffffU,
4485 /*03b3*/ 0x08080299U,
4486 /*03b4*/ 0x10080299U,
4487 /*03b5*/ 0x18080299U,
4488 /*03b6*/ 0x0008029aU,
4489 /*03b7*/ 0x0808029aU,
4490 /*03b8*/ 0x1008029aU,
4491 /*03b9*/ 0xffffffffU,
4492 /*03ba*/ 0x1808029aU,
4493 /*03bb*/ 0x0002029bU,
4494 /*03bc*/ 0x0803029bU,
4495 /*03bd*/ 0x100a029bU,
4496 /*03be*/ 0x000a029cU,
4497 /*03bf*/ 0x100a029cU,
4498 /*03c0*/ 0x0005029dU,
4499 /*03c1*/ 0x0808029dU,
4500 /*03c2*/ 0x1008029dU,
4501 /*03c3*/ 0x1808029dU,
4502 /*03c4*/ 0x0006029eU,
4503 /*03c5*/ 0x0806029eU,
4504 /*03c6*/ 0x0011029fU,
4505 /*03c7*/ 0x1808029fU,
4506 /*03c8*/ 0x000402a0U,
4507 /*03c9*/ 0x080602a0U,
4508 /*03ca*/ 0xffffffffU,
4509 /*03cb*/ 0x100602a0U,
4510 /*03cc*/ 0x180802a0U,
4511 /*03cd*/ 0xffffffffU,
4512 /*03ce*/ 0x000802a1U,
4513 /*03cf*/ 0x080802a1U,
4514 /*03d0*/ 0x100802a1U,
4515 /*03d1*/ 0x180602a1U,
4516 /*03d2*/ 0x000602a2U,
4517 /*03d3*/ 0x081102a2U,
4518 /*03d4*/ 0x000802a3U,
4519 /*03d5*/ 0x080402a3U,
4520 /*03d6*/ 0x100602a3U,
4521 /*03d7*/ 0xffffffffU,
4522 /*03d8*/ 0x180602a3U,
4523 /*03d9*/ 0x000802a4U,
4524 /*03da*/ 0xffffffffU,
4525 /*03db*/ 0x080802a4U,
4526 /*03dc*/ 0x100802a4U,
4527 /*03dd*/ 0x180802a4U,
4528 /*03de*/ 0x000602a5U,
4529 /*03df*/ 0x080602a5U,
4530 /*03e0*/ 0x001102a6U,
4531 /*03e1*/ 0x180802a6U,
4532 /*03e2*/ 0x000402a7U,
4533 /*03e3*/ 0x080602a7U,
4534 /*03e4*/ 0xffffffffU,
4535 /*03e5*/ 0x100602a7U,
4536 /*03e6*/ 0x180802a7U,
4537 /*03e7*/ 0xffffffffU,
4538 /*03e8*/ 0x000402a8U,
4539 /*03e9*/ 0x080402a8U,
4540 /*03ea*/ 0x100402a8U,
4541 /*03eb*/ 0x180402a8U,
4542 /*03ec*/ 0x000402a9U,
4543 /*03ed*/ 0x080402a9U,
4544 /*03ee*/ 0x100402a9U,
4545 /*03ef*/ 0x180402a9U,
4546 /*03f0*/ 0x000402aaU,
4547 /*03f1*/ 0x080402aaU,
4548 /*03f2*/ 0x100402aaU,
4549 /*03f3*/ 0x180402aaU,
4550 /*03f4*/ 0x000402abU,
4551 /*03f5*/ 0x080402abU,
4552 /*03f6*/ 0x100402abU,
4553 /*03f7*/ 0x180402abU,
4554 /*03f8*/ 0x000402acU,
4555 /*03f9*/ 0x080402acU,
4556 /*03fa*/ 0x100402acU,
4557 /*03fb*/ 0x180402acU,
4558 /*03fc*/ 0x001202adU,
4559 /*03fd*/ 0x001102aeU,
4560 /*03fe*/ 0x001202afU,
4561 /*03ff*/ 0x002002b0U,
4562 /*0400*/ 0x002002b1U,
4563 /*0401*/ 0x002002b2U,
4564 /*0402*/ 0x002002b3U,
4565 /*0403*/ 0x002002b4U,
4566 /*0404*/ 0x002002b5U,
4567 /*0405*/ 0x002002b6U,
4568 /*0406*/ 0x002002b7U,
4569 /*0407*/ 0x002002b8U,
4570 /*0408*/ 0x000202b9U,
4571 /*0409*/ 0x080502b9U,
4572 /*040a*/ 0x100502b9U,
4573 /*040b*/ 0x180102b9U,
4574 /*040c*/ 0x000402baU,
4575 /*040d*/ 0x080402baU,
4576 /*040e*/ 0x100402baU,
4577 /*040f*/ 0x180402baU,
4578 /*0410*/ 0x000402bbU,
4579 /*0411*/ 0x080402bbU,
4580 /*0412*/ 0x100402bbU,
4581 /*0413*/ 0x180402bbU,
4582 /*0414*/ 0xffffffffU,
4583 /*0415*/ 0xffffffffU,
4584 /*0416*/ 0xffffffffU,
4585 /*0417*/ 0xffffffffU,
4586 /*0418*/ 0xffffffffU,
4587 /*0419*/ 0xffffffffU,
4588 /*041a*/ 0x000402bcU,
4589 /*041b*/ 0x080402bcU,
4590 /*041c*/ 0x100402bcU,
4591 /*041d*/ 0x180402bcU,
4592 /*041e*/ 0x000402bdU,
4593 /*041f*/ 0x080402bdU,
4594 /*0420*/ 0x100402bdU,
4595 /*0421*/ 0x180402bdU,
4596 /*0422*/ 0x000102beU,
4597 /*0423*/ 0x080202beU,
4598 /*0424*/ 0x100202beU,
4599 /*0425*/ 0x180202beU,
4600 /*0426*/ 0x000202bfU,
4601 /*0427*/ 0x080102bfU,
4602 /*0428*/ 0x100402bfU,
4603 /*0429*/ 0x001002c0U,
4604 /*042a*/ 0x002002c1U,
4605 /*042b*/ 0x001002c2U,
4606 /*042c*/ 0x002002c3U,
4607 /*042d*/ 0x001002c4U,
4608 /*042e*/ 0x002002c5U,
4609 /*042f*/ 0x000702c6U,
4610 /*0430*/ 0x080102c6U,
4611 /*0431*/ 0x100202c6U,
4612 /*0432*/ 0x180602c6U,
4613 /*0433*/ 0x000102c7U,
4614 /*0434*/ 0x080102c7U,
4615 /*0435*/ 0x002002c8U,
4616 /*0436*/ 0x000202c9U,
4617 /*0437*/ 0x002002caU,
4618 /*0438*/ 0x002002cbU,
4619 /*0439*/ 0x000c02ccU,
4620 /*043a*/ 0x100c02ccU,
4621 /*043b*/ 0x002002cdU,
4622 /*043c*/ 0x000302ceU,
4623 /*043d*/ 0x002002cfU,
4624 /*043e*/ 0x000302d0U,
4625 /*043f*/ 0x002002d1U,
4626 /*0440*/ 0x000302d2U,
4627 /*0441*/ 0x002002d3U,
4628 /*0442*/ 0x000302d4U,
4629 /*0443*/ 0x002002d5U,
4630 /*0444*/ 0x000302d6U,
4631 /*0445*/ 0x002002d7U,
4632 /*0446*/ 0x000302d8U,
4633 /*0447*/ 0x002002d9U,
4634 /*0448*/ 0x000302daU,
4635 /*0449*/ 0x002002dbU,
4636 /*044a*/ 0x000302dcU,
4637 /*044b*/ 0x002002ddU,
4638 /*044c*/ 0x000302deU,
4639 /*044d*/ 0x002002dfU,
4640 /*044e*/ 0x000302e0U,
4641 /*044f*/ 0x080302e0U,
4642 /*0450*/ 0x100202e0U,
4643 /*0451*/ 0x180202e0U,
4644 /*0452*/ 0x002002e1U,
4645 /*0453*/ 0x002002e2U,
4646 /*0454*/ 0x002002e3U,
4647 /*0455*/ 0x002002e4U,
4648 /*0456*/ 0x000402e5U,
4649 /*0457*/ 0x001e02e6U,
4650 /*0458*/ 0x001e02e7U,
4651 /*0459*/ 0x001e02e8U,
4652 /*045a*/ 0x001e02e9U,
4653 /*045b*/ 0x001e02eaU,
4654 /*045c*/ 0x001e02ebU,
4655 /*045d*/ 0x001e02ecU,
4656 /*045e*/ 0x001e02edU,
4657 /*045f*/ 0x000402eeU,
4658 /*0460*/ 0xffffffffU,
4659 /*0461*/ 0xffffffffU,
4660 /*0462*/ 0xffffffffU,
4661 /*0463*/ 0xffffffffU,
4662 /*0464*/ 0x080402eeU,
4663 /*0465*/ 0x100102eeU,
4664 /*0466*/ 0x180802eeU,
4665 /*0467*/ 0x000402efU,
4666 /*0468*/ 0x080102efU,
4667 /*0469*/ 0x100802efU,
4668 /*046a*/ 0x180402efU,
4669 /*046b*/ 0x000102f0U,
4670 /*046c*/ 0x080802f0U,
4671 /*046d*/ 0x100402f0U,
4672 /*046e*/ 0x180102f0U,
4673 /*046f*/ 0x000802f1U,
4674 /*0470*/ 0x080402f1U,
4675 /*0471*/ 0x100102f1U,
4676 /*0472*/ 0x180802f1U,
4677 /*0473*/ 0x000402f2U,
4678 /*0474*/ 0x080102f2U,
4679 /*0475*/ 0x100802f2U,
4680 /*0476*/ 0x180402f2U,
4681 /*0477*/ 0x000102f3U,
4682 /*0478*/ 0x080802f3U,
4683 /*0479*/ 0x100402f3U,
4684 /*047a*/ 0x180102f3U,
4685 /*047b*/ 0x000802f4U,
4686 /*047c*/ 0x080802f4U,
4687 /*047d*/ 0x100102f4U,
4688 /*047e*/ 0x180502f4U,
4689 /*047f*/ 0xffffffffU,
4690 /*0480*/ 0xffffffffU,
4691 /*0481*/ 0xffffffffU,
4692 /*0482*/ 0xffffffffU,
4693 /*0483*/ 0xffffffffU,
4694 /*0484*/ 0xffffffffU,
4695 /*0485*/ 0xffffffffU,
4696 /*0486*/ 0xffffffffU,
4697 /*0487*/ 0xffffffffU,
4698 /*0488*/ 0xffffffffU,
4699 /*0489*/ 0xffffffffU,
4700 /*048a*/ 0xffffffffU,
4701 /*048b*/ 0xffffffffU,
4702 /*048c*/ 0xffffffffU,
4703 /*048d*/ 0xffffffffU,
4704 /*048e*/ 0xffffffffU,
4705 /*048f*/ 0xffffffffU,
4706 /*0490*/ 0xffffffffU,
4707 /*0491*/ 0xffffffffU,
4708 /*0492*/ 0xffffffffU,
4709 /*0493*/ 0xffffffffU,
4710 /*0494*/ 0xffffffffU,
4711 	 },
4712 	{
4713 /*0000*/ 0x00200800U,
4714 /*0001*/ 0x00040801U,
4715 /*0002*/ 0x080b0801U,
4716 /*0003*/ 0x000a0802U,
4717 /*0004*/ 0x10020802U,
4718 /*0005*/ 0x18010802U,
4719 /*0006*/ 0x00060803U,
4720 /*0007*/ 0x08060803U,
4721 /*0008*/ 0x10060803U,
4722 /*0009*/ 0x18060803U,
4723 /*000a*/ 0x00060804U,
4724 /*000b*/ 0x08060804U,
4725 /*000c*/ 0x10050804U,
4726 /*000d*/ 0x18060804U,
4727 /*000e*/ 0x00060805U,
4728 /*000f*/ 0x08040805U,
4729 /*0010*/ 0x10030805U,
4730 /*0011*/ 0x00180806U,
4731 /*0012*/ 0x18030806U,
4732 /*0013*/ 0x00180807U,
4733 /*0014*/ 0x18020807U,
4734 /*0015*/ 0x0801085eU,
4735 /*0016*/ 0x00020808U,
4736 /*0017*/ 0x08010808U,
4737 /*0018*/ 0x10010808U,
4738 /*0019*/ 0x18020808U,
4739 /*001a*/ 0x00050809U,
4740 /*001b*/ 0x08050809U,
4741 /*001c*/ 0x10040809U,
4742 /*001d*/ 0xffffffffU,
4743 /*001e*/ 0x18040809U,
4744 /*001f*/ 0x0002080aU,
4745 /*0020*/ 0x0805080aU,
4746 /*0021*/ 0x1009080aU,
4747 /*0022*/ 0x0001080bU,
4748 /*0023*/ 0x0020080cU,
4749 /*0024*/ 0x001c080dU,
4750 /*0025*/ 0x0001080eU,
4751 /*0026*/ 0x0807080eU,
4752 /*0027*/ 0x1009080eU,
4753 /*0028*/ 0x000a080fU,
4754 /*0029*/ 0x1005080fU,
4755 /*002a*/ 0x1801080fU,
4756 /*002b*/ 0x10010810U,
4757 /*002c*/ 0x18020810U,
4758 /*002d*/ 0x00090810U,
4759 /*002e*/ 0x00090811U,
4760 /*002f*/ 0x10020811U,
4761 /*0030*/ 0x00200812U,
4762 /*0031*/ 0x00010813U,
4763 /*0032*/ 0x08020813U,
4764 /*0033*/ 0x00200814U,
4765 /*0034*/ 0x00200815U,
4766 /*0035*/ 0x00200816U,
4767 /*0036*/ 0x00200817U,
4768 /*0037*/ 0xffffffffU,
4769 /*0038*/ 0xffffffffU,
4770 /*0039*/ 0xffffffffU,
4771 /*003a*/ 0xffffffffU,
4772 /*003b*/ 0x00030818U,
4773 /*003c*/ 0x08010818U,
4774 /*003d*/ 0x10040818U,
4775 /*003e*/ 0x18030818U,
4776 /*003f*/ 0x00040819U,
4777 /*0040*/ 0x08040819U,
4778 /*0041*/ 0x10040819U,
4779 /*0042*/ 0x18040819U,
4780 /*0043*/ 0x0001081aU,
4781 /*0044*/ 0x0801081aU,
4782 /*0045*/ 0x1006081aU,
4783 /*0046*/ 0x1804081aU,
4784 /*0047*/ 0x0008081bU,
4785 /*0048*/ 0x0806081bU,
4786 /*0049*/ 0x1004081bU,
4787 /*004a*/ 0x1806081bU,
4788 /*004b*/ 0x0004081cU,
4789 /*004c*/ 0x0802081cU,
4790 /*004d*/ 0x1005081cU,
4791 /*004e*/ 0x1808081cU,
4792 /*004f*/ 0xffffffffU,
4793 /*0050*/ 0x0006081dU,
4794 /*0051*/ 0x0803081dU,
4795 /*0052*/ 0x100b081dU,
4796 /*0053*/ 0x0004081eU,
4797 /*0054*/ 0x0804081eU,
4798 /*0055*/ 0x1004081eU,
4799 /*0056*/ 0x1801081eU,
4800 /*0057*/ 0xffffffffU,
4801 /*0058*/ 0x0009081fU,
4802 /*0059*/ 0x00200820U,
4803 /*005a*/ 0x00200821U,
4804 /*005b*/ 0x00200822U,
4805 /*005c*/ 0x00200823U,
4806 /*005d*/ 0x00100824U,
4807 /*005e*/ 0xffffffffU,
4808 /*005f*/ 0x10010824U,
4809 /*0060*/ 0x18060824U,
4810 /*0061*/ 0x00080825U,
4811 /*0062*/ 0x00200826U,
4812 /*0063*/ 0x00100827U,
4813 /*0064*/ 0x100b0827U,
4814 /*0065*/ 0x00070828U,
4815 /*0066*/ 0x08070828U,
4816 /*0067*/ 0x10090828U,
4817 /*0068*/ 0x00090829U,
4818 /*0069*/ 0x100b0829U,
4819 /*006a*/ 0x0007082aU,
4820 /*006b*/ 0x0808082aU,
4821 /*006c*/ 0x1009082aU,
4822 /*006d*/ 0x0003082bU,
4823 /*006e*/ 0x080a082bU,
4824 /*006f*/ 0x000a082cU,
4825 /*0070*/ 0x0011082dU,
4826 /*0071*/ 0x000a082eU,
4827 /*0072*/ 0x100a082eU,
4828 /*0073*/ 0x0010082fU,
4829 /*0074*/ 0x100e082fU,
4830 /*0075*/ 0x000e0830U,
4831 /*0076*/ 0x00120831U,
4832 /*0077*/ 0x000a0832U,
4833 /*0078*/ 0x100a0832U,
4834 /*0079*/ 0x00020833U,
4835 /*007a*/ 0x00200834U,
4836 /*007b*/ 0x000b0835U,
4837 /*007c*/ 0x100b0835U,
4838 /*007d*/ 0x00200836U,
4839 /*007e*/ 0x00130837U,
4840 /*007f*/ 0x00200838U,
4841 /*0080*/ 0x00200839U,
4842 /*0081*/ 0x0008083aU,
4843 /*0082*/ 0x0801083aU,
4844 /*0083*/ 0x1001083aU,
4845 /*0084*/ 0x1801083aU,
4846 /*0085*/ 0x0008083bU,
4847 /*0086*/ 0x080c083bU,
4848 /*0087*/ 0x000c083cU,
4849 /*0088*/ 0x100c083cU,
4850 /*0089*/ 0x000c083dU,
4851 /*008a*/ 0x100c083dU,
4852 /*008b*/ 0x000c083eU,
4853 /*008c*/ 0x100c083eU,
4854 /*008d*/ 0x000c083fU,
4855 /*008e*/ 0x100c083fU,
4856 /*008f*/ 0x000c0840U,
4857 /*0090*/ 0x100c0840U,
4858 /*0091*/ 0x000b0841U,
4859 /*0092*/ 0x10090841U,
4860 /*0093*/ 0x00010842U,
4861 /*0094*/ 0x000b0843U,
4862 /*0095*/ 0x100b0843U,
4863 /*0096*/ 0x000b0844U,
4864 /*0097*/ 0x100b0844U,
4865 /*0098*/ 0x000b0845U,
4866 /*0099*/ 0x100b0845U,
4867 /*009a*/ 0x000b0846U,
4868 /*009b*/ 0x100b0846U,
4869 /*009c*/ 0x000b0847U,
4870 /*009d*/ 0x100a0847U,
4871 /*009e*/ 0x00020848U,
4872 /*009f*/ 0x080a0848U,
4873 /*00a0*/ 0x000a0849U,
4874 /*00a1*/ 0x100a0849U,
4875 /*00a2*/ 0x000a084aU,
4876 /*00a3*/ 0x100a084aU,
4877 /*00a4*/ 0x000a084bU,
4878 /*00a5*/ 0x100a084bU,
4879 /*00a6*/ 0x000a084cU,
4880 /*00a7*/ 0x100a084cU,
4881 /*00a8*/ 0x000a084dU,
4882 /*00a9*/ 0x100a084dU,
4883 /*00aa*/ 0x000a084eU,
4884 /*00ab*/ 0x100a084eU,
4885 /*00ac*/ 0x000a084fU,
4886 /*00ad*/ 0x100a084fU,
4887 /*00ae*/ 0x000a0850U,
4888 /*00af*/ 0x100a0850U,
4889 /*00b0*/ 0x000a0851U,
4890 /*00b1*/ 0x100a0851U,
4891 /*00b2*/ 0x000a0852U,
4892 /*00b3*/ 0x100a0852U,
4893 /*00b4*/ 0x000a0853U,
4894 /*00b5*/ 0x100a0853U,
4895 /*00b6*/ 0x000a0854U,
4896 /*00b7*/ 0x100a0854U,
4897 /*00b8*/ 0x000a0855U,
4898 /*00b9*/ 0x100a0855U,
4899 /*00ba*/ 0x000a0856U,
4900 /*00bb*/ 0x10040856U,
4901 /*00bc*/ 0x18030856U,
4902 /*00bd*/ 0x000a0857U,
4903 /*00be*/ 0x100a0857U,
4904 /*00bf*/ 0x00010858U,
4905 /*00c0*/ 0x080a0858U,
4906 /*00c1*/ 0x18040858U,
4907 /*00c2*/ 0x000b0859U,
4908 /*00c3*/ 0x100a0859U,
4909 /*00c4*/ 0x0003085aU,
4910 /*00c5*/ 0x0008085bU,
4911 /*00c6*/ 0x0808085bU,
4912 /*00c7*/ 0x1008085bU,
4913 /*00c8*/ 0x1808085bU,
4914 /*00c9*/ 0x0008085cU,
4915 /*00ca*/ 0x0808085cU,
4916 /*00cb*/ 0x1008085cU,
4917 /*00cc*/ 0x1801085cU,
4918 /*00cd*/ 0x0008085dU,
4919 /*00ce*/ 0x0808085dU,
4920 /*00cf*/ 0x1002085dU,
4921 /*00d0*/ 0x1802085dU,
4922 /*00d1*/ 0x0005085eU,
4923 /*00d2*/ 0x1005085eU,
4924 /*00d3*/ 0x1805085eU,
4925 /*00d4*/ 0x0004085fU,
4926 /*00d5*/ 0x080b085fU,
4927 /*00d6*/ 0x1806085fU,
4928 /*00d7*/ 0x00080860U,
4929 /*00d8*/ 0x08080860U,
4930 /*00d9*/ 0x10040860U,
4931 /*00da*/ 0x18040860U,
4932 /*00db*/ 0x00060861U,
4933 /*00dc*/ 0x08040861U,
4934 /*00dd*/ 0x10050861U,
4935 /*00de*/ 0x000a0862U,
4936 /*00df*/ 0x100a0862U,
4937 /*00e0*/ 0x00080863U,
4938 /*00e1*/ 0x08010863U,
4939 /*00e2*/ 0x10040863U,
4940 /*00e3*/ 0x00020864U,
4941 /*00e4*/ 0x08030864U,
4942 /*00e5*/ 0x00050a00U,
4943 /*00e6*/ 0x08050a00U,
4944 /*00e7*/ 0x10050a00U,
4945 /*00e8*/ 0x18050a00U,
4946 /*00e9*/ 0x00050a01U,
4947 /*00ea*/ 0x08050a01U,
4948 /*00eb*/ 0x100b0a01U,
4949 /*00ec*/ 0x00010a02U,
4950 /*00ed*/ 0x08030a02U,
4951 /*00ee*/ 0x00200a03U,
4952 /*00ef*/ 0x00100a04U,
4953 /*00f0*/ 0x10040a04U,
4954 /*00f1*/ 0x000b0a05U,
4955 /*00f2*/ 0x10070a05U,
4956 /*00f3*/ 0x00090a06U,
4957 /*00f4*/ 0x10030a06U,
4958 /*00f5*/ 0x18030a06U,
4959 /*00f6*/ 0x00010a07U,
4960 /*00f7*/ 0x08010a07U,
4961 /*00f8*/ 0x10070a07U,
4962 /*00f9*/ 0x18070a07U,
4963 /*00fa*/ 0x00050a08U,
4964 /*00fb*/ 0x08010a08U,
4965 /*00fc*/ 0x10020a08U,
4966 /*00fd*/ 0x18030a08U,
4967 /*00fe*/ 0x00010a09U,
4968 /*00ff*/ 0x080f0a09U,
4969 /*0100*/ 0x00200a0aU,
4970 /*0101*/ 0x00200a0bU,
4971 /*0102*/ 0x000b0a0cU,
4972 /*0103*/ 0x100b0a0cU,
4973 /*0104*/ 0x000b0a0dU,
4974 /*0105*/ 0x00180a0eU,
4975 /*0106*/ 0x00180a0fU,
4976 /*0107*/ 0xffffffffU,
4977 /*0108*/ 0xffffffffU,
4978 /*0109*/ 0xffffffffU,
4979 /*010a*/ 0xffffffffU,
4980 /*010b*/ 0xffffffffU,
4981 /*010c*/ 0x18020a0fU,
4982 /*010d*/ 0x00020a10U,
4983 /*010e*/ 0x08040a10U,
4984 /*010f*/ 0x10040a10U,
4985 /*0110*/ 0x18010a10U,
4986 /*0111*/ 0x00010a11U,
4987 /*0112*/ 0x08010a11U,
4988 /*0113*/ 0x10030a11U,
4989 /*0114*/ 0x00200a12U,
4990 /*0115*/ 0x00200a13U,
4991 /*0116*/ 0xffffffffU,
4992 /*0117*/ 0x00140a14U,
4993 /*0118*/ 0x00140a15U,
4994 /*0119*/ 0x00140a16U,
4995 /*011a*/ 0x00140a17U,
4996 /*011b*/ 0x00140a18U,
4997 /*011c*/ 0x00140a19U,
4998 /*011d*/ 0x00140a1aU,
4999 /*011e*/ 0x00140a1bU,
5000 /*011f*/ 0x001e0a1cU,
5001 /*0120*/ 0x000a0a1dU,
5002 /*0121*/ 0x10060a1dU,
5003 /*0122*/ 0x18060a1dU,
5004 /*0123*/ 0x00060a1eU,
5005 /*0124*/ 0x08060a1eU,
5006 /*0125*/ 0x10060a1eU,
5007 /*0126*/ 0x00080a1fU,
5008 /*0127*/ 0x080b0a1fU,
5009 /*0128*/ 0x000b0a20U,
5010 /*0129*/ 0x100b0a20U,
5011 /*012a*/ 0x000b0a21U,
5012 /*012b*/ 0x100b0a21U,
5013 /*012c*/ 0x000b0a22U,
5014 /*012d*/ 0x10040a22U,
5015 /*012e*/ 0x000b0a23U,
5016 /*012f*/ 0x10060a23U,
5017 /*0130*/ 0x18080a23U,
5018 /*0131*/ 0x00080a24U,
5019 /*0132*/ 0x08040a24U,
5020 /*0133*/ 0x00020b80U,
5021 /*0134*/ 0x00010b81U,
5022 /*0135*/ 0x08010b81U,
5023 /*0136*/ 0x10020b81U,
5024 /*0137*/ 0x18050b81U,
5025 /*0138*/ 0x00050b82U,
5026 /*0139*/ 0x08050b82U,
5027 /*013a*/ 0x10050b82U,
5028 /*013b*/ 0x000b0b83U,
5029 /*013c*/ 0x10050b83U,
5030 /*013d*/ 0x18010b83U,
5031 /*013e*/ 0x00010b84U,
5032 /*013f*/ 0x08010b84U,
5033 /*0140*/ 0x10010b84U,
5034 /*0141*/ 0x18010b84U,
5035 /*0142*/ 0x00040b85U,
5036 /*0143*/ 0x080b0b85U,
5037 /*0144*/ 0x000b0b86U,
5038 /*0145*/ 0x100b0b86U,
5039 /*0146*/ 0x00040b87U,
5040 /*0147*/ 0x080b0b87U,
5041 /*0148*/ 0x18040b87U,
5042 /*0149*/ 0x00010b88U,
5043 /*014a*/ 0x08010b88U,
5044 /*014b*/ 0x10010b88U,
5045 /*014c*/ 0x00200b89U,
5046 /*014d*/ 0x00200b8aU,
5047 /*014e*/ 0x00080b8bU,
5048 /*014f*/ 0x080a0b8bU,
5049 /*0150*/ 0x18050b8bU,
5050 /*0151*/ 0x000b0b8cU,
5051 /*0152*/ 0x10030b8cU,
5052 /*0153*/ 0x18030b8cU,
5053 /*0154*/ 0x00010b8dU,
5054 /*0155*/ 0x08020b8dU,
5055 /*0156*/ 0x10010b8dU,
5056 /*0157*/ 0x18010b8dU,
5057 /*0158*/ 0x00010b8eU,
5058 /*0159*/ 0xffffffffU,
5059 /*015a*/ 0x08010b8eU,
5060 /*015b*/ 0x18040b8eU,
5061 /*015c*/ 0x00040b8fU,
5062 /*015d*/ 0x08040b8fU,
5063 /*015e*/ 0x10040b8fU,
5064 /*015f*/ 0x18010b8fU,
5065 /*0160*/ 0x00010b90U,
5066 /*0161*/ 0x08010b90U,
5067 /*0162*/ 0x00200b91U,
5068 /*0163*/ 0x00200b92U,
5069 /*0164*/ 0x00200b93U,
5070 /*0165*/ 0x00200b94U,
5071 /*0166*/ 0xffffffffU,
5072 /*0167*/ 0x10010b8eU,
5073 /*0168*/ 0x000d0b96U,
5074 /*0169*/ 0x100d0b96U,
5075 /*016a*/ 0x000d0b97U,
5076 /*016b*/ 0x00050b98U,
5077 /*016c*/ 0x00010b99U,
5078 /*016d*/ 0x080e0b99U,
5079 /*016e*/ 0x000e0b9aU,
5080 /*016f*/ 0x100e0b9aU,
5081 /*0170*/ 0x000e0b9bU,
5082 /*0171*/ 0x100e0b9bU,
5083 /*0172*/ 0x00040b9cU,
5084 /*0173*/ 0x08040b9cU,
5085 /*0174*/ 0x10040b9cU,
5086 /*0175*/ 0x18040b9cU,
5087 /*0176*/ 0x00040b9dU,
5088 /*0177*/ 0x080b0b9dU,
5089 /*0178*/ 0x000b0b9eU,
5090 /*0179*/ 0x100b0b9eU,
5091 /*017a*/ 0x000b0b9fU,
5092 /*017b*/ 0x00040ba0U,
5093 /*017c*/ 0x08040ba0U,
5094 /*017d*/ 0x10040ba0U,
5095 /*017e*/ 0x18040ba0U,
5096 /*017f*/ 0x000d0ba1U,
5097 /*0180*/ 0x100d0ba1U,
5098 /*0181*/ 0x000d0ba2U,
5099 /*0182*/ 0x10100ba2U,
5100 /*0183*/ 0x00080b95U,
5101 /*0184*/ 0x08080b95U,
5102 /*0185*/ 0x00100ba3U,
5103 /*0186*/ 0x10100ba3U,
5104 /*0187*/ 0x00100ba4U,
5105 /*0188*/ 0x10100ba4U,
5106 /*0189*/ 0x00100ba5U,
5107 /*018a*/ 0x10030ba5U,
5108 /*018b*/ 0x18040ba5U,
5109 /*018c*/ 0x00010ba6U,
5110 /*018d*/ 0x08080ba6U,
5111 /*018e*/ 0x10010ba6U,
5112 /*018f*/ 0x000a0ba7U,
5113 /*0190*/ 0x10010ba7U,
5114 /*0191*/ 0x00140ba8U,
5115 /*0192*/ 0x000b0ba9U,
5116 /*0193*/ 0x100c0ba9U,
5117 /*0194*/ 0x00120baaU,
5118 /*0195*/ 0x00140babU,
5119 /*0196*/ 0x00120bacU,
5120 /*0197*/ 0x00110badU,
5121 /*0198*/ 0x00110baeU,
5122 /*0199*/ 0x00120bafU,
5123 /*019a*/ 0x00120bb0U,
5124 /*019b*/ 0x00120bb1U,
5125 /*019c*/ 0x00120bb2U,
5126 /*019d*/ 0x00120bb3U,
5127 /*019e*/ 0x00120bb4U,
5128 /*019f*/ 0x00120bb5U,
5129 /*01a0*/ 0x00120bb6U,
5130 /*01a1*/ 0x00120bb7U,
5131 /*01a2*/ 0x00120bb8U,
5132 /*01a3*/ 0x000e0bb9U,
5133 /*01a4*/ 0x100d0bb9U,
5134 /*01a5*/ 0x00200bbaU,
5135 /*01a6*/ 0x00170bbbU,
5136 /*01a7*/ 0x000d0bbcU,
5137 /*01a8*/ 0x10010bbcU,
5138 /*01a9*/ 0x18010bbcU,
5139 /*01aa*/ 0x00200bbdU,
5140 /*01ab*/ 0x00080bbeU,
5141 /*01ac*/ 0x08030bbeU,
5142 /*01ad*/ 0x10030bbeU,
5143 /*01ae*/ 0x00180bbfU,
5144 /*01af*/ 0x00180bc0U,
5145 /*01b0*/ 0x18070bc0U,
5146 /*01b1*/ 0x00070bc1U,
5147 /*01b2*/ 0x08080bc1U,
5148 /*01b3*/ 0x10080bc1U,
5149 /*01b4*/ 0x18080bc1U,
5150 /*01b5*/ 0x00010bc2U,
5151 /*01b6*/ 0x08010bc2U,
5152 /*01b7*/ 0x00200bc3U,
5153 /*01b8*/ 0x00070bc4U,
5154 /*01b9*/ 0x08140bc4U,
5155 /*01ba*/ 0x00140bc5U,
5156 /*01bb*/ 0x00190bc6U,
5157 /*01bc*/ 0x00170bc7U,
5158 /*01bd*/ 0x00110bc8U,
5159 /*01be*/ 0x00110bc9U,
5160 /*01bf*/ 0x00100bcaU,
5161 /*01c0*/ 0x10010bcaU,
5162 /*01c1*/ 0x18010bcaU,
5163 /*01c2*/ 0x00020bcbU,
5164 /*01c3*/ 0x08040bcbU,
5165 /*01c4*/ 0x10090bcbU,
5166 /*01c5*/ 0x00070bccU,
5167 /*01c6*/ 0x08040bccU,
5168 /*01c7*/ 0x00200bcdU,
5169 /*01c8*/ 0x00010bceU,
5170 /*01c9*/ 0x08020bceU,
5171 /*01ca*/ 0x10060bceU,
5172 /*01cb*/ 0x00100bcfU,
5173 /*01cc*/ 0x10010bcfU,
5174 /*01cd*/ 0x00200bd0U,
5175 /*01ce*/ 0x00080bd1U,
5176 /*01cf*/ 0x08010bd1U,
5177 /*01d0*/ 0x10050bd1U,
5178 /*01d1*/ 0x18030bd1U,
5179 /*01d2*/ 0x00020bd2U,
5180 /*01d3*/ 0xffffffffU,
5181 /*01d4*/ 0x00200bd3U,
5182 /*01d5*/ 0x000b0bd4U,
5183 /*01d6*/ 0xffffffffU,
5184 /*01d7*/ 0x10030bd4U,
5185 /*01d8*/ 0x18080bd4U,
5186 /*01d9*/ 0x00020bd5U,
5187 /*01da*/ 0x080c0bd5U,
5188 /*01db*/ 0x18040bd5U,
5189 /*01dc*/ 0x00010bd6U,
5190 /*01dd*/ 0x08050bd6U,
5191 /*01de*/ 0x00010200U,
5192 /*01df*/ 0x08040200U,
5193 /*01e0*/ 0x10100200U,
5194 /*01e1*/ 0x00010201U,
5195 /*01e2*/ 0x08010201U,
5196 /*01e3*/ 0x10010201U,
5197 /*01e4*/ 0x18010201U,
5198 /*01e5*/ 0x00100202U,
5199 /*01e6*/ 0x10080202U,
5200 /*01e7*/ 0x18010202U,
5201 /*01e8*/ 0x00200203U,
5202 /*01e9*/ 0x00200204U,
5203 /*01ea*/ 0x00200205U,
5204 /*01eb*/ 0x00200206U,
5205 /*01ec*/ 0x00020207U,
5206 /*01ed*/ 0x08010207U,
5207 /*01ee*/ 0x10010207U,
5208 /*01ef*/ 0x00200208U,
5209 /*01f0*/ 0x00140209U,
5210 /*01f1*/ 0x0020020aU,
5211 /*01f2*/ 0x0014020bU,
5212 /*01f3*/ 0x0020020cU,
5213 /*01f4*/ 0x0014020dU,
5214 /*01f5*/ 0x0014020eU,
5215 /*01f6*/ 0x0020020fU,
5216 /*01f7*/ 0x00200210U,
5217 /*01f8*/ 0x00200211U,
5218 /*01f9*/ 0x00200212U,
5219 /*01fa*/ 0x00140213U,
5220 /*01fb*/ 0x00200214U,
5221 /*01fc*/ 0x00200215U,
5222 /*01fd*/ 0x00200216U,
5223 /*01fe*/ 0x00200217U,
5224 /*01ff*/ 0x00140218U,
5225 /*0200*/ 0x00200219U,
5226 /*0201*/ 0x0020021aU,
5227 /*0202*/ 0x0020021bU,
5228 /*0203*/ 0x0020021cU,
5229 /*0204*/ 0x0009021dU,
5230 /*0205*/ 0x1001021dU,
5231 /*0206*/ 0x0020021eU,
5232 /*0207*/ 0x0005021fU,
5233 /*0208*/ 0x0801021fU,
5234 /*0209*/ 0x1008021fU,
5235 /*020a*/ 0x1808021fU,
5236 /*020b*/ 0x001e0220U,
5237 /*020c*/ 0x001e0221U,
5238 /*020d*/ 0x001e0222U,
5239 /*020e*/ 0x001e0223U,
5240 /*020f*/ 0x001e0224U,
5241 /*0210*/ 0x001e0225U,
5242 /*0211*/ 0x001e0226U,
5243 /*0212*/ 0x001e0227U,
5244 /*0213*/ 0x001e0228U,
5245 /*0214*/ 0x001e0229U,
5246 /*0215*/ 0x001e022aU,
5247 /*0216*/ 0x001e022bU,
5248 /*0217*/ 0x001e022cU,
5249 /*0218*/ 0x001e022dU,
5250 /*0219*/ 0x001e022eU,
5251 /*021a*/ 0x001e022fU,
5252 /*021b*/ 0x00010230U,
5253 /*021c*/ 0x08010230U,
5254 /*021d*/ 0x10010230U,
5255 /*021e*/ 0x18040230U,
5256 /*021f*/ 0x00080231U,
5257 /*0220*/ 0x08080231U,
5258 /*0221*/ 0x10080231U,
5259 /*0222*/ 0x18040231U,
5260 /*0223*/ 0x00070232U,
5261 /*0224*/ 0x08060232U,
5262 /*0225*/ 0x10070232U,
5263 /*0226*/ 0x18070232U,
5264 /*0227*/ 0x00060233U,
5265 /*0228*/ 0x08070233U,
5266 /*0229*/ 0x10070233U,
5267 /*022a*/ 0x18060233U,
5268 /*022b*/ 0x00070234U,
5269 /*022c*/ 0x08020234U,
5270 /*022d*/ 0x10010234U,
5271 /*022e*/ 0x18010234U,
5272 /*022f*/ 0x000a0235U,
5273 /*0230*/ 0x00140236U,
5274 /*0231*/ 0x000a0237U,
5275 /*0232*/ 0x00140238U,
5276 /*0233*/ 0x000a0239U,
5277 /*0234*/ 0x0014023aU,
5278 /*0235*/ 0xffffffffU,
5279 /*0236*/ 0xffffffffU,
5280 /*0237*/ 0x0005023bU,
5281 /*0238*/ 0x0001023cU,
5282 /*0239*/ 0x1001023cU,
5283 /*023a*/ 0x1801023cU,
5284 /*023b*/ 0x0001023dU,
5285 /*023c*/ 0x0801023dU,
5286 /*023d*/ 0x1001023dU,
5287 /*023e*/ 0x1801023dU,
5288 /*023f*/ 0x0002023eU,
5289 /*0240*/ 0x0802023eU,
5290 /*0241*/ 0x1002023eU,
5291 /*0242*/ 0x1802023eU,
5292 /*0243*/ 0x0002023fU,
5293 /*0244*/ 0x0803023fU,
5294 /*0245*/ 0x1001023fU,
5295 /*0246*/ 0x1801023fU,
5296 /*0247*/ 0x00010240U,
5297 /*0248*/ 0x08010240U,
5298 /*0249*/ 0x10010240U,
5299 /*024a*/ 0x18020240U,
5300 /*024b*/ 0x00010241U,
5301 /*024c*/ 0x08010241U,
5302 /*024d*/ 0x10010241U,
5303 /*024e*/ 0x18020241U,
5304 /*024f*/ 0x00010242U,
5305 /*0250*/ 0x08010242U,
5306 /*0251*/ 0x10010242U,
5307 /*0252*/ 0x18020242U,
5308 /*0253*/ 0x00010243U,
5309 /*0254*/ 0x08010243U,
5310 /*0255*/ 0x10010243U,
5311 /*0256*/ 0x18020243U,
5312 /*0257*/ 0xffffffffU,
5313 /*0258*/ 0x00010244U,
5314 /*0259*/ 0x08010244U,
5315 /*025a*/ 0x10010244U,
5316 /*025b*/ 0x18010244U,
5317 /*025c*/ 0x00010245U,
5318 /*025d*/ 0x08010245U,
5319 /*025e*/ 0x10010245U,
5320 /*025f*/ 0x18010245U,
5321 /*0260*/ 0x00040246U,
5322 /*0261*/ 0x08040246U,
5323 /*0262*/ 0x10040246U,
5324 /*0263*/ 0x18010246U,
5325 /*0264*/ 0x00020247U,
5326 /*0265*/ 0x08060247U,
5327 /*0266*/ 0x10060247U,
5328 /*0267*/ 0x18020247U,
5329 /*0268*/ 0x00020248U,
5330 /*0269*/ 0x08020248U,
5331 /*026a*/ 0xffffffffU,
5332 /*026b*/ 0x10100248U,
5333 /*026c*/ 0x00010249U,
5334 /*026d*/ 0x08010249U,
5335 /*026e*/ 0x10010249U,
5336 /*026f*/ 0x18040249U,
5337 /*0270*/ 0x0001024aU,
5338 /*0271*/ 0x0804024aU,
5339 /*0272*/ 0x1003024aU,
5340 /*0273*/ 0x1808024aU,
5341 /*0274*/ 0x000a024bU,
5342 /*0275*/ 0x100a024bU,
5343 /*0276*/ 0x000a024cU,
5344 /*0277*/ 0xffffffffU,
5345 /*0278*/ 0x0020024dU,
5346 /*0279*/ 0x0020024eU,
5347 /*027a*/ 0x0005024fU,
5348 /*027b*/ 0x1801023aU,
5349 /*027c*/ 0x0805023cU,
5350 /*027d*/ 0x0808024fU,
5351 /*027e*/ 0x1001024fU,
5352 /*027f*/ 0x1808024fU,
5353 /*0280*/ 0x00010250U,
5354 /*0281*/ 0x08080250U,
5355 /*0282*/ 0x10010250U,
5356 /*0283*/ 0x18040250U,
5357 /*0284*/ 0x00040251U,
5358 /*0285*/ 0x08040251U,
5359 /*0286*/ 0x10040251U,
5360 /*0287*/ 0x18040251U,
5361 /*0288*/ 0x00040252U,
5362 /*0289*/ 0x08040252U,
5363 /*028a*/ 0x10040252U,
5364 /*028b*/ 0x18040252U,
5365 /*028c*/ 0x00040253U,
5366 /*028d*/ 0x08010253U,
5367 /*028e*/ 0x10040253U,
5368 /*028f*/ 0x18040253U,
5369 /*0290*/ 0x00040254U,
5370 /*0291*/ 0x08040254U,
5371 /*0292*/ 0x10040254U,
5372 /*0293*/ 0x18040254U,
5373 /*0294*/ 0x00060255U,
5374 /*0295*/ 0x08060255U,
5375 /*0296*/ 0x10060255U,
5376 /*0297*/ 0x18060255U,
5377 /*0298*/ 0x00060256U,
5378 /*0299*/ 0x08060256U,
5379 /*029a*/ 0x10040256U,
5380 /*029b*/ 0x18010256U,
5381 /*029c*/ 0x00010257U,
5382 /*029d*/ 0x08020257U,
5383 /*029e*/ 0x00200258U,
5384 /*029f*/ 0x00200259U,
5385 /*02a0*/ 0x0020025aU,
5386 /*02a1*/ 0x0020025bU,
5387 /*02a2*/ 0x0020025cU,
5388 /*02a3*/ 0x0020025dU,
5389 /*02a4*/ 0x0020025eU,
5390 /*02a5*/ 0x0020025fU,
5391 /*02a6*/ 0x00040260U,
5392 /*02a7*/ 0x08040260U,
5393 /*02a8*/ 0x10010260U,
5394 /*02a9*/ 0x18010260U,
5395 /*02aa*/ 0x00010261U,
5396 /*02ab*/ 0x08010261U,
5397 /*02ac*/ 0x10010261U,
5398 /*02ad*/ 0x18010261U,
5399 /*02ae*/ 0x00010262U,
5400 /*02af*/ 0x08010262U,
5401 /*02b0*/ 0x10010262U,
5402 /*02b1*/ 0x18040262U,
5403 /*02b2*/ 0x00040263U,
5404 /*02b3*/ 0x080a0263U,
5405 /*02b4*/ 0x00200264U,
5406 /*02b5*/ 0x00040265U,
5407 /*02b6*/ 0x08080265U,
5408 /*02b7*/ 0x10020265U,
5409 /*02b8*/ 0x18020265U,
5410 /*02b9*/ 0x00020266U,
5411 /*02ba*/ 0x08020266U,
5412 /*02bb*/ 0x10020266U,
5413 /*02bc*/ 0x18020266U,
5414 /*02bd*/ 0xffffffffU,
5415 /*02be*/ 0xffffffffU,
5416 /*02bf*/ 0x00200267U,
5417 /*02c0*/ 0x00030268U,
5418 /*02c1*/ 0x08100268U,
5419 /*02c2*/ 0x00100269U,
5420 /*02c3*/ 0x10040269U,
5421 /*02c4*/ 0x18040269U,
5422 /*02c5*/ 0x0005026aU,
5423 /*02c6*/ 0x0805026aU,
5424 /*02c7*/ 0xffffffffU,
5425 /*02c8*/ 0xffffffffU,
5426 /*02c9*/ 0xffffffffU,
5427 /*02ca*/ 0xffffffffU,
5428 /*02cb*/ 0x1001026aU,
5429 /*02cc*/ 0x1801026aU,
5430 /*02cd*/ 0x0008026bU,
5431 /*02ce*/ 0x0808026bU,
5432 /*02cf*/ 0x1008026bU,
5433 /*02d0*/ 0x1808026bU,
5434 /*02d1*/ 0x0008026cU,
5435 /*02d2*/ 0x0808026cU,
5436 /*02d3*/ 0x1008026cU,
5437 /*02d4*/ 0x1808026cU,
5438 /*02d5*/ 0x0008026dU,
5439 /*02d6*/ 0x0808026dU,
5440 /*02d7*/ 0x1008026dU,
5441 /*02d8*/ 0x1808026dU,
5442 /*02d9*/ 0x0008026eU,
5443 /*02da*/ 0x0808026eU,
5444 /*02db*/ 0x1003026eU,
5445 /*02dc*/ 0x1803026eU,
5446 /*02dd*/ 0x0003026fU,
5447 /*02de*/ 0xffffffffU,
5448 /*02df*/ 0x0801026fU,
5449 /*02e0*/ 0x1002026fU,
5450 /*02e1*/ 0x1801026fU,
5451 /*02e2*/ 0x00040270U,
5452 /*02e3*/ 0x08020270U,
5453 /*02e4*/ 0x10010270U,
5454 /*02e5*/ 0x18010270U,
5455 /*02e6*/ 0x00010271U,
5456 /*02e7*/ 0x08010271U,
5457 /*02e8*/ 0x10040271U,
5458 /*02e9*/ 0x18080271U,
5459 /*02ea*/ 0x000a0272U,
5460 /*02eb*/ 0x100a0272U,
5461 /*02ec*/ 0x000a0273U,
5462 /*02ed*/ 0x100a0273U,
5463 /*02ee*/ 0x000a0274U,
5464 /*02ef*/ 0x100a0274U,
5465 /*02f0*/ 0x00200275U,
5466 /*02f1*/ 0x00200276U,
5467 /*02f2*/ 0x00010277U,
5468 /*02f3*/ 0x08020277U,
5469 /*02f4*/ 0x10020277U,
5470 /*02f5*/ 0x18020277U,
5471 /*02f6*/ 0xffffffffU,
5472 /*02f7*/ 0x00020278U,
5473 /*02f8*/ 0x08100278U,
5474 /*02f9*/ 0x18050278U,
5475 /*02fa*/ 0x00060279U,
5476 /*02fb*/ 0x08050279U,
5477 /*02fc*/ 0x10050279U,
5478 /*02fd*/ 0x000e027aU,
5479 /*02fe*/ 0x1005027aU,
5480 /*02ff*/ 0x000e027bU,
5481 /*0300*/ 0x1005027bU,
5482 /*0301*/ 0x000e027cU,
5483 /*0302*/ 0x1005027cU,
5484 /*0303*/ 0x1801027cU,
5485 /*0304*/ 0x0005027dU,
5486 /*0305*/ 0x0805027dU,
5487 /*0306*/ 0x100a027dU,
5488 /*0307*/ 0x000a027eU,
5489 /*0308*/ 0x1005027eU,
5490 /*0309*/ 0x1805027eU,
5491 /*030a*/ 0x000a027fU,
5492 /*030b*/ 0x100a027fU,
5493 /*030c*/ 0x00050280U,
5494 /*030d*/ 0x08050280U,
5495 /*030e*/ 0x100a0280U,
5496 /*030f*/ 0x000a0281U,
5497 /*0310*/ 0x10070281U,
5498 /*0311*/ 0x18070281U,
5499 /*0312*/ 0x00070282U,
5500 /*0313*/ 0x08070282U,
5501 /*0314*/ 0x10070282U,
5502 /*0315*/ 0x18070282U,
5503 /*0316*/ 0xffffffffU,
5504 /*0317*/ 0xffffffffU,
5505 /*0318*/ 0x00040283U,
5506 /*0319*/ 0x08040283U,
5507 /*031a*/ 0x10040283U,
5508 /*031b*/ 0x18040283U,
5509 /*031c*/ 0x00040284U,
5510 /*031d*/ 0xffffffffU,
5511 /*031e*/ 0x08080284U,
5512 /*031f*/ 0x10080284U,
5513 /*0320*/ 0x18040284U,
5514 /*0321*/ 0x00050285U,
5515 /*0322*/ 0x08080285U,
5516 /*0323*/ 0x10050285U,
5517 /*0324*/ 0x18040285U,
5518 /*0325*/ 0x00050286U,
5519 /*0326*/ 0x08080286U,
5520 /*0327*/ 0x10050286U,
5521 /*0328*/ 0x18040286U,
5522 /*0329*/ 0x00050287U,
5523 /*032a*/ 0x08080287U,
5524 /*032b*/ 0x10050287U,
5525 /*032c*/ 0x18040287U,
5526 /*032d*/ 0x00050288U,
5527 /*032e*/ 0x08070288U,
5528 /*032f*/ 0x10080288U,
5529 /*0330*/ 0x00100289U,
5530 /*0331*/ 0x10080289U,
5531 /*0332*/ 0x0010028aU,
5532 /*0333*/ 0x1008028aU,
5533 /*0334*/ 0x0010028bU,
5534 /*0335*/ 0x1008028bU,
5535 /*0336*/ 0x1808028bU,
5536 /*0337*/ 0x0001028cU,
5537 /*0338*/ 0x0801028cU,
5538 /*0339*/ 0x1006028cU,
5539 /*033a*/ 0x1806028cU,
5540 /*033b*/ 0x0006028dU,
5541 /*033c*/ 0x0801028dU,
5542 /*033d*/ 0x1001028dU,
5543 /*033e*/ 0x1803028dU,
5544 /*033f*/ 0x000a028eU,
5545 /*0340*/ 0x100a028eU,
5546 /*0341*/ 0x000a028fU,
5547 /*0342*/ 0xffffffffU,
5548 /*0343*/ 0x100a028fU,
5549 /*0344*/ 0x00040290U,
5550 /*0345*/ 0x08010290U,
5551 /*0346*/ 0x10040290U,
5552 /*0347*/ 0x18070290U,
5553 /*0348*/ 0x00070291U,
5554 /*0349*/ 0x08070291U,
5555 /*034a*/ 0x10070291U,
5556 /*034b*/ 0x18070291U,
5557 /*034c*/ 0x00070292U,
5558 /*034d*/ 0xffffffffU,
5559 /*034e*/ 0xffffffffU,
5560 /*034f*/ 0x08050292U,
5561 /*0350*/ 0x10050292U,
5562 /*0351*/ 0x18040292U,
5563 /*0352*/ 0x00040293U,
5564 /*0353*/ 0x08040293U,
5565 /*0354*/ 0xffffffffU,
5566 /*0355*/ 0x10010293U,
5567 /*0356*/ 0x18010293U,
5568 /*0357*/ 0x00020294U,
5569 /*0358*/ 0x08080294U,
5570 /*0359*/ 0x00200295U,
5571 /*035a*/ 0x00200296U,
5572 /*035b*/ 0x00100297U,
5573 /*035c*/ 0x10020297U,
5574 /*035d*/ 0x18020297U,
5575 /*035e*/ 0x00020298U,
5576 /*035f*/ 0xffffffffU,
5577 /*0360*/ 0x08010298U,
5578 /*0361*/ 0x10010298U,
5579 /*0362*/ 0x18020298U,
5580 /*0363*/ 0x00100299U,
5581 /*0364*/ 0x10100299U,
5582 /*0365*/ 0x0010029aU,
5583 /*0366*/ 0x1008029aU,
5584 /*0367*/ 0x1808029aU,
5585 /*0368*/ 0x0008029bU,
5586 /*0369*/ 0x0808029bU,
5587 /*036a*/ 0x1010029bU,
5588 /*036b*/ 0x0010029cU,
5589 /*036c*/ 0x1010029cU,
5590 /*036d*/ 0x0008029dU,
5591 /*036e*/ 0x0808029dU,
5592 /*036f*/ 0x1008029dU,
5593 /*0370*/ 0x1808029dU,
5594 /*0371*/ 0x0010029eU,
5595 /*0372*/ 0x1010029eU,
5596 /*0373*/ 0x0010029fU,
5597 /*0374*/ 0x1008029fU,
5598 /*0375*/ 0x1808029fU,
5599 /*0376*/ 0x000802a0U,
5600 /*0377*/ 0x080802a0U,
5601 /*0378*/ 0x100802a0U,
5602 /*0379*/ 0x001002a1U,
5603 /*037a*/ 0x101002a1U,
5604 /*037b*/ 0x001002a2U,
5605 /*037c*/ 0x100802a2U,
5606 /*037d*/ 0x180802a2U,
5607 /*037e*/ 0x000802a3U,
5608 /*037f*/ 0x080802a3U,
5609 /*0380*/ 0x101002a3U,
5610 /*0381*/ 0x001002a4U,
5611 /*0382*/ 0x101002a4U,
5612 /*0383*/ 0x000802a5U,
5613 /*0384*/ 0x080802a5U,
5614 /*0385*/ 0x100802a5U,
5615 /*0386*/ 0x180802a5U,
5616 /*0387*/ 0x001002a6U,
5617 /*0388*/ 0x101002a6U,
5618 /*0389*/ 0x001002a7U,
5619 /*038a*/ 0x100802a7U,
5620 /*038b*/ 0x180802a7U,
5621 /*038c*/ 0x000802a8U,
5622 /*038d*/ 0x080802a8U,
5623 /*038e*/ 0x100802a8U,
5624 /*038f*/ 0x001002a9U,
5625 /*0390*/ 0x101002a9U,
5626 /*0391*/ 0x001002aaU,
5627 /*0392*/ 0x100802aaU,
5628 /*0393*/ 0x180802aaU,
5629 /*0394*/ 0x000802abU,
5630 /*0395*/ 0x080802abU,
5631 /*0396*/ 0x101002abU,
5632 /*0397*/ 0x001002acU,
5633 /*0398*/ 0x101002acU,
5634 /*0399*/ 0x000802adU,
5635 /*039a*/ 0x080802adU,
5636 /*039b*/ 0x100802adU,
5637 /*039c*/ 0x180802adU,
5638 /*039d*/ 0x001002aeU,
5639 /*039e*/ 0x101002aeU,
5640 /*039f*/ 0x001002afU,
5641 /*03a0*/ 0x100802afU,
5642 /*03a1*/ 0x180802afU,
5643 /*03a2*/ 0x000802b0U,
5644 /*03a3*/ 0x080802b0U,
5645 /*03a4*/ 0x100802b0U,
5646 /*03a5*/ 0x001002b1U,
5647 /*03a6*/ 0x101002b1U,
5648 /*03a7*/ 0x001002b2U,
5649 /*03a8*/ 0x100802b2U,
5650 /*03a9*/ 0x180802b2U,
5651 /*03aa*/ 0x000802b3U,
5652 /*03ab*/ 0x080802b3U,
5653 /*03ac*/ 0x101002b3U,
5654 /*03ad*/ 0x001002b4U,
5655 /*03ae*/ 0x101002b4U,
5656 /*03af*/ 0x000802b5U,
5657 /*03b0*/ 0x080802b5U,
5658 /*03b1*/ 0x100802b5U,
5659 /*03b2*/ 0x180802b5U,
5660 /*03b3*/ 0x001002b6U,
5661 /*03b4*/ 0x101002b6U,
5662 /*03b5*/ 0x001002b7U,
5663 /*03b6*/ 0x100802b7U,
5664 /*03b7*/ 0x180802b7U,
5665 /*03b8*/ 0x000802b8U,
5666 /*03b9*/ 0x080802b8U,
5667 /*03ba*/ 0x100802b8U,
5668 /*03bb*/ 0x180202b8U,
5669 /*03bc*/ 0x000302b9U,
5670 /*03bd*/ 0x080a02b9U,
5671 /*03be*/ 0x000a02baU,
5672 /*03bf*/ 0x100a02baU,
5673 /*03c0*/ 0x000502bbU,
5674 /*03c1*/ 0x080802bbU,
5675 /*03c2*/ 0x100802bbU,
5676 /*03c3*/ 0x180802bbU,
5677 /*03c4*/ 0x000602bcU,
5678 /*03c5*/ 0x080602bcU,
5679 /*03c6*/ 0x001102bdU,
5680 /*03c7*/ 0x180802bdU,
5681 /*03c8*/ 0x000402beU,
5682 /*03c9*/ 0x080602beU,
5683 /*03ca*/ 0x100802beU,
5684 /*03cb*/ 0x180802beU,
5685 /*03cc*/ 0x000802bfU,
5686 /*03cd*/ 0x080802bfU,
5687 /*03ce*/ 0x100802bfU,
5688 /*03cf*/ 0x180802bfU,
5689 /*03d0*/ 0x000802c0U,
5690 /*03d1*/ 0x080602c0U,
5691 /*03d2*/ 0x100602c0U,
5692 /*03d3*/ 0x001102c1U,
5693 /*03d4*/ 0x180802c1U,
5694 /*03d5*/ 0x000402c2U,
5695 /*03d6*/ 0x080602c2U,
5696 /*03d7*/ 0x100802c2U,
5697 /*03d8*/ 0x180802c2U,
5698 /*03d9*/ 0x000802c3U,
5699 /*03da*/ 0x080802c3U,
5700 /*03db*/ 0x100802c3U,
5701 /*03dc*/ 0x180802c3U,
5702 /*03dd*/ 0x000802c4U,
5703 /*03de*/ 0x080602c4U,
5704 /*03df*/ 0x100602c4U,
5705 /*03e0*/ 0x001102c5U,
5706 /*03e1*/ 0x180802c5U,
5707 /*03e2*/ 0x000402c6U,
5708 /*03e3*/ 0x080602c6U,
5709 /*03e4*/ 0x100802c6U,
5710 /*03e5*/ 0x180802c6U,
5711 /*03e6*/ 0x000802c7U,
5712 /*03e7*/ 0x080802c7U,
5713 /*03e8*/ 0x100402c7U,
5714 /*03e9*/ 0x180402c7U,
5715 /*03ea*/ 0x000402c8U,
5716 /*03eb*/ 0x080402c8U,
5717 /*03ec*/ 0x100402c8U,
5718 /*03ed*/ 0x180402c8U,
5719 /*03ee*/ 0x000402c9U,
5720 /*03ef*/ 0x080402c9U,
5721 /*03f0*/ 0x100402c9U,
5722 /*03f1*/ 0x180402c9U,
5723 /*03f2*/ 0x000402caU,
5724 /*03f3*/ 0x080402caU,
5725 /*03f4*/ 0x100402caU,
5726 /*03f5*/ 0x180402caU,
5727 /*03f6*/ 0x000402cbU,
5728 /*03f7*/ 0x080402cbU,
5729 /*03f8*/ 0x100402cbU,
5730 /*03f9*/ 0x180402cbU,
5731 /*03fa*/ 0x000402ccU,
5732 /*03fb*/ 0x080402ccU,
5733 /*03fc*/ 0x001702cdU,
5734 /*03fd*/ 0x001602ceU,
5735 /*03fe*/ 0x001702cfU,
5736 /*03ff*/ 0x002002d0U,
5737 /*0400*/ 0x002002d1U,
5738 /*0401*/ 0x002002d2U,
5739 /*0402*/ 0x002002d3U,
5740 /*0403*/ 0x002002d4U,
5741 /*0404*/ 0x002002d5U,
5742 /*0405*/ 0x002002d6U,
5743 /*0406*/ 0x002002d7U,
5744 /*0407*/ 0x002002d8U,
5745 /*0408*/ 0x000202d9U,
5746 /*0409*/ 0x080502d9U,
5747 /*040a*/ 0x100502d9U,
5748 /*040b*/ 0x180102d9U,
5749 /*040c*/ 0x000502daU,
5750 /*040d*/ 0x080502daU,
5751 /*040e*/ 0x100502daU,
5752 /*040f*/ 0x180502daU,
5753 /*0410*/ 0x000502dbU,
5754 /*0411*/ 0x080502dbU,
5755 /*0412*/ 0x100502dbU,
5756 /*0413*/ 0x180502dbU,
5757 /*0414*/ 0x000502dcU,
5758 /*0415*/ 0x080502dcU,
5759 /*0416*/ 0x100502dcU,
5760 /*0417*/ 0x180502dcU,
5761 /*0418*/ 0x000502ddU,
5762 /*0419*/ 0x080502ddU,
5763 /*041a*/ 0x100502ddU,
5764 /*041b*/ 0x180502ddU,
5765 /*041c*/ 0x000502deU,
5766 /*041d*/ 0x080502deU,
5767 /*041e*/ 0x100502deU,
5768 /*041f*/ 0x180502deU,
5769 /*0420*/ 0x000502dfU,
5770 /*0421*/ 0x080502dfU,
5771 /*0422*/ 0x100102dfU,
5772 /*0423*/ 0x180202dfU,
5773 /*0424*/ 0x000202e0U,
5774 /*0425*/ 0x080202e0U,
5775 /*0426*/ 0x100202e0U,
5776 /*0427*/ 0x180102e0U,
5777 /*0428*/ 0x000802e1U,
5778 /*0429*/ 0x081502e1U,
5779 /*042a*/ 0x002002e2U,
5780 /*042b*/ 0x001502e3U,
5781 /*042c*/ 0x002002e4U,
5782 /*042d*/ 0x001502e5U,
5783 /*042e*/ 0x002002e6U,
5784 /*042f*/ 0x000702e7U,
5785 /*0430*/ 0x080102e7U,
5786 /*0431*/ 0x100202e7U,
5787 /*0432*/ 0x180602e7U,
5788 /*0433*/ 0x000102e8U,
5789 /*0434*/ 0x080102e8U,
5790 /*0435*/ 0x002002e9U,
5791 /*0436*/ 0x000202eaU,
5792 /*0437*/ 0x002002ebU,
5793 /*0438*/ 0x002002ecU,
5794 /*0439*/ 0x000c02edU,
5795 /*043a*/ 0x100c02edU,
5796 /*043b*/ 0x002002eeU,
5797 /*043c*/ 0x000302efU,
5798 /*043d*/ 0x002002f0U,
5799 /*043e*/ 0x000302f1U,
5800 /*043f*/ 0x002002f2U,
5801 /*0440*/ 0x000302f3U,
5802 /*0441*/ 0x002002f4U,
5803 /*0442*/ 0x000302f5U,
5804 /*0443*/ 0x002002f6U,
5805 /*0444*/ 0x000302f7U,
5806 /*0445*/ 0x002002f8U,
5807 /*0446*/ 0x000302f9U,
5808 /*0447*/ 0x002002faU,
5809 /*0448*/ 0x000302fbU,
5810 /*0449*/ 0x002002fcU,
5811 /*044a*/ 0x000302fdU,
5812 /*044b*/ 0x002002feU,
5813 /*044c*/ 0x000302ffU,
5814 /*044d*/ 0x00200300U,
5815 /*044e*/ 0x00030301U,
5816 /*044f*/ 0x08030301U,
5817 /*0450*/ 0x10020301U,
5818 /*0451*/ 0x18020301U,
5819 /*0452*/ 0x00200302U,
5820 /*0453*/ 0x00200303U,
5821 /*0454*/ 0x00200304U,
5822 /*0455*/ 0x00200305U,
5823 /*0456*/ 0x00040306U,
5824 /*0457*/ 0x001e0307U,
5825 /*0458*/ 0x001e0308U,
5826 /*0459*/ 0x001e0309U,
5827 /*045a*/ 0x001e030aU,
5828 /*045b*/ 0x001e030bU,
5829 /*045c*/ 0x001e030cU,
5830 /*045d*/ 0x001e030dU,
5831 /*045e*/ 0x001e030eU,
5832 /*045f*/ 0x0004030fU,
5833 /*0460*/ 0x0801030fU,
5834 /*0461*/ 0x1010030fU,
5835 /*0462*/ 0x00100310U,
5836 /*0463*/ 0x10100310U,
5837 /*0464*/ 0x00040311U,
5838 /*0465*/ 0x08010311U,
5839 /*0466*/ 0x10080311U,
5840 /*0467*/ 0x18040311U,
5841 /*0468*/ 0x00010312U,
5842 /*0469*/ 0x08080312U,
5843 /*046a*/ 0x10040312U,
5844 /*046b*/ 0x18010312U,
5845 /*046c*/ 0x00080313U,
5846 /*046d*/ 0x08040313U,
5847 /*046e*/ 0x10010313U,
5848 /*046f*/ 0x18080313U,
5849 /*0470*/ 0x00040314U,
5850 /*0471*/ 0x08010314U,
5851 /*0472*/ 0x10080314U,
5852 /*0473*/ 0x18040314U,
5853 /*0474*/ 0x00010315U,
5854 /*0475*/ 0x08080315U,
5855 /*0476*/ 0x10040315U,
5856 /*0477*/ 0x18010315U,
5857 /*0478*/ 0x00080316U,
5858 /*0479*/ 0x08040316U,
5859 /*047a*/ 0x10010316U,
5860 /*047b*/ 0x18080316U,
5861 /*047c*/ 0x00080317U,
5862 /*047d*/ 0x00010318U,
5863 /*047e*/ 0x08050318U,
5864 /*047f*/ 0x10010318U,
5865 /*0480*/ 0x18020318U,
5866 /*0481*/ 0x00010319U,
5867 /*0482*/ 0x08010319U,
5868 /*0483*/ 0x10010319U,
5869 /*0484*/ 0x18010319U,
5870 /*0485*/ 0x0001031aU,
5871 /*0486*/ 0x0801031aU,
5872 /*0487*/ 0x1001031aU,
5873 /*0488*/ 0x1801031aU,
5874 /*0489*/ 0x0001031bU,
5875 /*048a*/ 0x0801031bU,
5876 /*048b*/ 0x1001031bU,
5877 /*048c*/ 0x1801031bU,
5878 /*048d*/ 0x0001031cU,
5879 /*048e*/ 0x0801031cU,
5880 /*048f*/ 0x1001031cU,
5881 /*0490*/ 0x1801031cU,
5882 /*0491*/ 0x0008031dU,
5883 /*0492*/ 0x0808031dU,
5884 /*0493*/ 0x1008031dU,
5885 /*0494*/ 0x1808031dU,
5886 	}
5887 };
5888