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/external/mesa3d/src/freedreno/common/
Dfreedreno_dev_info.c50 info->a6xx.ccu_offset_gmem = 0x7c000; in freedreno_dev_info_init()
51 info->a6xx.ccu_offset_bypass = 0x10000; in freedreno_dev_info_init()
52 info->a6xx.ccu_cntl_gmem_unk2 = true; in freedreno_dev_info_init()
53 info->a6xx.supports_multiview_mask = false; in freedreno_dev_info_init()
54 info->a6xx.magic.RB_UNKNOWN_8E04_blit = 0x00100000; in freedreno_dev_info_init()
55 info->a6xx.magic.PC_UNKNOWN_9805 = 0; in freedreno_dev_info_init()
56 info->a6xx.magic.SP_UNKNOWN_A0F8 = 0; in freedreno_dev_info_init()
59 info->a6xx.ccu_offset_gmem = 0xf8000; in freedreno_dev_info_init()
60 info->a6xx.ccu_offset_bypass = 0x20000; in freedreno_dev_info_init()
61 info->a6xx.ccu_cntl_gmem_unk2 = true; in freedreno_dev_info_init()
[all …]
Dfreedreno_dev_info.h60 } a6xx; member
/external/mesa3d/src/gallium/drivers/freedreno/
DMakefile.sources169 a6xx/fd6_blend.c \
170 a6xx/fd6_blend.h \
171 a6xx/fd6_blitter.c \
172 a6xx/fd6_blitter.h \
173 a6xx/fd6_compute.c \
174 a6xx/fd6_compute.h \
175 a6xx/fd6_const.c \
176 a6xx/fd6_const.h \
177 a6xx/fd6_context.c \
178 a6xx/fd6_context.h \
[all …]
Dmeson.build177 'a6xx/fd6_blend.c',
178 'a6xx/fd6_blend.h',
179 'a6xx/fd6_blitter.c',
180 'a6xx/fd6_blitter.h',
181 'a6xx/fd6_compute.c',
182 'a6xx/fd6_compute.h',
183 'a6xx/fd6_const.c',
184 'a6xx/fd6_const.h',
185 'a6xx/fd6_context.c',
186 'a6xx/fd6_context.h',
[all …]
/external/mesa3d/src/freedreno/
DAndroid.registers.mk52 …a2xx.xml.h a3xx.xml.h a4xx.xml.h a5xx.xml.h a6xx.xml.h a6xx-pack.xml.h adreno_common.xml.h adreno_…
74 $(intermediates)/registers/adreno/a6xx.xml.h: $(LOCAL_PATH)/registers/adreno/a6xx.xml $(MESA_TOP)/s…
79 $(intermediates)/registers/adreno/a6xx-pack.xml.h: $(LOCAL_PATH)/registers/adreno/a6xx.xml $(MESA_T…
/external/mesa3d/src/freedreno/registers/adreno/
Dmeson.build26 'a6xx.xml',
58 'a6xx-pack.xml.h',
59 input: [gen_header_py, 'a6xx.xml'],
60 output: 'a6xx-pack.xml.h',
/external/mesa3d/docs/relnotes/
D20.2.0.rst131 - freedreno/a6xx: incorrect rendering in asphalt 9
145 - freedreno/a6xx: skai/skqp fails
192 - freedreno/a6xx: broken rendering in playcanvas "after the flood"
208 - freedreno/a6xx: gpu hangs in google earth
222 - freedreno: minetest: alpha channel issue on a6xx
271 - freedreno/a6xx: pubg rendering glitches
1020 - ir3: Unconditionally enable MERGEDREGS on a6xx
1139 - freedreno/a6xx: Document dual-src blending enable bits
1174 - freedreno/a6xx: use firstIndex field
1181 - freedreno/a6xx: Force gl_Layer to 0 when necessary
[all …]
D20.3.2.rst64 - freedreno/a6xx: Fix assert which checks the count of shader outputs
84 - freedreno/a6xx: Flush depth at the end of bypass rendering, too.
D19.1.0.rst1290 - freedreno/a6xx: Silence compiler warnings
1760 - freedreno/a6xx: UBWC support
1762 - freedreno/a6xx: Enable UBWC modifier
3415 - freedreno/a6xx: Emit blitter dst with OUT_RELOCW
3416 - freedreno/a6xx: Use tiling for all resources
3417 - freedreno/a6xx: regen headers
3418 - freedreno/a6xx: Drop render condition check in blitter
3420 - freedreno/a6xx: Use the right resource for separate stencil stride
3421 - freedreno/a6xx: Combine emit_blit and fd6_blit
3424 - freedreno/a6xx: Move blit check so as to restore comment
[all …]
D20.0.0.rst701 - a6xx: Add more CP packets
1045 - freedreno/a6xx: Log the tiling mode in resource layout debug.
1065 - freedreno: Move a6xx's setup_slices() to a shareable helper function.
1099 - freedreno: Add some missing a6xx address declarations.
1814 - freedreno/registers: add a6xx texture format for stencil sampler
1995 - freedreno/a6xx: Fix primitive counters again
1996 - freedreno/a6xx: Clear sysmem with CP_BLIT
1998 - freedreno/a6xx: Fix layered texture type enum
2000 - freedreno/a6xx: Add register offset for STG/LDG
2016 - freedreno/a6xx: Build the right draw command for tessellation
[all …]
D19.0.6.rst104 - freedreno/a6xx: fix GPU crash on small render targets
D19.0.0.rst1634 - freedreno/a6xx: Clear z32 and separate stencil with blitter
1635 - freedreno/a6xx: Move restore blits to IB
1636 - freedreno/a6xx: Move resolve blits to an IB
1637 - freedreno/a6xx: Clear gmem buffers at flush time
1646 - freedreno/a6xx: Turn on texture tiling by default
1647 - freedreno/a6xx: Emit blitter dst with OUT_RELOCW
2089 - freedreno/a6xx: fix VSC bug with larger # of tiles
2107 - freedreno/a6xx: disable LRZ for z32
2108 - freedreno/a6xx: set guardband clip
2111 - freedreno/a6xx: MSAA
[all …]
D19.1.1.rst115 - freedreno/a6xx: un-swap X24S8_UINT
D19.3.0.rst1104 - freedreno/a6xx: Fix non-mipmap filtering selection.
1895 - freedreno/regs: update a6xx 2d blit bits
2159 - freedreno/a6xx: Let the GPU track streamout offsets
2160 - freedreno/a6xx: Implement primitive count queries on GPU
2161 - freedreno/a6xx: Track location of gl_Position out as we link it
2162 - freedreno/a6xx: Share shader state constructor and destructor
2163 - freedreno/a6xx: Turn on vectorize_io
2164 - freedreno/a6xx: Write multiple regs for SP_VS_OUT_REG and
2168 - freedreno/a6xx: Factor out const state setup
2172 - freedreno/a6xx: Add generic program stateobj support for HS/DS/GS
[all …]
D20.1.0.rst95 - freedreno/a6xx: texture cache vs realloc_bo()
1142 - freedreno/a6xx: Add UBO size field
1143 - freedreno/a6xx: Add registers for the bindless model
1160 - freedreno/a6xx: Expand various varying-count bitfields
1164 - freedreno/a6xx: Document PrimID passthrough registers
1167 - freedreno/a6xx: Implement PrimID passthrough
1542 - freedreno/a6xx: Disable the core layer-size setup.
1640 - freedreno/a6xx: Fix timestamp queries.
1649 - freedreno/a6xx: Sink the per-level size temps inside the loop.
1650 - freedreno/a6xx: Remove the "aligned_height" temporary.
[all …]
D18.3.4.rst111 - freedreno/a6xx: Emit blitter dst with OUT_RELOCW
D20.0.2.rst129 - freedreno: android: add a6xx-pack.xml.h generation to android build
D20.1.1.rst124 - freedreno/a6xx: use nonbinning VS when GS is used
/external/mesa3d/docs/
Dfeatures.txt132 …GL_ARB_sample_shading DONE (freedreno/a6xx, i965/gen6+, nv50, zink)
276 GL_KHR_blend_equation_advanced DONE (freedreno/a6xx, i965, nvc0, panfrost)
283 …GL_OES_geometry_shader DONE (freedreno/a6xx, i965/hsw+, nvc0, r600,…
284 …GL_OES_gpu_shader5 DONE (freedreno/a6xx, all drivers that suppo…
286 …GL_OES_sample_shading DONE (freedreno/a6xx, i965, nvc0, r600, zink)
287 GL_OES_sample_variables DONE (freedreno/a6xx, i965, nvc0, r600)
290 GL_OES_shader_multisample_interpolation DONE (freedreno/a6xx, i965, nvc0, r600)
291 …GL_OES_tessellation_shader DONE (freedreno/a6xx, all drivers that suppo…
325 GL_EXT_multisampled_render_to_texture DONE (freedreno/a6xx, panfrost)
/external/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_gmem.c585 OUT_RING(ring, screen->info.a6xx.magic.PC_UNKNOWN_9805); in emit_binning_pass()
588 OUT_RING(ring, screen->info.a6xx.magic.SP_UNKNOWN_A0F8); in emit_binning_pass()
637 A6XX_RB_CCU_CNTL(.offset = screen->info.a6xx.ccu_offset_gmem, in emit_binning_pass()
639 .unk2 = screen->info.a6xx.ccu_cntl_gmem_unk2)); in emit_binning_pass()
702 A6XX_RB_CCU_CNTL(.offset = screen->info.a6xx.ccu_offset_gmem, in fd6_emit_tile_init()
704 .unk2 = screen->info.a6xx.ccu_cntl_gmem_unk2)); in fd6_emit_tile_init()
739 OUT_RING(ring, screen->info.a6xx.magic.PC_UNKNOWN_9805); in fd6_emit_tile_init()
742 OUT_RING(ring, screen->info.a6xx.magic.SP_UNKNOWN_A0F8); in fd6_emit_tile_init()
1421 OUT_REG(ring, A6XX_RB_CCU_CNTL(.offset = screen->info.a6xx.ccu_offset_bypass)); in fd6_emit_sysmem_prep()
Dfd6_blitter.c248 OUT_RING(ring, A6XX_RB_CCU_CNTL_OFFSET(screen->info.a6xx.ccu_offset_bypass)); in emit_setup()
424 OUT_RING(ring, ctx->screen->info.a6xx.magic.RB_UNKNOWN_8E04_blit); in emit_blit_buffer()
518 OUT_RING(ring, batch->ctx->screen->info.a6xx.magic.RB_UNKNOWN_8E04_blit); in fd6_clear_ubwc()
689 OUT_RING(ring, ctx->screen->info.a6xx.magic.RB_UNKNOWN_8E04_blit); in emit_blit_texture()
780 OUT_RING(ring, ctx->screen->info.a6xx.magic.RB_UNKNOWN_8E04_blit); in fd6_clear_surface()
Dfd6_draw.c357 OUT_REG(ring, A6XX_RB_CCU_CNTL(.offset = screen->info.a6xx.ccu_offset_bypass)); in fd6_clear_lrz()
445 OUT_RING(ring, screen->info.a6xx.magic.RB_UNKNOWN_8E04_blit); in fd6_clear_lrz()
/external/mesa3d/src/freedreno/vulkan/
Dtu_nir_lower_multiview.c81 if (!dev->physical_device->info.a6xx.supports_multiview_mask) in tu_nir_lower_multiview()
/external/mesa3d/src/freedreno/computerator/
Dmeson.build22 'a6xx.c',
/external/mesa3d/src/freedreno/.gitlab-ci/reference/
Dafuc_test.asm1 ; a6xx microcode

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