| /external/oboe/samples/RhythmGame/third_party/glm/simd/ |
| D | common.h | 104 glm_vec4 const and0 = _mm_and_ps(cmp0, _mm_set1_ps(-1.0f)); in glm_vec4_sign() local
106 glm_vec4 const or0 = _mm_or_ps(and0, and1);; in glm_vec4_sign()
116 glm_vec4 const and0 = _mm_and_ps(sgn0, x); in glm_vec4_round()
117 glm_vec4 const or0 = _mm_or_ps(and0, _mm_set_ps1(8388608.0f)); in glm_vec4_round()
131 glm_vec4 const and0 = _mm_and_ps(cmp0, _mm_set1_ps(1.0f)); in glm_vec4_floor()
132 glm_vec4 const sub0 = glm_vec4_sub(rnd0, and0); in glm_vec4_floor()
148 glm_vec4 const and0 = _mm_and_ps(sgn0, x); in glm_vec4_roundEven() local
149 glm_vec4 const or0 = _mm_or_ps(and0, _mm_set_ps1(8388608.0f)); in glm_vec4_roundEven()
162 glm_vec4 const and0 = _mm_and_ps(cmp0, _mm_set1_ps(1.0f)); in glm_vec4_ceil()
163 glm_vec4 const add0 = glm_vec4_add(rnd0, and0); in glm_vec4_ceil()
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| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | bfi_int.ll | 79 %and0 = and i64 %a, %b
82 %bitselect = or i64 %and0, %and1
117 %and0 = and i64 %x, %z
120 %or1 = or i64 %and0, %and1
130 %and0 = and i64 %a, %b
133 %bitselect = or i64 %and0, %and1
174 %and0 = and i64 %x, %z
177 %or1 = or i64 %and0, %and1
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| D | and.ll | 207 %and0 = and i64 %a, 549756338176
209 store volatile i64 %and0, i64 addrspace(1)* %out
241 %and0 = and i64 %shl.a, 62
243 %add0 = add i64 %and0, %c
291 %and0 = and i64 %a, 1231231234567
293 store volatile i64 %and0, i64 addrspace(1)* %out
311 %and0 = and i64 %a, 63
313 store volatile i64 %and0, i64 addrspace(1)* %out
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| /external/llvm-project/llvm/test/CodeGen/SystemZ/ |
| D | foldmemop-imm-01.ll | 27 %and0 = and i32 %arg, %zxt0
29 ret i32 %and0
52 %and0 = and i64 %arg, %zxt0
54 ret i64 %and0
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| D | signbits.ll | 29 %and0 = and i32 %sext0, 8
30 %icmp1 = icmp eq i32 %and0, 0
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| D | and-03.ll | 128 %and0 = and i64 %ret, %val0
129 %and1 = and i64 %and0, %val1
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| D | and-01.ll | 163 %and0 = and i32 %ret, %val0
164 %and1 = and i32 %and0, %val1
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| /external/oboe/samples/RhythmGame/third_party/glm/detail/ |
| D | func_integer_simd.inl | 40 __m128i const and0 = _mm_and_si128(set0, set1); local
43 __m128i const add0 = _mm_add_epi32(and0, and1);
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| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | optimize-imm.ll | 79 %and0 = and i64 %t1, 129
81 %t2 = add i64 %and0, %xor0
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| D | arm64-ccmp.ll | 396 %and0 = and i1 %c0, %c1
398 %or = or i1 %and0, %and1
442 %and0 = and i1 %or0, %or1
444 %and1 = and i1 %and0, %or2
675 %and0 = and i1 %or, %c1
676 %and1 = and i1 %and0, %c0
696 %and0 = and i1 %c0, %or
697 %and1 = and i1 %and0, %c1
717 %and0 = and i1 %c0, %c1
718 %and1 = and i1 %and0, %or
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | and.ll | 195 %and0 = and i64 %a, 549756338176
197 store volatile i64 %and0, i64 addrspace(1)* %out
229 %and0 = and i64 %shl.a, 62
231 %add0 = add i64 %and0, %c
274 %and0 = and i64 %a, 1231231234567
276 store volatile i64 %and0, i64 addrspace(1)* %out
295 %and0 = and i64 %a, 63
297 store volatile i64 %and0, i64 addrspace(1)* %out
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| /external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| D | andn2.ll | 45 %and0 = and i32 %src0, %not.src2
47 %insert.0 = insertvalue { i32, i32 } undef, i32 %and0, 0
115 %and0 = and i64 %src0, %not.src2
117 %insert.0 = insertvalue { i64, i64 } undef, i64 %and0, 0
238 %and0 = and i16 %src0, %not.src2
240 %insert.0 = insertvalue { i16, i16 } undef, i16 %and0, 0
386 %and0 = and <2 x i16> %src0, %not.src2
389 %cast.0 = bitcast <2 x i16> %and0 to i32
604 %and0 = and <4 x i16> %src0, %not.src2
607 %cast.0 = bitcast <4 x i16> %and0 to i64
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| /external/llvm-project/llvm/test/Transforms/BlockExtractor/ |
| D | extract-blocks-with-groups.ll | 46 %and0 = and i32 %tmp.0, %arg
47 %cmp1 = icmp slt i32 %and0, 0
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| /external/llvm-project/llvm/test/tools/llvm-extract/ |
| D | extract-blocks-with-groups.ll | 82 %and0 = and i32 %tmp.0, %arg
83 %cmp1 = icmp slt i32 %and0, 0
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | and-03.ll | 128 %and0 = and i64 %ret, %val0
129 %and1 = and i64 %and0, %val1
|
| D | and-01.ll | 163 %and0 = and i32 %ret, %val0
164 %and1 = and i32 %and0, %val1
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-ccmp.ll | 395 %and0 = and i1 %c0, %c1
397 %or = or i1 %and0, %and1
441 %and0 = and i1 %or0, %or1
443 %and1 = and i1 %and0, %or2
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| /external/llvm/test/CodeGen/Mips/Fast-ISel/ |
| D | logopm.ll | 29 %and0 = and i1 %conv1, %conv0
30 %conv3 = zext i1 %and0 to i8
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| /external/llvm-project/llvm/test/CodeGen/Mips/Fast-ISel/ |
| D | logopm.ll | 29 %and0 = and i1 %conv1, %conv0
30 %conv3 = zext i1 %and0 to i8
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| /external/llvm-project/llvm/test/Transforms/InstSimplify/ |
| D | AndOrXor.ll | 4 define i8 @and0(i8 %x) {
5 ; CHECK-LABEL: @and0(
|