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/external/llvm-project/llvm/test/MC/AArch64/
Darm64-logical-encoding.s13 ands w0, w0, #1
14 ands x0, x0, #1
15 ands w1, w2, #15
16 ands x1, x2, #15
23 ; CHECK: ands w0, w0, #0x1 ; encoding: [0x00,0x00,0x00,0x72]
24 ; CHECK: ands x0, x0, #0x1 ; encoding: [0x00,0x00,0x40,0xf2]
25 ; CHECK: ands w1, w2, #0xf ; encoding: [0x41,0x0c,0x00,0x72]
26 ; CHECK: ands x1, x2, #0xf ; encoding: [0x41,0x0c,0x40,0xf2]
72 ands w1, w2, w3
73 ands x1, x2, x3
[all …]
Dalias-logicalimm.s19 ands x0, x1, #~2
25 ands w0, w1, #~2
/external/llvm/test/MC/AArch64/
Darm64-logical-encoding.s13 ands w0, w0, #1
14 ands x0, x0, #1
15 ands w1, w2, #15
16 ands x1, x2, #15
23 ; CHECK: ands w0, w0, #0x1 ; encoding: [0x00,0x00,0x00,0x72]
24 ; CHECK: ands x0, x0, #0x1 ; encoding: [0x00,0x00,0x40,0xf2]
25 ; CHECK: ands w1, w2, #0xf ; encoding: [0x41,0x0c,0x00,0x72]
26 ; CHECK: ands x1, x2, #0xf ; encoding: [0x41,0x0c,0x40,0xf2]
72 ands w1, w2, w3
73 ands x1, x2, x3
[all …]
Dalias-logicalimm.s15 ands x0, x1, #~2
20 ands w0, w1, #~2
/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dands-diagnostics.s6 ands p0.h, p0/z, p0.h, p1.h label
11 ands p0.s, p0/z, p0.s, p1.s label
16 ands p0.d, p0/z, p0.d, p1.d label
24 ands p0.b, p0/m, p1.b, p2.b label
Dands.s10 ands p0.b, p0/z, p0.b, p1.b label
16 ands p0.b, p0/z, p0.b, p0.b label
22 ands p15.b, p15/z, p15.b, p15.b label
/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Exynos/
Dshifted-register.s8 ands x6, x7, x8, lsl #2
12 ands x18, x19, x20, lsl #8
51 # EM3-NEXT: 1 1 0.25 ands x6, x7, x8, lsl #2
55 # EM3-NEXT: 1 2 0.50 ands x18, x19, x20, lsl #8
60 # EM4-NEXT: 1 1 0.25 ands x6, x7, x8, lsl #2
64 # EM4-NEXT: 1 1 0.25 ands x18, x19, x20, lsl #8
69 # EM5-NEXT: 1 1 0.25 ands x6, x7, x8, lsl #2
73 # EM5-NEXT: 1 1 0.25 ands x18, x19, x20, lsl #8
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dmve-vecreduce-bit.ll9 ; CHECK-NEXT: ands r0, r1
22 ; CHECK-NEXT: ands r0, r1
24 ; CHECK-NEXT: ands r1, r2
25 ; CHECK-NEXT: ands r0, r1
39 ; CHECK-NEXT: ands r0, r1
41 ; CHECK-NEXT: ands r1, r2
42 ; CHECK-NEXT: ands r0, r1
55 ; CHECK-NEXT: ands r0, r1
57 ; CHECK-NEXT: ands r1, r2
58 ; CHECK-NEXT: ands r0, r1
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-logical.txt23 # CHECK: ands w0, w0, #0x1
24 # CHECK: ands x0, x0, #0x1
25 # CHECK: ands w1, w2, #0xf
26 # CHECK: ands x1, x2, #0xf
82 # CHECK: ands w1, w2, w3
83 # CHECK: ands x1, x2, x3
84 # CHECK: ands w1, w2, w3, lsl #2
85 # CHECK: ands x1, x2, x3, lsl #2
86 # CHECK: ands w1, w2, w3, lsr #2
87 # CHECK: ands x1, x2, x3, lsr #2
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darm64-logical.txt23 # CHECK: ands w0, w0, #0x1
24 # CHECK: ands x0, x0, #0x1
25 # CHECK: ands w1, w2, #0xf
26 # CHECK: ands x1, x2, #0xf
82 # CHECK: ands w1, w2, w3
83 # CHECK: ands x1, x2, x3
84 # CHECK: ands w1, w2, w3, lsl #2
85 # CHECK: ands x1, x2, x3, lsl #2
86 # CHECK: ands w1, w2, w3, lsr #2
87 # CHECK: ands x1, x2, x3, lsr #2
[all …]
/external/capstone/suite/MC/ARM/
Dthumb2-narrow-dp.ll.cs2 0x12,0xea,0x01,0x00 = ands.w r0, r2, r1
3 0x0a,0x40 = ands r2, r1
4 0x0a,0x40 = ands r2, r1
5 0x10,0xea,0x01,0x00 = ands.w r0, r0, r1
6 0x11,0xea,0x03,0x03 = ands.w r3, r1, r3
10 0x11,0xea,0x08,0x08 = ands.w r8, r1, r8
11 0x18,0xea,0x01,0x08 = ands.w r8, r8, r1
12 0x18,0xea,0x00,0x00 = ands.w r0, r8, r0
13 0x11,0xea,0x08,0x01 = ands.w r1, r1, r8
14 0x12,0xea,0x41,0x02 = ands.w r2, r2, r1, lsl #1
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Darm-and-tst-peephole.ll27 ; ARM: ands {{r[0-9]+}}, {{r[0-9]+}}, #3
31 ; THUMB-NEXT: ands r[[R0]], r
34 ; T2: ands {{r[0-9]+}}, {{r[0-9]+}}, #3
92 ; ARM: ands
93 ; THUMB: ands
94 ; T2: ands
95 ; V8: ands
107 ; THUMB: ands
109 ; V8: ands
153 ; THUMB-NEXT: ands r0, r2
Dhoist-and-by-const-from-shl-in-eqcmp-zero.ll36 ; THUMB6-NEXT: ands r1, r0
79 ; THUMB6-NEXT: ands r1, r0
124 ; THUMB6-NEXT: ands r1, r0
173 ; THUMB6-NEXT: ands r1, r0
216 ; THUMB6-NEXT: ands r1, r0
262 ; THUMB6-NEXT: ands r1, r0
306 ; THUMB6-NEXT: ands r1, r0
334 ; THUMB6-NEXT: ands r1, r0
374 ; THUMB6-NEXT: ands r1, r0
388 ; THUMB78-NEXT: ands r0, r1
[all …]
Dhoist-and-by-const-from-lshr-in-eqcmp-zero.ll35 ; THUMB6-NEXT: ands r1, r0
67 ; THUMB6-NEXT: ands r1, r0
100 ; THUMB6-NEXT: ands r1, r0
137 ; THUMB6-NEXT: ands r1, r0
169 ; THUMB6-NEXT: ands r1, r0
203 ; THUMB6-NEXT: ands r1, r0
236 ; THUMB6-NEXT: ands r1, r0
264 ; THUMB6-NEXT: ands r1, r0
304 ; THUMB6-NEXT: ands r1, r0
318 ; THUMB78-NEXT: ands r0, r1
[all …]
/external/llvm/test/CodeGen/ARM/
Darm-and-tst-peephole.ll28 ; ARM: ands {{r[0-9]+}}, {{r[0-9]+}}, #3
32 ; THUMB-NEXT: ands r[[R0]], r
36 ; T2: ands {{r[0-9]+}}, {{r[0-9]+}}, #3
95 ; ARM: ands
96 ; THUMB: ands
97 ; T2: ands
98 ; V8: ands
110 ; THUMB: ands
112 ; V8: ands
/external/libavc/encoder/arm/
Dih264e_evaluate_intra4x4_modes_a9q.s154 ands r10, r8, #01 @VERT sad ??
173 ands r10, r8, #02 @HORZ sad ??
198 ands r10, r8, #04 @DC sad ??
206 ands r10, r5, #1
209 ands r10, r5, #4
212 ands r10, r5, #5
234 ands r10, r8, #504 @/* if modes other than VERT, HORZ and DC are valid ????*/
255 ands r10, r8, #0x08 @DIAG_DL sad ??
284 ands r10, r8, #16 @DIAG_DR sad ??
313 ands r10, r8, #32 @VERT_R sad ??
[all …]
Dih264e_evaluate_intra16x16_modes_a9q.s105 ands r7, r5, #01
109 ands r8, r5, #04
202 ands r7, r0, #01 @ vert mode valid????????????
206 ands r6, r0, #02 @ horz mode valid????????????
215 ands r6, r0, #04 @ dc mode valid????????????
/external/llvm/test/MC/ARM/
Dthumb_rewrites.s59 ands r0, r1, r0
60 @ CHECK: ands r0, r1 @ encoding: [0x08,0x40]
62 ands r0, r0, r1
63 @ CHECK: ands r0, r1 @ encoding: [0x08,0x40]
Darm_instructions.s25 @ CHECK: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
26 ands r1,r2,r3
/external/llvm-project/llvm/test/MC/ARM/
Dthumb_rewrites.s59 ands r0, r1, r0
60 @ CHECK: ands r0, r1 @ encoding: [0x08,0x40]
62 ands r0, r0, r1
63 @ CHECK: ands r0, r1 @ encoding: [0x08,0x40]
Darm_instructions.s25 @ CHECK: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
26 ands r1,r2,r3
/external/arm-optimized-routines/string/aarch64/
Dstrrchr-mte.S67 ands nul_match, synd, 0xcccccccccccccccc
85 ands nul_match, synd, 0xcccccccccccccccc
91 ands chr_match, chr_match, nul_match
118 ands tmp, tmp, nul_match
/external/arm-trusted-firmware/drivers/imx/uart/
Dimx_crash_uart.S42 ands r3, #IMX_UART_CR2_SRST
116 ands r2, #IMX_UART_STAT2_TXDC
/external/llvm-project/compiler-rt/lib/builtins/arm/
Daddsf3.S120 ands r7, r6
126 ands r7, r6 // sticky = aSignificand & 1;
149 ands r1, r2
248 ands r0, r1 // +0 + -0 = +0
/external/llvm-project/libc/AOR_v20.02/string/aarch64/
Dstrchr-mte.S64 ands tmp1, srcin, #15
84 ands tmp1, tmp3, tmp1 /* Mask padding bits. */

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