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Searched refs:b128 (Results 1 – 21 of 21) sorted by relevance

/external/llvm-project/compiler-rt/test/builtins/Unit/
Datomic_test.c144 uint128_t a128, b128; variable
163 b128 = value; in set_b_values()
398 if (__atomic_compare_exchange_16(&a128, &b128, V + m1, m_succ, m_fail)) in test_compare_exchanges()
400 if (a128 != ONES || b128 != ONES) in test_compare_exchanges()
402 if (!__atomic_compare_exchange_16(&a128, &b128, V + m1, m_succ, m_fail)) in test_compare_exchanges()
404 if (a128 != V + m1 || b128 != ONES) in test_compare_exchanges()
441 b128 = __atomic_fetch_add_16(&a128, ONES, model); in test_fetch_op()
442 if (b128 != V + m || a128 != V + m + ONES) in test_fetch_op()
463 b128 = __atomic_fetch_sub_16(&a128, ONES, model); in test_fetch_op()
464 if (b128 != V + m || a128 != V + m - ONES) in test_fetch_op()
[all …]
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Dshuffle-transpose.ll19 define void @test_vXf64(<2 x double> %a128, <2 x double> %b128, <4 x double> %a256, <4 x double> %b…
21 … for instruction: %V128 = shufflevector <2 x double> %a128, <2 x double> %b128, <2 x i32> <i32 0, …
27 … for instruction: %V128 = shufflevector <2 x double> %a128, <2 x double> %b128, <2 x i32> <i32 0, …
33 … for instruction: %V128 = shufflevector <2 x double> %a128, <2 x double> %b128, <2 x i32> <i32 0, …
38 %V128 = shufflevector <2 x double> %a128, <2 x double> %b128, <2 x i32> <i32 0, i32 2>
44 define void @test_vXi64(<2 x i64> %a128, <2 x i64> %b128, <4 x i64> %a256, <4 x i64> %b256, <8 x i6…
46 …t of 1 for instruction: %V128 = shufflevector <2 x i64> %a128, <2 x i64> %b128, <2 x i32> <i32 0, …
52 …t of 1 for instruction: %V128 = shufflevector <2 x i64> %a128, <2 x i64> %b128, <2 x i32> <i32 0, …
58 …t of 1 for instruction: %V128 = shufflevector <2 x i64> %a128, <2 x i64> %b128, <2 x i32> <i32 0, …
63 %V128 = shufflevector <2 x i64> %a128, <2 x i64> %b128, <2 x i32> <i32 0, i32 2>
[all …]
Dfshr.ll22 …, <2 x i64> %a128, <4 x i64> %a256, <8 x i64> %a512, i64 %b64, <2 x i64> %b128, <4 x i64> %b256, <…
25 …uction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
32 …uction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
39 …uction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
46 …uction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
53 …uction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
60 …uction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
67 …uction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
74 …uction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
80 %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
[all …]
Dfshl.ll22 …, <2 x i64> %a128, <4 x i64> %a256, <8 x i64> %a512, i64 %b64, <2 x i64> %b128, <4 x i64> %b256, <…
25 …uction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
32 …uction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
39 …uction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
46 …uction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
53 …uction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
60 …uction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
67 …uction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
74 …uction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
80 %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
[all …]
Dshuffle-broadcast.ll342 …vXf32(<2 x float> %a64, <2 x float> %b64, <4 x float> %a128, <4 x float> %b128, <8 x float> %a256,…
345 … 1 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 4, …
352 … 1 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 4, …
359 … 1 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 4, …
366 … 1 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 4, …
372 %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 4, i32 4, i32 4, i32 4>
Dshuffle-reverse.ll312 …vXf32(<2 x float> %a64, <2 x float> %b64, <4 x float> %a128, <4 x float> %b128, <8 x float> %a256,…
315 … 1 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 7, …
322 … 1 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 7, …
329 … 1 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 7, …
336 … 1 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 7, …
342 %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 7, i32 6, i32 5, i32 4>
Dshuffle-single-src.ll378 define void @identity_vXf32(<4 x float> %a128, <4 x float> %b128, <8 x float> %a256, <8 x float> %b…
380 … 0 for instruction: %V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 0, …
385 …%V128 = shufflevector <4 x float> %a128, <4 x float> %b128, <4 x i32> <i32 0, i32 undef, i32 2, i3…
/external/mesa3d/src/gallium/drivers/nouveau/codegen/lib/
Dgk104.asm97 $p1 suldgb b128 $r0q ca zero u8 g[$r4d] $r2 $p0
99 $p2 suldgb b128 $r0q cg zero u8 g[$r4d] $r2 $p0
100 $p1 suldgb b128 $r0q cv zero u8 g[$r4d] $r2 $p0
104 $p1 suldgb b128 $r0q ca zero u8 g[$r4d] $r2 $p0
106 $p2 suldgb b128 $r0q cg zero u8 g[$r4d] $r2 $p0
107 $p1 suldgb b128 $r0q cv zero u8 g[$r4d] $r2 $p0
790 st b128 wb l[0x00] $r0q
819 st b128 wb g[$r0d+0x40] $r4q
820 st b128 wb g[$r0d+0x50] $r8q
821 st b128 wb g[$r0d+0x60] $r12q
[all …]
/external/llvm-project/llvm/docs/
DAMDGPUInstructionSyntax.rst73 x4 b128 4
79 xyzw b128 4
113 Examples of typeless instructions which operate on b128 data:
/external/llvm-project/llvm/test/CodeGen/X86/
Dwiden_load-3.ll171 %b128 = shufflevector <8 x float> %t256, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
172 store <4 x float> %b128, <4 x float>* %st1, align 1
/external/neon_2_sse/
DNEON_2_SSE.h3527 __m128i a128, b128, res; in vmul_s8() local
3529 b128 = _MM_CVTEPI8_EPI16 (_pM128i(b)); // SSE 4.1 use low 64 bits in vmul_s8()
3530 res = _mm_mullo_epi16 (a128, b128); in vmul_s8()
3556 __m128i mask, a128, b128, res; in vmul_u8() local
3559 b128 = _MM_CVTEPU8_EPI16 (_pM128i(b)); in vmul_u8()
3560 res = _mm_mullo_epi16 (a128, b128); in vmul_u8()
3703 __m128i low, hi, a128,b128; in vmull_s16()
3705 b128 = _pM128i(b); in vmull_s16()
3706 low = _mm_mullo_epi16(a128,b128); in vmull_s16()
3707 hi = _mm_mulhi_epi16(a128,b128); in vmull_s16()
[all …]
/external/elfutils/src/
Dreadelf.c11961 union { TYPES; uint64_t b128[2]; } value; in handle_core_register() member
11993 value.b128[!be], value.b128[be]); in handle_core_register()
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst1099 …b128<amdgpu_synid7_type_dev>`, :ref:`src0<amdgpu_synid7_src64_2>`::ref:`b64<amdgpu_synid…
DAMDGPUAsmGFX8.rst1377 …b128<amdgpu_synid8_type_dev>`, :ref:`src0<amdgpu_synid8_src64_1>`::ref:`b64<amdgpu_synid8…
DAMDGPUAsmGFX9.rst1594 …b128<amdgpu_synid9_type_dev>`, :ref:`src0<amdgpu_synid9_src64_1>`::ref:`b64<amdgpu_synid9…
DAMDGPUAsmGFX10.rst1847 …b128<amdgpu_synid10_type_dev>`, :ref:`src0<amdgpu_synid10_src64_0>`::ref:`b64<amdgpu_syni…
/external/google-breakpad/src/processor/testdata/symbols/overflow/B0E1FC01EF48E39CAF5C881D2DF0C3840/
Doverflow.sym3645 b128 36 2816 15
/external/mesa3d/src/freedreno/.gitlab-ci/reference/
DdEQP-GLES2.functional.texture.specification.basic_teximage2d.rgba16f_2d.log3824 0110b128: 0000: c0032d00 00040000 00008020 00000005 00008001
/external/google-breakpad/src/processor/testdata/symbols/microdump/breakpad_unittests/D6D1FEC9A15DE7F38A236898871A2E770/
Dbreakpad_unittests.sym5031 2b128 4 568 6
18318 4b128 28 81 50
32539 6b128 c 225 26
39375 7b128 4 57 171
53128 9b128 4 232 247
/external/elfutils/tests/
Dtestfile45.expect.bz21testfile45.o: elf64-elf_x86_64 2 3Disassembly of section .text: 4 5 0 ...
/external/OpenCSD/decoder/tests/snapshots-ete/002-ack_test_scr/
Dtest_TARMAC27020 11177 clk cpu0 IT (11141) 0009b128:00001009b128_NS aa1f03e8 O EL0t_n : MOV x8,xzr
30255 12688 clk cpu0 IT (12652) 0009b128:00001009b128_NS aa1f03e8 O EL0t_n : MOV x8,xzr