1Reading src/freedreno/.gitlab-ci/traces/dEQP-GLES2.functional.texture.specification.basic_teximage2d.rgba16f_2d.rd.gz... 2gpu_id: 201 3cmd: deqp-gles2/185: fence=1250 4############################################################ 5cmdstream: 124 dwords 6t0 write RB_BC_CONTROL (0f01) 7 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 80122d000: 0000: 00000f01 1c004046 9t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 10 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 110122d008: 0000: c0012d00 00040293 00000020 12t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 13 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 140122d014: 0000: c0012d00 00040316 00000002 15t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 16 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 170122d020: 0000: c0012d00 00040317 00000002 18t0 write CP_PERFMON_CNTL (0444) 19 CP_PERFMON_CNTL: 0 200122d02c: 0000: 00000444 00000000 21t0 write RBBM_PM_OVERRIDE1 (039c) 22 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 23 RBBM_PM_OVERRIDE2: 0xfff 240122d034: 0000: 0001039c ffffffff 00000fff 25t0 write TP0_CHICKEN (0e1e) 26 TP0_CHICKEN: 0x2 270122d040: 0000: 00000e1e 00000002 28t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 290122d048: 0000: c0003b00 00007fff 30t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 31 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 320122d050: 0000: c0012d00 00040307 00100020 33t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 34 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 350122d05c: 0000: c0012d00 00040308 000e0120 36t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 37 VGT_MAX_VTX_INDX: 0xffffffff 38 VGT_MIN_VTX_INDX: 0 390122d068: 0000: c0022d00 00040100 ffffffff 00000000 40t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 41 VGT_INDX_OFFSET: 0 420122d078: 0000: c0012d00 00040102 00000000 43t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 44 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 450122d084: 0000: c0012d00 00040181 00000004 46t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 47 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 480122d090: 0000: c0012d00 00040182 ffffffff 49t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 50 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 510122d09c: 0000: c0012d00 00040301 00000000 52t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 53 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 540122d0a8: 0000: c0012d00 00040300 00000000 55t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 56 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 570122d0b4: 0000: c0012d00 00040080 00000000 58t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 59 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 600122d0c0: 0000: c0012d00 00040208 00000004 61t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 62 RB_SAMPLE_POS: 0x88888888 630122d0cc: 0000: c0012d00 0004020a 88888888 64t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 65 RB_COLOR_DEST_MASK: 0xffffffff 660122d0d8: 0000: c0012d00 00040326 ffffffff 67t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 68 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 690122d0e4: 0000: c0012d00 0004031b 0003c000 70t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 71 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 72 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 730122d0f0: 0000: c0022d00 00040183 00000000 00000000 74t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 750122d100: 0000: c0004b00 00000000 76t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 770122d108: 0000: c0035200 000005d0 00000000 5f601000 00000001 78t0 write SQ_INST_STORE_MANAGMENT (0d02) 79 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 800122d11c: 0000: 00000d02 00000180 81t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 820122d124: 0000: c0003b00 00000300 83t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 840122d12c: 0000: c0004a00 80000180 85t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 860122d13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 870122d15c: 2.000000 0.750000 0.375000 0.250000 880122d134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 890122d154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 90t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 91 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 920122d16c: 0000: c0012d00 00040104 0000000f 93t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 94 RB_BLEND_RED: 0 95 RB_BLEND_GREEN: 0 96 RB_BLEND_BLUE: 0 97 RB_BLEND_ALPHA: 0xff 980122d178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 99t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 100 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 1010122d190: 0000: c0012d00 00040206 0000043f 102t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 103 RB_SURFACE_INFO: { SURFACE_PITCH = 64 | MSAA_SAMPLES = 0 } 1040122d19c: 0000: c0012d00 00040000 00000040 105t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 106 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x110d000 } 1070122d1a8: 0000: c0012d00 00040001 0110d009 108t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 109 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 110 PA_SC_SCREEN_SCISSOR_BR: { X = 64 | Y = 128 } 1110122d1b4: 0000: c0022d00 0004000e 80000000 00800040 112t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 113 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 1140122d1c4: 0000: c0012d00 00040080 00000000 115t0 write CP_SCRATCH_REG6 (057e) 116 CP_SCRATCH_REG6: 9 117 :0,0,9,0 1180122d1d0: 0000: 0000057e 00000009 119t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 120 ibaddr:0122e000 121 ibsize:000000b6 122t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 123 set shader const 0078 1240122e000: 0000: c0042d00 00010078 0112d003 00100000 0112d003 00100000 125t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 126 PA_SC_AA_MASK: 0xffff 1270122e018: 0000: c0012d00 00040312 0000ffff 128t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 129 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 1300122e024: 0000: c0012d00 00040200 00000000 131t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 132 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 133 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 134 RB_ALPHA_REF: 0 1350122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 136t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 137 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 138 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 1390122e044: 0000: c0022d00 00040204 00000000 00090244 140t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 141 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 142 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 143 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 144 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 1450122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 146t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 147 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 148 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 149 PA_CL_GB_VERT_DISC_ADJ: 1.000000 150 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 151 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 1520122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 153t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 154 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 155 PA_SC_WINDOW_SCISSOR_BR: { X = 64 | Y = 128 } 1560122e088: 0000: c0022d00 00040081 00000000 00800040 157t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 158 PA_CL_VPORT_XSCALE: 32.000000 159 PA_CL_VPORT_XOFFSET: 32.000000 160 PA_CL_VPORT_YSCALE: 64.000000 161 PA_CL_VPORT_YOFFSET: 64.000000 162 PA_CL_VPORT_ZSCALE: 0.000000 163 PA_CL_VPORT_ZOFFSET: 0.000000 1640122e098: 0000: c0062d00 0004010f 42000000 42000000 42800000 42800000 00000000 00000000 165t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 1660122e0c0: 32.000000 64.000000 0.000000 0.000000 32.000000 64.000000 0.000000 0.000000 1670122e0b8: 0000: c0082d00 00000184 42000000 42800000 00000000 00000000 42000000 42800000 168* 169t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 170 vertex shader, start=0000, size=0015 171 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 172 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 173 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 174 0000 0000 c200 ALLOC POSITION SIZE(0x0) 175 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 176 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 177 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 178 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 179 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 180 0000 0000 0000 NOP 1810122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 1820122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 1830122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 184t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 185 fragment shader, start=0000, size=000c 186 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 187 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 188 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 189 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 190 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 191 0000 0000 0000 NOP 1920122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 1930122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 194t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 195 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 1960122e17c: 0000: c0012d00 00040181 00000106 197t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 198 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 1990122e188: 0000: c0012d00 00040180 10030002 200t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2010122e19c: 0.000000 0.000000 0.000000 0.000000 2020122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 203t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 204 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 2050122e1ac: 0000: c0012d00 00040202 00000c20 206t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 207 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 2080122e1b8: 0000: c0012d00 00040201 00000000 209t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 210 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 2110122e1c4: 0000: c0012d00 00040104 0000000f 212t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 213 RB_BLEND_RED: 0 214 RB_BLEND_GREEN: 0 215 RB_BLEND_BLUE: 0 216 RB_BLEND_ALPHA: 0 2170122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 218t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 219 set texture const 0000 220 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 221 filter min/mag: point/point 222 swizzle: xyzw 223 addr=0111d000 (flags=820), size=64x128, pitch=64, format=FMT_1_REVERSE 224 mipaddr=00000000 (flags=200) 2250122e1e8: 0000: c0062d00 00010000 00824800 0111d820 000fe03f 00000d11 00000000 00000200 226t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 227 VGT_INDX_OFFSET: 0 2280122e208: 0000: c0012d00 00040102 00000000 229t0 write TC_CNTL_STATUS (0e00) 230 TC_CNTL_STATUS: { L2_INVALIDATE } 2310122e214: 0000: 00000e00 00000001 232t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 2330122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 234t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 2350122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 236t0 write CP_SCRATCH_REG7 (057f) 237 CP_SCRATCH_REG7: 5 238 :0,0,9,5 2390122e24c: 0000: 0000057f 00000005 240t3 opcode: CP_NOP (10) (2 dwords) 2410122e254: 0000: c0001000 00000000 242t3 opcode: CP_DRAW_INDX (22) (3 dwords) 243 { VIZ_QUERY = 0 } 244 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 245 draw: 0 246 prim_type: DI_PT_TRIFAN (5) 247 source_select: DI_SRC_SEL_AUTO_INDEX (2) 248 num_indices: 1407 249 draw[0] register values 250!+ ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 251!+ 00000fff RBBM_PM_OVERRIDE2: 0xfff 252 + 00000000 CP_PERFMON_CNTL: 0 253!+ 00000009 CP_SCRATCH_REG6: 9 254 :0,0,9,5 255!+ 00000005 CP_SCRATCH_REG7: 5 256 :0,0,9,5 257!+ 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 258!+ 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 259!+ 00000002 TP0_CHICKEN: 0x2 260!+ 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 261!+ 00000040 RB_SURFACE_INFO: { SURFACE_PITCH = 64 | MSAA_SAMPLES = 0 } 262!+ 0110d009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x110d000 } 263!+ 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 264!+ 00800040 PA_SC_SCREEN_SCISSOR_BR: { X = 64 | Y = 128 } 265 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 266 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 267!+ 00800040 PA_SC_WINDOW_SCISSOR_BR: { X = 64 | Y = 128 } 268!+ ffffffff VGT_MAX_VTX_INDX: 0xffffffff 269 + 00000000 VGT_MIN_VTX_INDX: 0 270 + 00000000 VGT_INDX_OFFSET: 0 271!+ 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 272 + 00000000 RB_BLEND_RED: 0 273 + 00000000 RB_BLEND_GREEN: 0 274 + 00000000 RB_BLEND_BLUE: 0 275 + 00000000 RB_BLEND_ALPHA: 0 276 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 277 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 278 + 00000000 RB_ALPHA_REF: 0 279!+ 42000000 PA_CL_VPORT_XSCALE: 32.000000 280!+ 42000000 PA_CL_VPORT_XOFFSET: 32.000000 281!+ 42800000 PA_CL_VPORT_YSCALE: 64.000000 282!+ 42800000 PA_CL_VPORT_YOFFSET: 64.000000 283 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 284 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 285!+ 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 286!+ 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 287!+ ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 288 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 289 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 290 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 291 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 292!+ 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 293 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 294!+ 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 295!+ 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 296!+ 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 297!+ 88888888 RB_SAMPLE_POS: 0x88888888 298 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 299 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 300 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 301 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 302!+ 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 303 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 304 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 305!+ 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 306!+ 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 307!+ 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 308!+ 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 309!+ 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 310!+ 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 311!+ 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 312!+ 0000ffff PA_SC_AA_MASK: 0xffff 313!+ 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 314!+ 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 315!+ 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 316!+ ffffffff RB_COLOR_DEST_MASK: 0xffffffff 3170122e25c: 0000: c0012200 00000000 00040085 318t0 write CP_SCRATCH_REG7 (057f) 319NEEDS WFI: CP_SCRATCH_REG7 (57f) 320 CP_SCRATCH_REG7: 6 321 :0,0,9,6 3220122e268: 0000: 0000057f 00000006 323t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 3240122e270: 0000: c0002600 00000000 325t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 326 { EVENT = CACHE_FLUSH } 327 event CACHE_FLUSH 3280122e278: 0000: c0004600 00000006 329t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 330 { EVENT = CACHE_FLUSH } 331 event CACHE_FLUSH 3320122e280: 0000: c0004600 00000006 333t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 334 { EVENT = CACHE_FLUSH } 335 event CACHE_FLUSH 3360122e288: 0000: c0004600 00000006 337t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 338 { EVENT = CACHE_FLUSH } 339 event CACHE_FLUSH 3400122e290: 0000: c0004600 00000006 341t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 342 { EVENT = CACHE_FLUSH } 343 event CACHE_FLUSH 3440122e298: 0000: c0004600 00000006 345t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 346 { EVENT = CACHE_FLUSH } 347 event CACHE_FLUSH 3480122e2a0: 0000: c0004600 00000006 349t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 350 { EVENT = CACHE_FLUSH } 351 event CACHE_FLUSH 3520122e2a8: 0000: c0004600 00000006 353t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 354 { EVENT = CACHE_FLUSH } 355 event CACHE_FLUSH 3560122e2b0: 0000: c0004600 00000006 357t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 358 { EVENT = CACHE_FLUSH } 359 event CACHE_FLUSH 3600122e2b8: 0000: c0004600 00000006 361t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 362 { EVENT = CACHE_FLUSH } 363 event CACHE_FLUSH 3640122e2c0: 0000: c0004600 00000006 365t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 366 { EVENT = CACHE_FLUSH } 367 event CACHE_FLUSH 3680122e2c8: 0000: c0004600 00000006 369t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 370 { EVENT = CACHE_FLUSH } 371 event CACHE_FLUSH 3720122e2d0: 0000: c0004600 00000006 3730122d1d8: 0000: c0013700 0122e000 000000b6 374t2 nop 375############################################################ 376vertices: 0 377cmd: deqp-gles2/185: fence=1251 378############################################################ 379cmdstream: 124 dwords 380t0 write RB_BC_CONTROL (0f01) 381 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 3820122f000: 0000: 00000f01 1c004046 383t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 384 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 3850122f008: 0000: c0012d00 00040293 00000020 386t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 387 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 3880122f014: 0000: c0012d00 00040316 00000002 389t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 390 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 3910122f020: 0000: c0012d00 00040317 00000002 392t0 write CP_PERFMON_CNTL (0444) 393 CP_PERFMON_CNTL: 0 3940122f02c: 0000: 00000444 00000000 395t0 write RBBM_PM_OVERRIDE1 (039c) 396 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 397 RBBM_PM_OVERRIDE2: 0xfff 3980122f034: 0000: 0001039c ffffffff 00000fff 399t0 write TP0_CHICKEN (0e1e) 400 TP0_CHICKEN: 0x2 4010122f040: 0000: 00000e1e 00000002 402t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 4030122f048: 0000: c0003b00 00007fff 404t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 405 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 4060122f050: 0000: c0012d00 00040307 00100020 407t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 408 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 4090122f05c: 0000: c0012d00 00040308 000e0120 410t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 411 VGT_MAX_VTX_INDX: 0xffffffff 412 VGT_MIN_VTX_INDX: 0 4130122f068: 0000: c0022d00 00040100 ffffffff 00000000 414t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 415 VGT_INDX_OFFSET: 0 4160122f078: 0000: c0012d00 00040102 00000000 417t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 418 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 4190122f084: 0000: c0012d00 00040181 00000004 420t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 421 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 4220122f090: 0000: c0012d00 00040182 ffffffff 423t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 424 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 4250122f09c: 0000: c0012d00 00040301 00000000 426t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 427 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 4280122f0a8: 0000: c0012d00 00040300 00000000 429t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 430 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 4310122f0b4: 0000: c0012d00 00040080 00000000 432t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 433 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 4340122f0c0: 0000: c0012d00 00040208 00000004 435t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 436 RB_SAMPLE_POS: 0x88888888 4370122f0cc: 0000: c0012d00 0004020a 88888888 438t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 439 RB_COLOR_DEST_MASK: 0xffffffff 4400122f0d8: 0000: c0012d00 00040326 ffffffff 441t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 442 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 4430122f0e4: 0000: c0012d00 0004031b 0003c000 444t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 445 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 446 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 4470122f0f0: 0000: c0022d00 00040183 00000000 00000000 448t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 4490122f100: 0000: c0004b00 00000000 450t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 4510122f108: 0000: c0035200 000005d0 00000000 5f601000 00000001 452t0 write SQ_INST_STORE_MANAGMENT (0d02) 453 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 4540122f11c: 0000: 00000d02 00000180 455t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 4560122f124: 0000: c0003b00 00000300 457t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 4580122f12c: 0000: c0004a00 80000180 459t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 4600122f13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 4610122f15c: 2.000000 0.750000 0.375000 0.250000 4620122f134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 4630122f154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 464t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 465 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 4660122f16c: 0000: c0012d00 00040104 0000000f 467t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 468 RB_BLEND_RED: 0 469 RB_BLEND_GREEN: 0 470 RB_BLEND_BLUE: 0 471 RB_BLEND_ALPHA: 0xff 4720122f178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 473t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 474 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 4750122f190: 0000: c0012d00 00040206 0000043f 476t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 477 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 4780122f19c: 0000: c0012d00 00040000 00000020 479t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 480 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1240000 } 4810122f1a8: 0000: c0012d00 00040001 01240009 482t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 483 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 484 PA_SC_SCREEN_SCISSOR_BR: { X = 32 | Y = 64 } 4850122f1b4: 0000: c0022d00 0004000e 80000000 00400020 486t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 487 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 4880122f1c4: 0000: c0012d00 00040080 00000000 489t0 write CP_SCRATCH_REG6 (057e) 490 CP_SCRATCH_REG6: 15 491 :0,0,15,6 4920122f1d0: 0000: 0000057e 0000000f 493t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 494 ibaddr:0122e000 495 ibsize:000000b6 496t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 497 set shader const 0078 4980122e000: 0000: c0042d00 00010078 0112d083 00100000 0112d083 00100000 499t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 500 PA_SC_AA_MASK: 0xffff 5010122e018: 0000: c0012d00 00040312 0000ffff 502t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 503 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 5040122e024: 0000: c0012d00 00040200 00000000 505t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 506 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 507 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 508 RB_ALPHA_REF: 0 5090122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 510t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 511 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 512 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 5130122e044: 0000: c0022d00 00040204 00000000 00090244 514t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 515 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 516 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 517 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 518 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 5190122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 520t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 521 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 522 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 523 PA_CL_GB_VERT_DISC_ADJ: 1.000000 524 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 525 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 5260122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 527t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 528 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 529 PA_SC_WINDOW_SCISSOR_BR: { X = 32 | Y = 64 } 5300122e088: 0000: c0022d00 00040081 00000000 00400020 531t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 532 PA_CL_VPORT_XSCALE: 16.000000 533 PA_CL_VPORT_XOFFSET: 16.000000 534 PA_CL_VPORT_YSCALE: 32.000000 535 PA_CL_VPORT_YOFFSET: 32.000000 536 PA_CL_VPORT_ZSCALE: 0.000000 537 PA_CL_VPORT_ZOFFSET: 0.000000 5380122e098: 0000: c0062d00 0004010f 41800000 41800000 42000000 42000000 00000000 00000000 539t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 5400122e0c0: 16.000000 32.000000 0.000000 0.000000 16.000000 32.000000 0.000000 0.000000 5410122e0b8: 0000: c0082d00 00000184 41800000 42000000 00000000 00000000 41800000 42000000 542* 543t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 544 vertex shader, start=0000, size=0015 545 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 546 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 547 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 548 0000 0000 c200 ALLOC POSITION SIZE(0x0) 549 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 550 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 551 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 552 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 553 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 554 0000 0000 0000 NOP 5550122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 5560122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 5570122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 558t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 559 fragment shader, start=0000, size=000c 560 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 561 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 562 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 563 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 564 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 565 0000 0000 0000 NOP 5660122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 5670122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 568t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 569 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 5700122e17c: 0000: c0012d00 00040181 00000106 571t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 572 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 5730122e188: 0000: c0012d00 00040180 10030002 574t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5750122e19c: 0.000000 0.000000 0.000000 0.000000 5760122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 577t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 578 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 5790122e1ac: 0000: c0012d00 00040202 00000c20 580t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 581 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 5820122e1b8: 0000: c0012d00 00040201 00000000 583t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 584 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 5850122e1c4: 0000: c0012d00 00040104 0000000f 586t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 587 RB_BLEND_RED: 0 588 RB_BLEND_GREEN: 0 589 RB_BLEND_BLUE: 0 590 RB_BLEND_ALPHA: 0 5910122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 592t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 593 set texture const 0000 594 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 595 filter min/mag: point/point 596 swizzle: xyzw 597 addr=01250000 (flags=820), size=32x64, pitch=32, format=FMT_1_REVERSE 598 mipaddr=00000000 (flags=200) 5990122e1e8: 0000: c0062d00 00010000 00424800 01250820 0007e01f 00000d11 00000000 00000200 600t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 601 VGT_INDX_OFFSET: 0 6020122e208: 0000: c0012d00 00040102 00000000 603t0 write TC_CNTL_STATUS (0e00) 604 TC_CNTL_STATUS: { L2_INVALIDATE } 6050122e214: 0000: 00000e00 00000001 606t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 6070122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 608t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 6090122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 610t0 write CP_SCRATCH_REG7 (057f) 611 CP_SCRATCH_REG7: 11 612 :0,0,15,11 6130122e24c: 0000: 0000057f 0000000b 614t3 opcode: CP_NOP (10) (2 dwords) 6150122e254: 0000: c0001000 00000000 616t3 opcode: CP_DRAW_INDX (22) (3 dwords) 617 { VIZ_QUERY = 0 } 618 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 619 draw: 0 620 prim_type: DI_PT_TRIFAN (5) 621 source_select: DI_SRC_SEL_AUTO_INDEX (2) 622 num_indices: 1407 623 draw[1] register values 624 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 625 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 626 + 00000000 CP_PERFMON_CNTL: 0 627!+ 0000000f CP_SCRATCH_REG6: 15 628 :0,0,15,11 629!+ 0000000b CP_SCRATCH_REG7: 11 630 :0,0,15,11 631 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 632 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 633 + 00000002 TP0_CHICKEN: 0x2 634 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 635!+ 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 636!+ 01240009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1240000 } 637 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 638!+ 00400020 PA_SC_SCREEN_SCISSOR_BR: { X = 32 | Y = 64 } 639 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 640 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 641!+ 00400020 PA_SC_WINDOW_SCISSOR_BR: { X = 32 | Y = 64 } 642 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 643 + 00000000 VGT_MIN_VTX_INDX: 0 644 + 00000000 VGT_INDX_OFFSET: 0 645 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 646 + 00000000 RB_BLEND_RED: 0 647 + 00000000 RB_BLEND_GREEN: 0 648 + 00000000 RB_BLEND_BLUE: 0 649 + 00000000 RB_BLEND_ALPHA: 0 650 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 651 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 652 + 00000000 RB_ALPHA_REF: 0 653!+ 41800000 PA_CL_VPORT_XSCALE: 16.000000 654!+ 41800000 PA_CL_VPORT_XOFFSET: 16.000000 655!+ 42000000 PA_CL_VPORT_YSCALE: 32.000000 656!+ 42000000 PA_CL_VPORT_YOFFSET: 32.000000 657 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 658 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 659 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 660 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 661 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 662 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 663 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 664 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 665 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 666 + 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 667 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 668 + 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 669 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 670 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 671 + 88888888 RB_SAMPLE_POS: 0x88888888 672 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 673 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 674 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 675 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 676 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 677 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 678 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 679 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 680 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 681 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 682 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 683 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 684 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 685 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 686 + 0000ffff PA_SC_AA_MASK: 0xffff 687 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 688 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 689 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 690 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 6910122e25c: 0000: c0012200 00000000 00040085 692t0 write CP_SCRATCH_REG7 (057f) 693NEEDS WFI: CP_SCRATCH_REG7 (57f) 694 CP_SCRATCH_REG7: 12 695 :0,0,15,12 6960122e268: 0000: 0000057f 0000000c 697t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 6980122e270: 0000: c0002600 00000000 699t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 700 { EVENT = CACHE_FLUSH } 701 event CACHE_FLUSH 7020122e278: 0000: c0004600 00000006 703t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 704 { EVENT = CACHE_FLUSH } 705 event CACHE_FLUSH 7060122e280: 0000: c0004600 00000006 707t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 708 { EVENT = CACHE_FLUSH } 709 event CACHE_FLUSH 7100122e288: 0000: c0004600 00000006 711t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 712 { EVENT = CACHE_FLUSH } 713 event CACHE_FLUSH 7140122e290: 0000: c0004600 00000006 715t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 716 { EVENT = CACHE_FLUSH } 717 event CACHE_FLUSH 7180122e298: 0000: c0004600 00000006 719t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 720 { EVENT = CACHE_FLUSH } 721 event CACHE_FLUSH 7220122e2a0: 0000: c0004600 00000006 723t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 724 { EVENT = CACHE_FLUSH } 725 event CACHE_FLUSH 7260122e2a8: 0000: c0004600 00000006 727t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 728 { EVENT = CACHE_FLUSH } 729 event CACHE_FLUSH 7300122e2b0: 0000: c0004600 00000006 731t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 732 { EVENT = CACHE_FLUSH } 733 event CACHE_FLUSH 7340122e2b8: 0000: c0004600 00000006 735t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 736 { EVENT = CACHE_FLUSH } 737 event CACHE_FLUSH 7380122e2c0: 0000: c0004600 00000006 739t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 740 { EVENT = CACHE_FLUSH } 741 event CACHE_FLUSH 7420122e2c8: 0000: c0004600 00000006 743t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 744 { EVENT = CACHE_FLUSH } 745 event CACHE_FLUSH 7460122e2d0: 0000: c0004600 00000006 7470122f1d8: 0000: c0013700 0122e000 000000b6 748t2 nop 749############################################################ 750vertices: 0 751cmd: deqp-gles2/185: fence=1252 752############################################################ 753cmdstream: 124 dwords 754t0 write RB_BC_CONTROL (0f01) 755 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 7560122d000: 0000: 00000f01 1c004046 757t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 758 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 7590122d008: 0000: c0012d00 00040293 00000020 760t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 761 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 7620122d014: 0000: c0012d00 00040316 00000002 763t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 764 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 7650122d020: 0000: c0012d00 00040317 00000002 766t0 write CP_PERFMON_CNTL (0444) 767 CP_PERFMON_CNTL: 0 7680122d02c: 0000: 00000444 00000000 769t0 write RBBM_PM_OVERRIDE1 (039c) 770 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 771 RBBM_PM_OVERRIDE2: 0xfff 7720122d034: 0000: 0001039c ffffffff 00000fff 773t0 write TP0_CHICKEN (0e1e) 774 TP0_CHICKEN: 0x2 7750122d040: 0000: 00000e1e 00000002 776t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 7770122d048: 0000: c0003b00 00007fff 778t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 779 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 7800122d050: 0000: c0012d00 00040307 00100020 781t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 782 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 7830122d05c: 0000: c0012d00 00040308 000e0120 784t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 785 VGT_MAX_VTX_INDX: 0xffffffff 786 VGT_MIN_VTX_INDX: 0 7870122d068: 0000: c0022d00 00040100 ffffffff 00000000 788t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 789 VGT_INDX_OFFSET: 0 7900122d078: 0000: c0012d00 00040102 00000000 791t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 792 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 7930122d084: 0000: c0012d00 00040181 00000004 794t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 795 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 7960122d090: 0000: c0012d00 00040182 ffffffff 797t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 798 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 7990122d09c: 0000: c0012d00 00040301 00000000 800t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 801 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 8020122d0a8: 0000: c0012d00 00040300 00000000 803t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 804 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 8050122d0b4: 0000: c0012d00 00040080 00000000 806t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 807 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 8080122d0c0: 0000: c0012d00 00040208 00000004 809t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 810 RB_SAMPLE_POS: 0x88888888 8110122d0cc: 0000: c0012d00 0004020a 88888888 812t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 813 RB_COLOR_DEST_MASK: 0xffffffff 8140122d0d8: 0000: c0012d00 00040326 ffffffff 815t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 816 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 8170122d0e4: 0000: c0012d00 0004031b 0003c000 818t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 819 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 820 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 8210122d0f0: 0000: c0022d00 00040183 00000000 00000000 822t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 8230122d100: 0000: c0004b00 00000000 824t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 8250122d108: 0000: c0035200 000005d0 00000000 5f601000 00000001 826t0 write SQ_INST_STORE_MANAGMENT (0d02) 827 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 8280122d11c: 0000: 00000d02 00000180 829t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 8300122d124: 0000: c0003b00 00000300 831t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 8320122d12c: 0000: c0004a00 80000180 833t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 8340122d13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 8350122d15c: 2.000000 0.750000 0.375000 0.250000 8360122d134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 8370122d154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 838t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 839 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 8400122d16c: 0000: c0012d00 00040104 0000000f 841t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 842 RB_BLEND_RED: 0 843 RB_BLEND_GREEN: 0 844 RB_BLEND_BLUE: 0 845 RB_BLEND_ALPHA: 0xff 8460122d178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 847t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 848 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 8490122d190: 0000: c0012d00 00040206 0000043f 850t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 851 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 8520122d19c: 0000: c0012d00 00040000 00000020 853t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 854 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1244000 } 8550122d1a8: 0000: c0012d00 00040001 01244009 856t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 857 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 858 PA_SC_SCREEN_SCISSOR_BR: { X = 16 | Y = 32 } 8590122d1b4: 0000: c0022d00 0004000e 80000000 00200010 860t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 861 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 8620122d1c4: 0000: c0012d00 00040080 00000000 863t0 write CP_SCRATCH_REG6 (057e) 864 CP_SCRATCH_REG6: 21 865 :0,0,21,12 8660122d1d0: 0000: 0000057e 00000015 867t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 868 ibaddr:0122e000 869 ibsize:000000b6 870t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 871 set shader const 0078 8720122e000: 0000: c0042d00 00010078 0112d103 00100000 0112d103 00100000 873t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 874 PA_SC_AA_MASK: 0xffff 8750122e018: 0000: c0012d00 00040312 0000ffff 876t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 877 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 8780122e024: 0000: c0012d00 00040200 00000000 879t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 880 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 881 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 882 RB_ALPHA_REF: 0 8830122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 884t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 885 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 886 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 8870122e044: 0000: c0022d00 00040204 00000000 00090244 888t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 889 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 890 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 891 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 892 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 8930122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 894t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 895 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 896 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 897 PA_CL_GB_VERT_DISC_ADJ: 1.000000 898 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 899 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 9000122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 901t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 902 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 903 PA_SC_WINDOW_SCISSOR_BR: { X = 16 | Y = 32 } 9040122e088: 0000: c0022d00 00040081 00000000 00200010 905t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 906 PA_CL_VPORT_XSCALE: 8.000000 907 PA_CL_VPORT_XOFFSET: 8.000000 908 PA_CL_VPORT_YSCALE: 16.000000 909 PA_CL_VPORT_YOFFSET: 16.000000 910 PA_CL_VPORT_ZSCALE: 0.000000 911 PA_CL_VPORT_ZOFFSET: 0.000000 9120122e098: 0000: c0062d00 0004010f 41000000 41000000 41800000 41800000 00000000 00000000 913t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 9140122e0c0: 8.000000 16.000000 0.000000 0.000000 8.000000 16.000000 0.000000 0.000000 9150122e0b8: 0000: c0082d00 00000184 41000000 41800000 00000000 00000000 41000000 41800000 916* 917t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 918 vertex shader, start=0000, size=0015 919 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 920 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 921 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 922 0000 0000 c200 ALLOC POSITION SIZE(0x0) 923 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 924 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 925 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 926 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 927 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 928 0000 0000 0000 NOP 9290122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 9300122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 9310122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 932t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 933 fragment shader, start=0000, size=000c 934 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 935 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 936 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 937 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 938 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 939 0000 0000 0000 NOP 9400122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 9410122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 942t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 943 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 9440122e17c: 0000: c0012d00 00040181 00000106 945t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 946 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 9470122e188: 0000: c0012d00 00040180 10030002 948t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 9490122e19c: 0.000000 0.000000 0.000000 0.000000 9500122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 951t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 952 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 9530122e1ac: 0000: c0012d00 00040202 00000c20 954t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 955 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 9560122e1b8: 0000: c0012d00 00040201 00000000 957t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 958 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 9590122e1c4: 0000: c0012d00 00040104 0000000f 960t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 961 RB_BLEND_RED: 0 962 RB_BLEND_GREEN: 0 963 RB_BLEND_BLUE: 0 964 RB_BLEND_ALPHA: 0 9650122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 966t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 967 set texture const 0000 968 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 969 filter min/mag: point/point 970 swizzle: xyzw 971 addr=01254000 (flags=820), size=16x32, pitch=32, format=FMT_1_REVERSE 972 mipaddr=00000000 (flags=200) 9730122e1e8: 0000: c0062d00 00010000 00424800 01254820 0003e00f 00000d11 00000000 00000200 974t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 975 VGT_INDX_OFFSET: 0 9760122e208: 0000: c0012d00 00040102 00000000 977t0 write TC_CNTL_STATUS (0e00) 978 TC_CNTL_STATUS: { L2_INVALIDATE } 9790122e214: 0000: 00000e00 00000001 980t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 9810122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 982t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 9830122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 984t0 write CP_SCRATCH_REG7 (057f) 985 CP_SCRATCH_REG7: 17 986 :0,0,21,17 9870122e24c: 0000: 0000057f 00000011 988t3 opcode: CP_NOP (10) (2 dwords) 9890122e254: 0000: c0001000 00000000 990t3 opcode: CP_DRAW_INDX (22) (3 dwords) 991 { VIZ_QUERY = 0 } 992 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 993 draw: 0 994 prim_type: DI_PT_TRIFAN (5) 995 source_select: DI_SRC_SEL_AUTO_INDEX (2) 996 num_indices: 1407 997 draw[2] register values 998 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 999 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 1000 + 00000000 CP_PERFMON_CNTL: 0 1001!+ 00000015 CP_SCRATCH_REG6: 21 1002 :0,0,21,17 1003!+ 00000011 CP_SCRATCH_REG7: 17 1004 :0,0,21,17 1005 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 1006 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 1007 + 00000002 TP0_CHICKEN: 0x2 1008 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 1009 + 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 1010!+ 01244009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1244000 } 1011 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 1012!+ 00200010 PA_SC_SCREEN_SCISSOR_BR: { X = 16 | Y = 32 } 1013 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 1014 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 1015!+ 00200010 PA_SC_WINDOW_SCISSOR_BR: { X = 16 | Y = 32 } 1016 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 1017 + 00000000 VGT_MIN_VTX_INDX: 0 1018 + 00000000 VGT_INDX_OFFSET: 0 1019 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 1020 + 00000000 RB_BLEND_RED: 0 1021 + 00000000 RB_BLEND_GREEN: 0 1022 + 00000000 RB_BLEND_BLUE: 0 1023 + 00000000 RB_BLEND_ALPHA: 0 1024 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1025 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1026 + 00000000 RB_ALPHA_REF: 0 1027!+ 41000000 PA_CL_VPORT_XSCALE: 8.000000 1028!+ 41000000 PA_CL_VPORT_XOFFSET: 8.000000 1029!+ 41800000 PA_CL_VPORT_YSCALE: 16.000000 1030!+ 41800000 PA_CL_VPORT_YOFFSET: 16.000000 1031 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 1032 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 1033 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 1034 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 1035 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 1036 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 1037 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 1038 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 1039 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 1040 + 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 1041 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 1042 + 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 1043 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 1044 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 1045 + 88888888 RB_SAMPLE_POS: 0x88888888 1046 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 1047 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 1048 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 1049 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 1050 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 1051 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 1052 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 1053 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 1054 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 1055 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 1056 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 1057 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 1058 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 1059 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 1060 + 0000ffff PA_SC_AA_MASK: 0xffff 1061 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 1062 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 1063 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 1064 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 10650122e25c: 0000: c0012200 00000000 00040085 1066t0 write CP_SCRATCH_REG7 (057f) 1067NEEDS WFI: CP_SCRATCH_REG7 (57f) 1068 CP_SCRATCH_REG7: 18 1069 :0,0,21,18 10700122e268: 0000: 0000057f 00000012 1071t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 10720122e270: 0000: c0002600 00000000 1073t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1074 { EVENT = CACHE_FLUSH } 1075 event CACHE_FLUSH 10760122e278: 0000: c0004600 00000006 1077t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1078 { EVENT = CACHE_FLUSH } 1079 event CACHE_FLUSH 10800122e280: 0000: c0004600 00000006 1081t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1082 { EVENT = CACHE_FLUSH } 1083 event CACHE_FLUSH 10840122e288: 0000: c0004600 00000006 1085t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1086 { EVENT = CACHE_FLUSH } 1087 event CACHE_FLUSH 10880122e290: 0000: c0004600 00000006 1089t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1090 { EVENT = CACHE_FLUSH } 1091 event CACHE_FLUSH 10920122e298: 0000: c0004600 00000006 1093t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1094 { EVENT = CACHE_FLUSH } 1095 event CACHE_FLUSH 10960122e2a0: 0000: c0004600 00000006 1097t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1098 { EVENT = CACHE_FLUSH } 1099 event CACHE_FLUSH 11000122e2a8: 0000: c0004600 00000006 1101t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1102 { EVENT = CACHE_FLUSH } 1103 event CACHE_FLUSH 11040122e2b0: 0000: c0004600 00000006 1105t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1106 { EVENT = CACHE_FLUSH } 1107 event CACHE_FLUSH 11080122e2b8: 0000: c0004600 00000006 1109t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1110 { EVENT = CACHE_FLUSH } 1111 event CACHE_FLUSH 11120122e2c0: 0000: c0004600 00000006 1113t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1114 { EVENT = CACHE_FLUSH } 1115 event CACHE_FLUSH 11160122e2c8: 0000: c0004600 00000006 1117t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1118 { EVENT = CACHE_FLUSH } 1119 event CACHE_FLUSH 11200122e2d0: 0000: c0004600 00000006 11210122d1d8: 0000: c0013700 0122e000 000000b6 1122t2 nop 1123############################################################ 1124vertices: 0 1125cmd: deqp-gles2/185: fence=1253 1126############################################################ 1127cmdstream: 124 dwords 1128t0 write RB_BC_CONTROL (0f01) 1129 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 11300122f000: 0000: 00000f01 1c004046 1131t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1132 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 11330122f008: 0000: c0012d00 00040293 00000020 1134t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1135 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 11360122f014: 0000: c0012d00 00040316 00000002 1137t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1138 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 11390122f020: 0000: c0012d00 00040317 00000002 1140t0 write CP_PERFMON_CNTL (0444) 1141 CP_PERFMON_CNTL: 0 11420122f02c: 0000: 00000444 00000000 1143t0 write RBBM_PM_OVERRIDE1 (039c) 1144 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 1145 RBBM_PM_OVERRIDE2: 0xfff 11460122f034: 0000: 0001039c ffffffff 00000fff 1147t0 write TP0_CHICKEN (0e1e) 1148 TP0_CHICKEN: 0x2 11490122f040: 0000: 00000e1e 00000002 1150t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 11510122f048: 0000: c0003b00 00007fff 1152t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1153 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 11540122f050: 0000: c0012d00 00040307 00100020 1155t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1156 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 11570122f05c: 0000: c0012d00 00040308 000e0120 1158t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1159 VGT_MAX_VTX_INDX: 0xffffffff 1160 VGT_MIN_VTX_INDX: 0 11610122f068: 0000: c0022d00 00040100 ffffffff 00000000 1162t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1163 VGT_INDX_OFFSET: 0 11640122f078: 0000: c0012d00 00040102 00000000 1165t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1166 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 11670122f084: 0000: c0012d00 00040181 00000004 1168t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1169 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 11700122f090: 0000: c0012d00 00040182 ffffffff 1171t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1172 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 11730122f09c: 0000: c0012d00 00040301 00000000 1174t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1175 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 11760122f0a8: 0000: c0012d00 00040300 00000000 1177t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1178 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 11790122f0b4: 0000: c0012d00 00040080 00000000 1180t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1181 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 11820122f0c0: 0000: c0012d00 00040208 00000004 1183t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1184 RB_SAMPLE_POS: 0x88888888 11850122f0cc: 0000: c0012d00 0004020a 88888888 1186t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1187 RB_COLOR_DEST_MASK: 0xffffffff 11880122f0d8: 0000: c0012d00 00040326 ffffffff 1189t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1190 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 11910122f0e4: 0000: c0012d00 0004031b 0003c000 1192t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1193 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 1194 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 11950122f0f0: 0000: c0022d00 00040183 00000000 00000000 1196t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 11970122f100: 0000: c0004b00 00000000 1198t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 11990122f108: 0000: c0035200 000005d0 00000000 5f601000 00000001 1200t0 write SQ_INST_STORE_MANAGMENT (0d02) 1201 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 12020122f11c: 0000: 00000d02 00000180 1203t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 12040122f124: 0000: c0003b00 00000300 1205t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 12060122f12c: 0000: c0004a00 80000180 1207t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 12080122f13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 12090122f15c: 2.000000 0.750000 0.375000 0.250000 12100122f134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 12110122f154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 1212t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1213 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 12140122f16c: 0000: c0012d00 00040104 0000000f 1215t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1216 RB_BLEND_RED: 0 1217 RB_BLEND_GREEN: 0 1218 RB_BLEND_BLUE: 0 1219 RB_BLEND_ALPHA: 0xff 12200122f178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 1221t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1222 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 12230122f190: 0000: c0012d00 00040206 0000043f 1224t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1225 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 12260122f19c: 0000: c0012d00 00040000 00000020 1227t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1228 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1246000 } 12290122f1a8: 0000: c0012d00 00040001 01246009 1230t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1231 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 1232 PA_SC_SCREEN_SCISSOR_BR: { X = 8 | Y = 16 } 12330122f1b4: 0000: c0022d00 0004000e 80000000 00100008 1234t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1235 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 12360122f1c4: 0000: c0012d00 00040080 00000000 1237t0 write CP_SCRATCH_REG6 (057e) 1238 CP_SCRATCH_REG6: 27 1239 :0,0,27,18 12400122f1d0: 0000: 0000057e 0000001b 1241t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 1242 ibaddr:0122e000 1243 ibsize:000000b6 1244t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1245 set shader const 0078 12460122e000: 0000: c0042d00 00010078 0112d183 00100000 0112d183 00100000 1247t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1248 PA_SC_AA_MASK: 0xffff 12490122e018: 0000: c0012d00 00040312 0000ffff 1250t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1251 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 12520122e024: 0000: c0012d00 00040200 00000000 1253t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 1254 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1255 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1256 RB_ALPHA_REF: 0 12570122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 1258t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1259 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 1260 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 12610122e044: 0000: c0022d00 00040204 00000000 00090244 1262t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1263 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 1264 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 1265 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 1266 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 12670122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 1268t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 1269 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 1270 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 1271 PA_CL_GB_VERT_DISC_ADJ: 1.000000 1272 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 1273 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 12740122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 1275t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1276 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 1277 PA_SC_WINDOW_SCISSOR_BR: { X = 8 | Y = 16 } 12780122e088: 0000: c0022d00 00040081 00000000 00100008 1279t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 1280 PA_CL_VPORT_XSCALE: 4.000000 1281 PA_CL_VPORT_XOFFSET: 4.000000 1282 PA_CL_VPORT_YSCALE: 8.000000 1283 PA_CL_VPORT_YOFFSET: 8.000000 1284 PA_CL_VPORT_ZSCALE: 0.000000 1285 PA_CL_VPORT_ZOFFSET: 0.000000 12860122e098: 0000: c0062d00 0004010f 40800000 40800000 41000000 41000000 00000000 00000000 1287t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 12880122e0c0: 4.000000 8.000000 0.000000 0.000000 4.000000 8.000000 0.000000 0.000000 12890122e0b8: 0000: c0082d00 00000184 40800000 41000000 00000000 00000000 40800000 41000000 1290* 1291t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 1292 vertex shader, start=0000, size=0015 1293 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 1294 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 1295 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 1296 0000 0000 c200 ALLOC POSITION SIZE(0x0) 1297 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 1298 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 1299 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 1300 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 1301 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 1302 0000 0000 0000 NOP 13030122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 13040122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 13050122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 1306t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 1307 fragment shader, start=0000, size=000c 1308 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 1309 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 1310 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 1311 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 1312 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 1313 0000 0000 0000 NOP 13140122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 13150122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 1316t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1317 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 13180122e17c: 0000: c0012d00 00040181 00000106 1319t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1320 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 13210122e188: 0000: c0012d00 00040180 10030002 1322t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 13230122e19c: 0.000000 0.000000 0.000000 0.000000 13240122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 1325t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1326 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 13270122e1ac: 0000: c0012d00 00040202 00000c20 1328t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1329 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 13300122e1b8: 0000: c0012d00 00040201 00000000 1331t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1332 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 13330122e1c4: 0000: c0012d00 00040104 0000000f 1334t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1335 RB_BLEND_RED: 0 1336 RB_BLEND_GREEN: 0 1337 RB_BLEND_BLUE: 0 1338 RB_BLEND_ALPHA: 0 13390122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 1340t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 1341 set texture const 0000 1342 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 1343 filter min/mag: point/point 1344 swizzle: xyzw 1345 addr=01254000 (flags=820), size=8x16, pitch=32, format=FMT_1_REVERSE 1346 mipaddr=00000000 (flags=200) 13470122e1e8: 0000: c0062d00 00010000 00424800 01254820 0001e007 00000d11 00000000 00000200 1348t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1349 VGT_INDX_OFFSET: 0 13500122e208: 0000: c0012d00 00040102 00000000 1351t0 write TC_CNTL_STATUS (0e00) 1352 TC_CNTL_STATUS: { L2_INVALIDATE } 13530122e214: 0000: 00000e00 00000001 1354t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 13550122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 1356t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 13570122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 1358t0 write CP_SCRATCH_REG7 (057f) 1359 CP_SCRATCH_REG7: 23 1360 :0,0,27,23 13610122e24c: 0000: 0000057f 00000017 1362t3 opcode: CP_NOP (10) (2 dwords) 13630122e254: 0000: c0001000 00000000 1364t3 opcode: CP_DRAW_INDX (22) (3 dwords) 1365 { VIZ_QUERY = 0 } 1366 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 1367 draw: 0 1368 prim_type: DI_PT_TRIFAN (5) 1369 source_select: DI_SRC_SEL_AUTO_INDEX (2) 1370 num_indices: 1407 1371 draw[3] register values 1372 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 1373 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 1374 + 00000000 CP_PERFMON_CNTL: 0 1375!+ 0000001b CP_SCRATCH_REG6: 27 1376 :0,0,27,23 1377!+ 00000017 CP_SCRATCH_REG7: 23 1378 :0,0,27,23 1379 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 1380 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 1381 + 00000002 TP0_CHICKEN: 0x2 1382 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 1383 + 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 1384!+ 01246009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1246000 } 1385 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 1386!+ 00100008 PA_SC_SCREEN_SCISSOR_BR: { X = 8 | Y = 16 } 1387 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 1388 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 1389!+ 00100008 PA_SC_WINDOW_SCISSOR_BR: { X = 8 | Y = 16 } 1390 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 1391 + 00000000 VGT_MIN_VTX_INDX: 0 1392 + 00000000 VGT_INDX_OFFSET: 0 1393 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 1394 + 00000000 RB_BLEND_RED: 0 1395 + 00000000 RB_BLEND_GREEN: 0 1396 + 00000000 RB_BLEND_BLUE: 0 1397 + 00000000 RB_BLEND_ALPHA: 0 1398 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1399 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1400 + 00000000 RB_ALPHA_REF: 0 1401!+ 40800000 PA_CL_VPORT_XSCALE: 4.000000 1402!+ 40800000 PA_CL_VPORT_XOFFSET: 4.000000 1403!+ 41000000 PA_CL_VPORT_YSCALE: 8.000000 1404!+ 41000000 PA_CL_VPORT_YOFFSET: 8.000000 1405 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 1406 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 1407 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 1408 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 1409 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 1410 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 1411 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 1412 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 1413 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 1414 + 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 1415 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 1416 + 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 1417 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 1418 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 1419 + 88888888 RB_SAMPLE_POS: 0x88888888 1420 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 1421 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 1422 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 1423 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 1424 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 1425 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 1426 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 1427 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 1428 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 1429 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 1430 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 1431 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 1432 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 1433 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 1434 + 0000ffff PA_SC_AA_MASK: 0xffff 1435 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 1436 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 1437 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 1438 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 14390122e25c: 0000: c0012200 00000000 00040085 1440t0 write CP_SCRATCH_REG7 (057f) 1441NEEDS WFI: CP_SCRATCH_REG7 (57f) 1442 CP_SCRATCH_REG7: 24 1443 :0,0,27,24 14440122e268: 0000: 0000057f 00000018 1445t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 14460122e270: 0000: c0002600 00000000 1447t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1448 { EVENT = CACHE_FLUSH } 1449 event CACHE_FLUSH 14500122e278: 0000: c0004600 00000006 1451t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1452 { EVENT = CACHE_FLUSH } 1453 event CACHE_FLUSH 14540122e280: 0000: c0004600 00000006 1455t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1456 { EVENT = CACHE_FLUSH } 1457 event CACHE_FLUSH 14580122e288: 0000: c0004600 00000006 1459t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1460 { EVENT = CACHE_FLUSH } 1461 event CACHE_FLUSH 14620122e290: 0000: c0004600 00000006 1463t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1464 { EVENT = CACHE_FLUSH } 1465 event CACHE_FLUSH 14660122e298: 0000: c0004600 00000006 1467t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1468 { EVENT = CACHE_FLUSH } 1469 event CACHE_FLUSH 14700122e2a0: 0000: c0004600 00000006 1471t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1472 { EVENT = CACHE_FLUSH } 1473 event CACHE_FLUSH 14740122e2a8: 0000: c0004600 00000006 1475t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1476 { EVENT = CACHE_FLUSH } 1477 event CACHE_FLUSH 14780122e2b0: 0000: c0004600 00000006 1479t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1480 { EVENT = CACHE_FLUSH } 1481 event CACHE_FLUSH 14820122e2b8: 0000: c0004600 00000006 1483t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1484 { EVENT = CACHE_FLUSH } 1485 event CACHE_FLUSH 14860122e2c0: 0000: c0004600 00000006 1487t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1488 { EVENT = CACHE_FLUSH } 1489 event CACHE_FLUSH 14900122e2c8: 0000: c0004600 00000006 1491t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1492 { EVENT = CACHE_FLUSH } 1493 event CACHE_FLUSH 14940122e2d0: 0000: c0004600 00000006 14950122f1d8: 0000: c0013700 0122e000 000000b6 1496t2 nop 1497############################################################ 1498vertices: 0 1499cmd: deqp-gles2/185: fence=1254 1500############################################################ 1501cmdstream: 124 dwords 1502t0 write RB_BC_CONTROL (0f01) 1503 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 15040122d000: 0000: 00000f01 1c004046 1505t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1506 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 15070122d008: 0000: c0012d00 00040293 00000020 1508t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1509 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 15100122d014: 0000: c0012d00 00040316 00000002 1511t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1512 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 15130122d020: 0000: c0012d00 00040317 00000002 1514t0 write CP_PERFMON_CNTL (0444) 1515 CP_PERFMON_CNTL: 0 15160122d02c: 0000: 00000444 00000000 1517t0 write RBBM_PM_OVERRIDE1 (039c) 1518 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 1519 RBBM_PM_OVERRIDE2: 0xfff 15200122d034: 0000: 0001039c ffffffff 00000fff 1521t0 write TP0_CHICKEN (0e1e) 1522 TP0_CHICKEN: 0x2 15230122d040: 0000: 00000e1e 00000002 1524t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 15250122d048: 0000: c0003b00 00007fff 1526t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1527 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 15280122d050: 0000: c0012d00 00040307 00100020 1529t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1530 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 15310122d05c: 0000: c0012d00 00040308 000e0120 1532t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1533 VGT_MAX_VTX_INDX: 0xffffffff 1534 VGT_MIN_VTX_INDX: 0 15350122d068: 0000: c0022d00 00040100 ffffffff 00000000 1536t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1537 VGT_INDX_OFFSET: 0 15380122d078: 0000: c0012d00 00040102 00000000 1539t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1540 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 15410122d084: 0000: c0012d00 00040181 00000004 1542t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1543 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 15440122d090: 0000: c0012d00 00040182 ffffffff 1545t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1546 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 15470122d09c: 0000: c0012d00 00040301 00000000 1548t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1549 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 15500122d0a8: 0000: c0012d00 00040300 00000000 1551t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1552 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 15530122d0b4: 0000: c0012d00 00040080 00000000 1554t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1555 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 15560122d0c0: 0000: c0012d00 00040208 00000004 1557t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1558 RB_SAMPLE_POS: 0x88888888 15590122d0cc: 0000: c0012d00 0004020a 88888888 1560t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1561 RB_COLOR_DEST_MASK: 0xffffffff 15620122d0d8: 0000: c0012d00 00040326 ffffffff 1563t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1564 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 15650122d0e4: 0000: c0012d00 0004031b 0003c000 1566t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1567 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 1568 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 15690122d0f0: 0000: c0022d00 00040183 00000000 00000000 1570t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 15710122d100: 0000: c0004b00 00000000 1572t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 15730122d108: 0000: c0035200 000005d0 00000000 5f601000 00000001 1574t0 write SQ_INST_STORE_MANAGMENT (0d02) 1575 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 15760122d11c: 0000: 00000d02 00000180 1577t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 15780122d124: 0000: c0003b00 00000300 1579t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 15800122d12c: 0000: c0004a00 80000180 1581t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 15820122d13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 15830122d15c: 2.000000 0.750000 0.375000 0.250000 15840122d134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 15850122d154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 1586t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1587 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 15880122d16c: 0000: c0012d00 00040104 0000000f 1589t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1590 RB_BLEND_RED: 0 1591 RB_BLEND_GREEN: 0 1592 RB_BLEND_BLUE: 0 1593 RB_BLEND_ALPHA: 0xff 15940122d178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 1595t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1596 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 15970122d190: 0000: c0012d00 00040206 0000043f 1598t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1599 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 16000122d19c: 0000: c0012d00 00040000 00000020 1601t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1602 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1248000 } 16030122d1a8: 0000: c0012d00 00040001 01248009 1604t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1605 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 1606 PA_SC_SCREEN_SCISSOR_BR: { X = 4 | Y = 8 } 16070122d1b4: 0000: c0022d00 0004000e 80000000 00080004 1608t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1609 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 16100122d1c4: 0000: c0012d00 00040080 00000000 1611t0 write CP_SCRATCH_REG6 (057e) 1612 CP_SCRATCH_REG6: 33 1613 :0,0,33,24 16140122d1d0: 0000: 0000057e 00000021 1615t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 1616 ibaddr:0122e000 1617 ibsize:000000b6 1618t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1619 set shader const 0078 16200122e000: 0000: c0042d00 00010078 0112d203 00100000 0112d203 00100000 1621t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1622 PA_SC_AA_MASK: 0xffff 16230122e018: 0000: c0012d00 00040312 0000ffff 1624t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1625 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 16260122e024: 0000: c0012d00 00040200 00000000 1627t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 1628 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1629 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1630 RB_ALPHA_REF: 0 16310122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 1632t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1633 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 1634 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 16350122e044: 0000: c0022d00 00040204 00000000 00090244 1636t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1637 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 1638 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 1639 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 1640 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 16410122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 1642t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 1643 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 1644 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 1645 PA_CL_GB_VERT_DISC_ADJ: 1.000000 1646 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 1647 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 16480122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 1649t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1650 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 1651 PA_SC_WINDOW_SCISSOR_BR: { X = 4 | Y = 8 } 16520122e088: 0000: c0022d00 00040081 00000000 00080004 1653t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 1654 PA_CL_VPORT_XSCALE: 2.000000 1655 PA_CL_VPORT_XOFFSET: 2.000000 1656 PA_CL_VPORT_YSCALE: 4.000000 1657 PA_CL_VPORT_YOFFSET: 4.000000 1658 PA_CL_VPORT_ZSCALE: 0.000000 1659 PA_CL_VPORT_ZOFFSET: 0.000000 16600122e098: 0000: c0062d00 0004010f 40000000 40000000 40800000 40800000 00000000 00000000 1661t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 16620122e0c0: 2.000000 4.000000 0.000000 0.000000 2.000000 4.000000 0.000000 0.000000 16630122e0b8: 0000: c0082d00 00000184 40000000 40800000 00000000 00000000 40000000 40800000 1664* 1665t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 1666 vertex shader, start=0000, size=0015 1667 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 1668 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 1669 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 1670 0000 0000 c200 ALLOC POSITION SIZE(0x0) 1671 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 1672 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 1673 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 1674 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 1675 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 1676 0000 0000 0000 NOP 16770122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 16780122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 16790122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 1680t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 1681 fragment shader, start=0000, size=000c 1682 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 1683 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 1684 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 1685 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 1686 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 1687 0000 0000 0000 NOP 16880122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 16890122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 1690t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1691 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 16920122e17c: 0000: c0012d00 00040181 00000106 1693t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1694 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 16950122e188: 0000: c0012d00 00040180 10030002 1696t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 16970122e19c: 0.000000 0.000000 0.000000 0.000000 16980122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 1699t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1700 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 17010122e1ac: 0000: c0012d00 00040202 00000c20 1702t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1703 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 17040122e1b8: 0000: c0012d00 00040201 00000000 1705t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1706 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 17070122e1c4: 0000: c0012d00 00040104 0000000f 1708t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1709 RB_BLEND_RED: 0 1710 RB_BLEND_GREEN: 0 1711 RB_BLEND_BLUE: 0 1712 RB_BLEND_ALPHA: 0 17130122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 1714t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 1715 set texture const 0000 1716 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 1717 filter min/mag: point/point 1718 swizzle: xyzw 1719 addr=01254000 (flags=820), size=4x8, pitch=32, format=FMT_1_REVERSE 1720 mipaddr=00000000 (flags=200) 17210122e1e8: 0000: c0062d00 00010000 00424800 01254820 0000e003 00000d11 00000000 00000200 1722t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1723 VGT_INDX_OFFSET: 0 17240122e208: 0000: c0012d00 00040102 00000000 1725t0 write TC_CNTL_STATUS (0e00) 1726 TC_CNTL_STATUS: { L2_INVALIDATE } 17270122e214: 0000: 00000e00 00000001 1728t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 17290122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 1730t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 17310122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 1732t0 write CP_SCRATCH_REG7 (057f) 1733 CP_SCRATCH_REG7: 29 1734 :0,0,33,29 17350122e24c: 0000: 0000057f 0000001d 1736t3 opcode: CP_NOP (10) (2 dwords) 17370122e254: 0000: c0001000 00000000 1738t3 opcode: CP_DRAW_INDX (22) (3 dwords) 1739 { VIZ_QUERY = 0 } 1740 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 1741 draw: 0 1742 prim_type: DI_PT_TRIFAN (5) 1743 source_select: DI_SRC_SEL_AUTO_INDEX (2) 1744 num_indices: 1407 1745 draw[4] register values 1746 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 1747 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 1748 + 00000000 CP_PERFMON_CNTL: 0 1749!+ 00000021 CP_SCRATCH_REG6: 33 1750 :0,0,33,29 1751!+ 0000001d CP_SCRATCH_REG7: 29 1752 :0,0,33,29 1753 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 1754 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 1755 + 00000002 TP0_CHICKEN: 0x2 1756 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 1757 + 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 1758!+ 01248009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1248000 } 1759 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 1760!+ 00080004 PA_SC_SCREEN_SCISSOR_BR: { X = 4 | Y = 8 } 1761 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 1762 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 1763!+ 00080004 PA_SC_WINDOW_SCISSOR_BR: { X = 4 | Y = 8 } 1764 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 1765 + 00000000 VGT_MIN_VTX_INDX: 0 1766 + 00000000 VGT_INDX_OFFSET: 0 1767 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 1768 + 00000000 RB_BLEND_RED: 0 1769 + 00000000 RB_BLEND_GREEN: 0 1770 + 00000000 RB_BLEND_BLUE: 0 1771 + 00000000 RB_BLEND_ALPHA: 0 1772 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1773 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 1774 + 00000000 RB_ALPHA_REF: 0 1775!+ 40000000 PA_CL_VPORT_XSCALE: 2.000000 1776!+ 40000000 PA_CL_VPORT_XOFFSET: 2.000000 1777!+ 40800000 PA_CL_VPORT_YSCALE: 4.000000 1778!+ 40800000 PA_CL_VPORT_YOFFSET: 4.000000 1779 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 1780 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 1781 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 1782 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 1783 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 1784 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 1785 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 1786 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 1787 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 1788 + 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 1789 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 1790 + 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 1791 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 1792 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 1793 + 88888888 RB_SAMPLE_POS: 0x88888888 1794 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 1795 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 1796 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 1797 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 1798 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 1799 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 1800 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 1801 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 1802 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 1803 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 1804 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 1805 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 1806 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 1807 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 1808 + 0000ffff PA_SC_AA_MASK: 0xffff 1809 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 1810 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 1811 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 1812 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 18130122e25c: 0000: c0012200 00000000 00040085 1814t0 write CP_SCRATCH_REG7 (057f) 1815NEEDS WFI: CP_SCRATCH_REG7 (57f) 1816 CP_SCRATCH_REG7: 30 1817 :0,0,33,30 18180122e268: 0000: 0000057f 0000001e 1819t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 18200122e270: 0000: c0002600 00000000 1821t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1822 { EVENT = CACHE_FLUSH } 1823 event CACHE_FLUSH 18240122e278: 0000: c0004600 00000006 1825t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1826 { EVENT = CACHE_FLUSH } 1827 event CACHE_FLUSH 18280122e280: 0000: c0004600 00000006 1829t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1830 { EVENT = CACHE_FLUSH } 1831 event CACHE_FLUSH 18320122e288: 0000: c0004600 00000006 1833t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1834 { EVENT = CACHE_FLUSH } 1835 event CACHE_FLUSH 18360122e290: 0000: c0004600 00000006 1837t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1838 { EVENT = CACHE_FLUSH } 1839 event CACHE_FLUSH 18400122e298: 0000: c0004600 00000006 1841t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1842 { EVENT = CACHE_FLUSH } 1843 event CACHE_FLUSH 18440122e2a0: 0000: c0004600 00000006 1845t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1846 { EVENT = CACHE_FLUSH } 1847 event CACHE_FLUSH 18480122e2a8: 0000: c0004600 00000006 1849t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1850 { EVENT = CACHE_FLUSH } 1851 event CACHE_FLUSH 18520122e2b0: 0000: c0004600 00000006 1853t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1854 { EVENT = CACHE_FLUSH } 1855 event CACHE_FLUSH 18560122e2b8: 0000: c0004600 00000006 1857t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1858 { EVENT = CACHE_FLUSH } 1859 event CACHE_FLUSH 18600122e2c0: 0000: c0004600 00000006 1861t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1862 { EVENT = CACHE_FLUSH } 1863 event CACHE_FLUSH 18640122e2c8: 0000: c0004600 00000006 1865t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 1866 { EVENT = CACHE_FLUSH } 1867 event CACHE_FLUSH 18680122e2d0: 0000: c0004600 00000006 18690122d1d8: 0000: c0013700 0122e000 000000b6 1870t2 nop 1871############################################################ 1872vertices: 0 1873cmd: deqp-gles2/185: fence=1255 1874############################################################ 1875cmdstream: 124 dwords 1876t0 write RB_BC_CONTROL (0f01) 1877 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 18780122f000: 0000: 00000f01 1c004046 1879t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1880 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 18810122f008: 0000: c0012d00 00040293 00000020 1882t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1883 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 18840122f014: 0000: c0012d00 00040316 00000002 1885t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1886 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 18870122f020: 0000: c0012d00 00040317 00000002 1888t0 write CP_PERFMON_CNTL (0444) 1889 CP_PERFMON_CNTL: 0 18900122f02c: 0000: 00000444 00000000 1891t0 write RBBM_PM_OVERRIDE1 (039c) 1892 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 1893 RBBM_PM_OVERRIDE2: 0xfff 18940122f034: 0000: 0001039c ffffffff 00000fff 1895t0 write TP0_CHICKEN (0e1e) 1896 TP0_CHICKEN: 0x2 18970122f040: 0000: 00000e1e 00000002 1898t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 18990122f048: 0000: c0003b00 00007fff 1900t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1901 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 19020122f050: 0000: c0012d00 00040307 00100020 1903t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1904 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 19050122f05c: 0000: c0012d00 00040308 000e0120 1906t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1907 VGT_MAX_VTX_INDX: 0xffffffff 1908 VGT_MIN_VTX_INDX: 0 19090122f068: 0000: c0022d00 00040100 ffffffff 00000000 1910t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1911 VGT_INDX_OFFSET: 0 19120122f078: 0000: c0012d00 00040102 00000000 1913t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1914 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 19150122f084: 0000: c0012d00 00040181 00000004 1916t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1917 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 19180122f090: 0000: c0012d00 00040182 ffffffff 1919t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1920 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 19210122f09c: 0000: c0012d00 00040301 00000000 1922t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1923 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 19240122f0a8: 0000: c0012d00 00040300 00000000 1925t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1926 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 19270122f0b4: 0000: c0012d00 00040080 00000000 1928t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1929 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 19300122f0c0: 0000: c0012d00 00040208 00000004 1931t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1932 RB_SAMPLE_POS: 0x88888888 19330122f0cc: 0000: c0012d00 0004020a 88888888 1934t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1935 RB_COLOR_DEST_MASK: 0xffffffff 19360122f0d8: 0000: c0012d00 00040326 ffffffff 1937t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1938 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 19390122f0e4: 0000: c0012d00 0004031b 0003c000 1940t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1941 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 1942 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 19430122f0f0: 0000: c0022d00 00040183 00000000 00000000 1944t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 19450122f100: 0000: c0004b00 00000000 1946t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 19470122f108: 0000: c0035200 000005d0 00000000 5f601000 00000001 1948t0 write SQ_INST_STORE_MANAGMENT (0d02) 1949 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 19500122f11c: 0000: 00000d02 00000180 1951t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 19520122f124: 0000: c0003b00 00000300 1953t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 19540122f12c: 0000: c0004a00 80000180 1955t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 19560122f13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 19570122f15c: 2.000000 0.750000 0.375000 0.250000 19580122f134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 19590122f154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 1960t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1961 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 19620122f16c: 0000: c0012d00 00040104 0000000f 1963t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1964 RB_BLEND_RED: 0 1965 RB_BLEND_GREEN: 0 1966 RB_BLEND_BLUE: 0 1967 RB_BLEND_ALPHA: 0xff 19680122f178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 1969t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1970 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 19710122f190: 0000: c0012d00 00040206 0000043f 1972t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1973 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 19740122f19c: 0000: c0012d00 00040000 00000020 1975t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1976 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x124a000 } 19770122f1a8: 0000: c0012d00 00040001 0124a009 1978t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 1979 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 1980 PA_SC_SCREEN_SCISSOR_BR: { X = 2 | Y = 4 } 19810122f1b4: 0000: c0022d00 0004000e 80000000 00040002 1982t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1983 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 19840122f1c4: 0000: c0012d00 00040080 00000000 1985t0 write CP_SCRATCH_REG6 (057e) 1986 CP_SCRATCH_REG6: 39 1987 :0,0,39,30 19880122f1d0: 0000: 0000057e 00000027 1989t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 1990 ibaddr:0122e000 1991 ibsize:000000b6 1992t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 1993 set shader const 0078 19940122e000: 0000: c0042d00 00010078 0112d283 00100000 0112d283 00100000 1995t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1996 PA_SC_AA_MASK: 0xffff 19970122e018: 0000: c0012d00 00040312 0000ffff 1998t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 1999 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 20000122e024: 0000: c0012d00 00040200 00000000 2001t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 2002 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2003 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2004 RB_ALPHA_REF: 0 20050122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 2006t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2007 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 2008 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 20090122e044: 0000: c0022d00 00040204 00000000 00090244 2010t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2011 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 2012 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 2013 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 2014 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 20150122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 2016t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 2017 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 2018 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 2019 PA_CL_GB_VERT_DISC_ADJ: 1.000000 2020 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 2021 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 20220122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 2023t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2024 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2025 PA_SC_WINDOW_SCISSOR_BR: { X = 2 | Y = 4 } 20260122e088: 0000: c0022d00 00040081 00000000 00040002 2027t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 2028 PA_CL_VPORT_XSCALE: 1.000000 2029 PA_CL_VPORT_XOFFSET: 1.000000 2030 PA_CL_VPORT_YSCALE: 2.000000 2031 PA_CL_VPORT_YOFFSET: 2.000000 2032 PA_CL_VPORT_ZSCALE: 0.000000 2033 PA_CL_VPORT_ZOFFSET: 0.000000 20340122e098: 0000: c0062d00 0004010f 3f800000 3f800000 40000000 40000000 00000000 00000000 2035t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 20360122e0c0: 1.000000 2.000000 0.000000 0.000000 1.000000 2.000000 0.000000 0.000000 20370122e0b8: 0000: c0082d00 00000184 3f800000 40000000 00000000 00000000 3f800000 40000000 2038* 2039t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 2040 vertex shader, start=0000, size=0015 2041 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 2042 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 2043 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 2044 0000 0000 c200 ALLOC POSITION SIZE(0x0) 2045 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 2046 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 2047 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 2048 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 2049 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 2050 0000 0000 0000 NOP 20510122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 20520122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 20530122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 2054t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 2055 fragment shader, start=0000, size=000c 2056 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 2057 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 2058 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 2059 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 2060 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 2061 0000 0000 0000 NOP 20620122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 20630122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 2064t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2065 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 20660122e17c: 0000: c0012d00 00040181 00000106 2067t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2068 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 20690122e188: 0000: c0012d00 00040180 10030002 2070t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 20710122e19c: 0.000000 0.000000 0.000000 0.000000 20720122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 2073t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2074 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 20750122e1ac: 0000: c0012d00 00040202 00000c20 2076t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2077 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 20780122e1b8: 0000: c0012d00 00040201 00000000 2079t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2080 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 20810122e1c4: 0000: c0012d00 00040104 0000000f 2082t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2083 RB_BLEND_RED: 0 2084 RB_BLEND_GREEN: 0 2085 RB_BLEND_BLUE: 0 2086 RB_BLEND_ALPHA: 0 20870122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 2088t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 2089 set texture const 0000 2090 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 2091 filter min/mag: point/point 2092 swizzle: xyzw 2093 addr=01254000 (flags=820), size=2x4, pitch=32, format=FMT_1_REVERSE 2094 mipaddr=00000000 (flags=200) 20950122e1e8: 0000: c0062d00 00010000 00424800 01254820 00006001 00000d11 00000000 00000200 2096t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2097 VGT_INDX_OFFSET: 0 20980122e208: 0000: c0012d00 00040102 00000000 2099t0 write TC_CNTL_STATUS (0e00) 2100 TC_CNTL_STATUS: { L2_INVALIDATE } 21010122e214: 0000: 00000e00 00000001 2102t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 21030122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 2104t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 21050122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 2106t0 write CP_SCRATCH_REG7 (057f) 2107 CP_SCRATCH_REG7: 35 2108 :0,0,39,35 21090122e24c: 0000: 0000057f 00000023 2110t3 opcode: CP_NOP (10) (2 dwords) 21110122e254: 0000: c0001000 00000000 2112t3 opcode: CP_DRAW_INDX (22) (3 dwords) 2113 { VIZ_QUERY = 0 } 2114 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 2115 draw: 0 2116 prim_type: DI_PT_TRIFAN (5) 2117 source_select: DI_SRC_SEL_AUTO_INDEX (2) 2118 num_indices: 1407 2119 draw[5] register values 2120 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 2121 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 2122 + 00000000 CP_PERFMON_CNTL: 0 2123!+ 00000027 CP_SCRATCH_REG6: 39 2124 :0,0,39,35 2125!+ 00000023 CP_SCRATCH_REG7: 35 2126 :0,0,39,35 2127 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 2128 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 2129 + 00000002 TP0_CHICKEN: 0x2 2130 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 2131 + 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 2132!+ 0124a009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x124a000 } 2133 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 2134!+ 00040002 PA_SC_SCREEN_SCISSOR_BR: { X = 2 | Y = 4 } 2135 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 2136 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2137!+ 00040002 PA_SC_WINDOW_SCISSOR_BR: { X = 2 | Y = 4 } 2138 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 2139 + 00000000 VGT_MIN_VTX_INDX: 0 2140 + 00000000 VGT_INDX_OFFSET: 0 2141 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 2142 + 00000000 RB_BLEND_RED: 0 2143 + 00000000 RB_BLEND_GREEN: 0 2144 + 00000000 RB_BLEND_BLUE: 0 2145 + 00000000 RB_BLEND_ALPHA: 0 2146 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2147 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2148 + 00000000 RB_ALPHA_REF: 0 2149!+ 3f800000 PA_CL_VPORT_XSCALE: 1.000000 2150!+ 3f800000 PA_CL_VPORT_XOFFSET: 1.000000 2151!+ 40000000 PA_CL_VPORT_YSCALE: 2.000000 2152!+ 40000000 PA_CL_VPORT_YOFFSET: 2.000000 2153 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 2154 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 2155 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 2156 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 2157 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 2158 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 2159 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 2160 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 2161 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 2162 + 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 2163 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 2164 + 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 2165 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 2166 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 2167 + 88888888 RB_SAMPLE_POS: 0x88888888 2168 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 2169 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 2170 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 2171 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 2172 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 2173 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 2174 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 2175 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 2176 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 2177 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 2178 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 2179 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 2180 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 2181 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 2182 + 0000ffff PA_SC_AA_MASK: 0xffff 2183 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 2184 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 2185 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 2186 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 21870122e25c: 0000: c0012200 00000000 00040085 2188t0 write CP_SCRATCH_REG7 (057f) 2189NEEDS WFI: CP_SCRATCH_REG7 (57f) 2190 CP_SCRATCH_REG7: 36 2191 :0,0,39,36 21920122e268: 0000: 0000057f 00000024 2193t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 21940122e270: 0000: c0002600 00000000 2195t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2196 { EVENT = CACHE_FLUSH } 2197 event CACHE_FLUSH 21980122e278: 0000: c0004600 00000006 2199t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2200 { EVENT = CACHE_FLUSH } 2201 event CACHE_FLUSH 22020122e280: 0000: c0004600 00000006 2203t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2204 { EVENT = CACHE_FLUSH } 2205 event CACHE_FLUSH 22060122e288: 0000: c0004600 00000006 2207t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2208 { EVENT = CACHE_FLUSH } 2209 event CACHE_FLUSH 22100122e290: 0000: c0004600 00000006 2211t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2212 { EVENT = CACHE_FLUSH } 2213 event CACHE_FLUSH 22140122e298: 0000: c0004600 00000006 2215t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2216 { EVENT = CACHE_FLUSH } 2217 event CACHE_FLUSH 22180122e2a0: 0000: c0004600 00000006 2219t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2220 { EVENT = CACHE_FLUSH } 2221 event CACHE_FLUSH 22220122e2a8: 0000: c0004600 00000006 2223t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2224 { EVENT = CACHE_FLUSH } 2225 event CACHE_FLUSH 22260122e2b0: 0000: c0004600 00000006 2227t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2228 { EVENT = CACHE_FLUSH } 2229 event CACHE_FLUSH 22300122e2b8: 0000: c0004600 00000006 2231t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2232 { EVENT = CACHE_FLUSH } 2233 event CACHE_FLUSH 22340122e2c0: 0000: c0004600 00000006 2235t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2236 { EVENT = CACHE_FLUSH } 2237 event CACHE_FLUSH 22380122e2c8: 0000: c0004600 00000006 2239t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2240 { EVENT = CACHE_FLUSH } 2241 event CACHE_FLUSH 22420122e2d0: 0000: c0004600 00000006 22430122f1d8: 0000: c0013700 0122e000 000000b6 2244t2 nop 2245############################################################ 2246vertices: 0 2247cmd: deqp-gles2/185: fence=1256 2248############################################################ 2249cmdstream: 124 dwords 2250t0 write RB_BC_CONTROL (0f01) 2251 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 22520122d000: 0000: 00000f01 1c004046 2253t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2254 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 22550122d008: 0000: c0012d00 00040293 00000020 2256t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2257 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 22580122d014: 0000: c0012d00 00040316 00000002 2259t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2260 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 22610122d020: 0000: c0012d00 00040317 00000002 2262t0 write CP_PERFMON_CNTL (0444) 2263 CP_PERFMON_CNTL: 0 22640122d02c: 0000: 00000444 00000000 2265t0 write RBBM_PM_OVERRIDE1 (039c) 2266 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 2267 RBBM_PM_OVERRIDE2: 0xfff 22680122d034: 0000: 0001039c ffffffff 00000fff 2269t0 write TP0_CHICKEN (0e1e) 2270 TP0_CHICKEN: 0x2 22710122d040: 0000: 00000e1e 00000002 2272t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 22730122d048: 0000: c0003b00 00007fff 2274t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2275 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 22760122d050: 0000: c0012d00 00040307 00100020 2277t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2278 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 22790122d05c: 0000: c0012d00 00040308 000e0120 2280t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2281 VGT_MAX_VTX_INDX: 0xffffffff 2282 VGT_MIN_VTX_INDX: 0 22830122d068: 0000: c0022d00 00040100 ffffffff 00000000 2284t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2285 VGT_INDX_OFFSET: 0 22860122d078: 0000: c0012d00 00040102 00000000 2287t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2288 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 22890122d084: 0000: c0012d00 00040181 00000004 2290t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2291 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 22920122d090: 0000: c0012d00 00040182 ffffffff 2293t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2294 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 22950122d09c: 0000: c0012d00 00040301 00000000 2296t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2297 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 22980122d0a8: 0000: c0012d00 00040300 00000000 2299t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2300 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 23010122d0b4: 0000: c0012d00 00040080 00000000 2302t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2303 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 23040122d0c0: 0000: c0012d00 00040208 00000004 2305t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2306 RB_SAMPLE_POS: 0x88888888 23070122d0cc: 0000: c0012d00 0004020a 88888888 2308t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2309 RB_COLOR_DEST_MASK: 0xffffffff 23100122d0d8: 0000: c0012d00 00040326 ffffffff 2311t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2312 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 23130122d0e4: 0000: c0012d00 0004031b 0003c000 2314t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2315 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 2316 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 23170122d0f0: 0000: c0022d00 00040183 00000000 00000000 2318t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 23190122d100: 0000: c0004b00 00000000 2320t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 23210122d108: 0000: c0035200 000005d0 00000000 5f601000 00000001 2322t0 write SQ_INST_STORE_MANAGMENT (0d02) 2323 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 23240122d11c: 0000: 00000d02 00000180 2325t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 23260122d124: 0000: c0003b00 00000300 2327t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 23280122d12c: 0000: c0004a00 80000180 2329t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 23300122d13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 23310122d15c: 2.000000 0.750000 0.375000 0.250000 23320122d134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 23330122d154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 2334t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2335 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 23360122d16c: 0000: c0012d00 00040104 0000000f 2337t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2338 RB_BLEND_RED: 0 2339 RB_BLEND_GREEN: 0 2340 RB_BLEND_BLUE: 0 2341 RB_BLEND_ALPHA: 0xff 23420122d178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 2343t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2344 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 23450122d190: 0000: c0012d00 00040206 0000043f 2346t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2347 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 23480122d19c: 0000: c0012d00 00040000 00000020 2349t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2350 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x124c000 } 23510122d1a8: 0000: c0012d00 00040001 0124c009 2352t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2353 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 2354 PA_SC_SCREEN_SCISSOR_BR: { X = 1 | Y = 2 } 23550122d1b4: 0000: c0022d00 0004000e 80000000 00020001 2356t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2357 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 23580122d1c4: 0000: c0012d00 00040080 00000000 2359t0 write CP_SCRATCH_REG6 (057e) 2360 CP_SCRATCH_REG6: 45 2361 :0,0,45,36 23620122d1d0: 0000: 0000057e 0000002d 2363t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 2364 ibaddr:0122e000 2365 ibsize:000000b6 2366t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2367 set shader const 0078 23680122e000: 0000: c0042d00 00010078 0112d303 00100000 0112d303 00100000 2369t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2370 PA_SC_AA_MASK: 0xffff 23710122e018: 0000: c0012d00 00040312 0000ffff 2372t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2373 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 23740122e024: 0000: c0012d00 00040200 00000000 2375t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 2376 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2377 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2378 RB_ALPHA_REF: 0 23790122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 2380t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2381 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 2382 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 23830122e044: 0000: c0022d00 00040204 00000000 00090244 2384t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2385 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 2386 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 2387 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 2388 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 23890122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 2390t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 2391 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 2392 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 2393 PA_CL_GB_VERT_DISC_ADJ: 1.000000 2394 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 2395 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 23960122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 2397t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2398 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2399 PA_SC_WINDOW_SCISSOR_BR: { X = 1 | Y = 2 } 24000122e088: 0000: c0022d00 00040081 00000000 00020001 2401t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 2402 PA_CL_VPORT_XSCALE: 0.500000 2403 PA_CL_VPORT_XOFFSET: 0.500000 2404 PA_CL_VPORT_YSCALE: 1.000000 2405 PA_CL_VPORT_YOFFSET: 1.000000 2406 PA_CL_VPORT_ZSCALE: 0.000000 2407 PA_CL_VPORT_ZOFFSET: 0.000000 24080122e098: 0000: c0062d00 0004010f 3f000000 3f000000 3f800000 3f800000 00000000 00000000 2409t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 24100122e0c0: 0.500000 1.000000 0.000000 0.000000 0.500000 1.000000 0.000000 0.000000 24110122e0b8: 0000: c0082d00 00000184 3f000000 3f800000 00000000 00000000 3f000000 3f800000 2412* 2413t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 2414 vertex shader, start=0000, size=0015 2415 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 2416 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 2417 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 2418 0000 0000 c200 ALLOC POSITION SIZE(0x0) 2419 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 2420 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 2421 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 2422 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 2423 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 2424 0000 0000 0000 NOP 24250122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 24260122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 24270122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 2428t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 2429 fragment shader, start=0000, size=000c 2430 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 2431 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 2432 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 2433 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 2434 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 2435 0000 0000 0000 NOP 24360122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 24370122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 2438t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2439 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 24400122e17c: 0000: c0012d00 00040181 00000106 2441t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2442 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 24430122e188: 0000: c0012d00 00040180 10030002 2444t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 24450122e19c: 0.000000 0.000000 0.000000 0.000000 24460122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 2447t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2448 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 24490122e1ac: 0000: c0012d00 00040202 00000c20 2450t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2451 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 24520122e1b8: 0000: c0012d00 00040201 00000000 2453t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2454 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 24550122e1c4: 0000: c0012d00 00040104 0000000f 2456t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2457 RB_BLEND_RED: 0 2458 RB_BLEND_GREEN: 0 2459 RB_BLEND_BLUE: 0 2460 RB_BLEND_ALPHA: 0 24610122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 2462t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 2463 set texture const 0000 2464 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 2465 filter min/mag: point/point 2466 swizzle: xyzw 2467 addr=01254000 (flags=820), size=1x2, pitch=32, format=FMT_1_REVERSE 2468 mipaddr=00000000 (flags=200) 24690122e1e8: 0000: c0062d00 00010000 00424800 01254820 00002000 00000d11 00000000 00000200 2470t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2471 VGT_INDX_OFFSET: 0 24720122e208: 0000: c0012d00 00040102 00000000 2473t0 write TC_CNTL_STATUS (0e00) 2474 TC_CNTL_STATUS: { L2_INVALIDATE } 24750122e214: 0000: 00000e00 00000001 2476t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 24770122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 2478t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 24790122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 2480t0 write CP_SCRATCH_REG7 (057f) 2481 CP_SCRATCH_REG7: 41 2482 :0,0,45,41 24830122e24c: 0000: 0000057f 00000029 2484t3 opcode: CP_NOP (10) (2 dwords) 24850122e254: 0000: c0001000 00000000 2486t3 opcode: CP_DRAW_INDX (22) (3 dwords) 2487 { VIZ_QUERY = 0 } 2488 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 2489 draw: 0 2490 prim_type: DI_PT_TRIFAN (5) 2491 source_select: DI_SRC_SEL_AUTO_INDEX (2) 2492 num_indices: 1407 2493 draw[6] register values 2494 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 2495 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 2496 + 00000000 CP_PERFMON_CNTL: 0 2497!+ 0000002d CP_SCRATCH_REG6: 45 2498 :0,0,45,41 2499!+ 00000029 CP_SCRATCH_REG7: 41 2500 :0,0,45,41 2501 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 2502 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 2503 + 00000002 TP0_CHICKEN: 0x2 2504 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 2505 + 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 2506!+ 0124c009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x124c000 } 2507 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 2508!+ 00020001 PA_SC_SCREEN_SCISSOR_BR: { X = 1 | Y = 2 } 2509 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 2510 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2511!+ 00020001 PA_SC_WINDOW_SCISSOR_BR: { X = 1 | Y = 2 } 2512 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 2513 + 00000000 VGT_MIN_VTX_INDX: 0 2514 + 00000000 VGT_INDX_OFFSET: 0 2515 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 2516 + 00000000 RB_BLEND_RED: 0 2517 + 00000000 RB_BLEND_GREEN: 0 2518 + 00000000 RB_BLEND_BLUE: 0 2519 + 00000000 RB_BLEND_ALPHA: 0 2520 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2521 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2522 + 00000000 RB_ALPHA_REF: 0 2523!+ 3f000000 PA_CL_VPORT_XSCALE: 0.500000 2524!+ 3f000000 PA_CL_VPORT_XOFFSET: 0.500000 2525!+ 3f800000 PA_CL_VPORT_YSCALE: 1.000000 2526!+ 3f800000 PA_CL_VPORT_YOFFSET: 1.000000 2527 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 2528 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 2529 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 2530 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 2531 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 2532 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 2533 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 2534 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 2535 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 2536 + 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 2537 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 2538 + 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 2539 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 2540 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 2541 + 88888888 RB_SAMPLE_POS: 0x88888888 2542 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 2543 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 2544 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 2545 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 2546 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 2547 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 2548 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 2549 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 2550 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 2551 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 2552 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 2553 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 2554 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 2555 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 2556 + 0000ffff PA_SC_AA_MASK: 0xffff 2557 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 2558 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 2559 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 2560 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 25610122e25c: 0000: c0012200 00000000 00040085 2562t0 write CP_SCRATCH_REG7 (057f) 2563NEEDS WFI: CP_SCRATCH_REG7 (57f) 2564 CP_SCRATCH_REG7: 42 2565 :0,0,45,42 25660122e268: 0000: 0000057f 0000002a 2567t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 25680122e270: 0000: c0002600 00000000 2569t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2570 { EVENT = CACHE_FLUSH } 2571 event CACHE_FLUSH 25720122e278: 0000: c0004600 00000006 2573t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2574 { EVENT = CACHE_FLUSH } 2575 event CACHE_FLUSH 25760122e280: 0000: c0004600 00000006 2577t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2578 { EVENT = CACHE_FLUSH } 2579 event CACHE_FLUSH 25800122e288: 0000: c0004600 00000006 2581t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2582 { EVENT = CACHE_FLUSH } 2583 event CACHE_FLUSH 25840122e290: 0000: c0004600 00000006 2585t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2586 { EVENT = CACHE_FLUSH } 2587 event CACHE_FLUSH 25880122e298: 0000: c0004600 00000006 2589t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2590 { EVENT = CACHE_FLUSH } 2591 event CACHE_FLUSH 25920122e2a0: 0000: c0004600 00000006 2593t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2594 { EVENT = CACHE_FLUSH } 2595 event CACHE_FLUSH 25960122e2a8: 0000: c0004600 00000006 2597t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2598 { EVENT = CACHE_FLUSH } 2599 event CACHE_FLUSH 26000122e2b0: 0000: c0004600 00000006 2601t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2602 { EVENT = CACHE_FLUSH } 2603 event CACHE_FLUSH 26040122e2b8: 0000: c0004600 00000006 2605t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2606 { EVENT = CACHE_FLUSH } 2607 event CACHE_FLUSH 26080122e2c0: 0000: c0004600 00000006 2609t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2610 { EVENT = CACHE_FLUSH } 2611 event CACHE_FLUSH 26120122e2c8: 0000: c0004600 00000006 2613t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2614 { EVENT = CACHE_FLUSH } 2615 event CACHE_FLUSH 26160122e2d0: 0000: c0004600 00000006 26170122d1d8: 0000: c0013700 0122e000 000000b6 2618t2 nop 2619############################################################ 2620vertices: 0 2621cmd: deqp-gles2/185: fence=1257 2622############################################################ 2623cmdstream: 124 dwords 2624t0 write RB_BC_CONTROL (0f01) 2625 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 26260122f000: 0000: 00000f01 1c004046 2627t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2628 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 26290122f008: 0000: c0012d00 00040293 00000020 2630t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2631 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 26320122f014: 0000: c0012d00 00040316 00000002 2633t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2634 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 26350122f020: 0000: c0012d00 00040317 00000002 2636t0 write CP_PERFMON_CNTL (0444) 2637 CP_PERFMON_CNTL: 0 26380122f02c: 0000: 00000444 00000000 2639t0 write RBBM_PM_OVERRIDE1 (039c) 2640 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 2641 RBBM_PM_OVERRIDE2: 0xfff 26420122f034: 0000: 0001039c ffffffff 00000fff 2643t0 write TP0_CHICKEN (0e1e) 2644 TP0_CHICKEN: 0x2 26450122f040: 0000: 00000e1e 00000002 2646t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 26470122f048: 0000: c0003b00 00007fff 2648t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2649 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 26500122f050: 0000: c0012d00 00040307 00100020 2651t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2652 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 26530122f05c: 0000: c0012d00 00040308 000e0120 2654t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2655 VGT_MAX_VTX_INDX: 0xffffffff 2656 VGT_MIN_VTX_INDX: 0 26570122f068: 0000: c0022d00 00040100 ffffffff 00000000 2658t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2659 VGT_INDX_OFFSET: 0 26600122f078: 0000: c0012d00 00040102 00000000 2661t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2662 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 26630122f084: 0000: c0012d00 00040181 00000004 2664t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2665 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 26660122f090: 0000: c0012d00 00040182 ffffffff 2667t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2668 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 26690122f09c: 0000: c0012d00 00040301 00000000 2670t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2671 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 26720122f0a8: 0000: c0012d00 00040300 00000000 2673t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2674 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 26750122f0b4: 0000: c0012d00 00040080 00000000 2676t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2677 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 26780122f0c0: 0000: c0012d00 00040208 00000004 2679t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2680 RB_SAMPLE_POS: 0x88888888 26810122f0cc: 0000: c0012d00 0004020a 88888888 2682t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2683 RB_COLOR_DEST_MASK: 0xffffffff 26840122f0d8: 0000: c0012d00 00040326 ffffffff 2685t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2686 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 26870122f0e4: 0000: c0012d00 0004031b 0003c000 2688t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2689 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 2690 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 26910122f0f0: 0000: c0022d00 00040183 00000000 00000000 2692t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 26930122f100: 0000: c0004b00 00000000 2694t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 26950122f108: 0000: c0035200 000005d0 00000000 5f601000 00000001 2696t0 write SQ_INST_STORE_MANAGMENT (0d02) 2697 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 26980122f11c: 0000: 00000d02 00000180 2699t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 27000122f124: 0000: c0003b00 00000300 2701t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 27020122f12c: 0000: c0004a00 80000180 2703t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 27040122f13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 27050122f15c: 2.000000 0.750000 0.375000 0.250000 27060122f134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 27070122f154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 2708t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2709 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 27100122f16c: 0000: c0012d00 00040104 0000000f 2711t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2712 RB_BLEND_RED: 0 2713 RB_BLEND_GREEN: 0 2714 RB_BLEND_BLUE: 0 2715 RB_BLEND_ALPHA: 0xff 27160122f178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 2717t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2718 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 27190122f190: 0000: c0012d00 00040206 0000043f 2720t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2721 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 27220122f19c: 0000: c0012d00 00040000 00000020 2723t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2724 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x124e000 } 27250122f1a8: 0000: c0012d00 00040001 0124e009 2726t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2727 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 2728 PA_SC_SCREEN_SCISSOR_BR: { X = 1 | Y = 1 } 27290122f1b4: 0000: c0022d00 0004000e 80000000 00010001 2730t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2731 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 27320122f1c4: 0000: c0012d00 00040080 00000000 2733t0 write CP_SCRATCH_REG6 (057e) 2734 CP_SCRATCH_REG6: 51 2735 :0,0,51,42 27360122f1d0: 0000: 0000057e 00000033 2737t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 2738 ibaddr:0122e000 2739 ibsize:000000b6 2740t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2741 set shader const 0078 27420122e000: 0000: c0042d00 00010078 0112d383 00100000 0112d383 00100000 2743t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2744 PA_SC_AA_MASK: 0xffff 27450122e018: 0000: c0012d00 00040312 0000ffff 2746t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2747 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 27480122e024: 0000: c0012d00 00040200 00000000 2749t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 2750 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2751 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2752 RB_ALPHA_REF: 0 27530122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 2754t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2755 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 2756 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 27570122e044: 0000: c0022d00 00040204 00000000 00090244 2758t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2759 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 2760 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 2761 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 2762 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 27630122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 2764t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 2765 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 2766 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 2767 PA_CL_GB_VERT_DISC_ADJ: 1.000000 2768 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 2769 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 27700122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 2771t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 2772 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2773 PA_SC_WINDOW_SCISSOR_BR: { X = 1 | Y = 1 } 27740122e088: 0000: c0022d00 00040081 00000000 00010001 2775t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 2776 PA_CL_VPORT_XSCALE: 0.500000 2777 PA_CL_VPORT_XOFFSET: 0.500000 2778 PA_CL_VPORT_YSCALE: 0.500000 2779 PA_CL_VPORT_YOFFSET: 0.500000 2780 PA_CL_VPORT_ZSCALE: 0.000000 2781 PA_CL_VPORT_ZOFFSET: 0.000000 27820122e098: 0000: c0062d00 0004010f 3f000000 3f000000 3f000000 3f000000 00000000 00000000 2783t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 27840122e0c0: 0.500000 0.500000 0.000000 0.000000 0.500000 0.500000 0.000000 0.000000 27850122e0b8: 0000: c0082d00 00000184 3f000000 3f000000 00000000 00000000 3f000000 3f000000 2786* 2787t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 2788 vertex shader, start=0000, size=0015 2789 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 2790 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 2791 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 2792 0000 0000 c200 ALLOC POSITION SIZE(0x0) 2793 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 2794 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 2795 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 2796 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 2797 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 2798 0000 0000 0000 NOP 27990122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 28000122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 28010122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 2802t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 2803 fragment shader, start=0000, size=000c 2804 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 2805 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 2806 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 2807 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 2808 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 2809 0000 0000 0000 NOP 28100122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 28110122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 2812t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2813 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 28140122e17c: 0000: c0012d00 00040181 00000106 2815t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2816 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 28170122e188: 0000: c0012d00 00040180 10030002 2818t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 28190122e19c: 0.000000 0.000000 0.000000 0.000000 28200122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 2821t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2822 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 28230122e1ac: 0000: c0012d00 00040202 00000c20 2824t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2825 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 28260122e1b8: 0000: c0012d00 00040201 00000000 2827t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2828 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 28290122e1c4: 0000: c0012d00 00040104 0000000f 2830t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 2831 RB_BLEND_RED: 0 2832 RB_BLEND_GREEN: 0 2833 RB_BLEND_BLUE: 0 2834 RB_BLEND_ALPHA: 0 28350122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 2836t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 2837 set texture const 0000 2838 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 2839 filter min/mag: point/point 2840 swizzle: xyzw 2841 addr=01254000 (flags=820), size=1x1, pitch=32, format=FMT_1_REVERSE 2842 mipaddr=00000000 (flags=200) 28430122e1e8: 0000: c0062d00 00010000 00424800 01254820 00000000 00000d11 00000000 00000200 2844t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 2845 VGT_INDX_OFFSET: 0 28460122e208: 0000: c0012d00 00040102 00000000 2847t0 write TC_CNTL_STATUS (0e00) 2848 TC_CNTL_STATUS: { L2_INVALIDATE } 28490122e214: 0000: 00000e00 00000001 2850t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 28510122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 2852t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 28530122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 2854t0 write CP_SCRATCH_REG7 (057f) 2855 CP_SCRATCH_REG7: 47 2856 :0,0,51,47 28570122e24c: 0000: 0000057f 0000002f 2858t3 opcode: CP_NOP (10) (2 dwords) 28590122e254: 0000: c0001000 00000000 2860t3 opcode: CP_DRAW_INDX (22) (3 dwords) 2861 { VIZ_QUERY = 0 } 2862 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 2863 draw: 0 2864 prim_type: DI_PT_TRIFAN (5) 2865 source_select: DI_SRC_SEL_AUTO_INDEX (2) 2866 num_indices: 1407 2867 draw[7] register values 2868 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 2869 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 2870 + 00000000 CP_PERFMON_CNTL: 0 2871!+ 00000033 CP_SCRATCH_REG6: 51 2872 :0,0,51,47 2873!+ 0000002f CP_SCRATCH_REG7: 47 2874 :0,0,51,47 2875 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 2876 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 2877 + 00000002 TP0_CHICKEN: 0x2 2878 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 2879 + 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 2880!+ 0124e009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x124e000 } 2881 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 2882!+ 00010001 PA_SC_SCREEN_SCISSOR_BR: { X = 1 | Y = 1 } 2883 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 2884 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 2885!+ 00010001 PA_SC_WINDOW_SCISSOR_BR: { X = 1 | Y = 1 } 2886 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 2887 + 00000000 VGT_MIN_VTX_INDX: 0 2888 + 00000000 VGT_INDX_OFFSET: 0 2889 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 2890 + 00000000 RB_BLEND_RED: 0 2891 + 00000000 RB_BLEND_GREEN: 0 2892 + 00000000 RB_BLEND_BLUE: 0 2893 + 00000000 RB_BLEND_ALPHA: 0 2894 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2895 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 2896 + 00000000 RB_ALPHA_REF: 0 2897 + 3f000000 PA_CL_VPORT_XSCALE: 0.500000 2898 + 3f000000 PA_CL_VPORT_XOFFSET: 0.500000 2899!+ 3f000000 PA_CL_VPORT_YSCALE: 0.500000 2900!+ 3f000000 PA_CL_VPORT_YOFFSET: 0.500000 2901 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 2902 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 2903 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 2904 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 2905 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 2906 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 2907 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 2908 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 2909 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 2910 + 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 2911 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 2912 + 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 2913 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 2914 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 2915 + 88888888 RB_SAMPLE_POS: 0x88888888 2916 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 2917 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 2918 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 2919 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 2920 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 2921 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 2922 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 2923 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 2924 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 2925 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 2926 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 2927 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 2928 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 2929 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 2930 + 0000ffff PA_SC_AA_MASK: 0xffff 2931 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 2932 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 2933 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 2934 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 29350122e25c: 0000: c0012200 00000000 00040085 2936t0 write CP_SCRATCH_REG7 (057f) 2937NEEDS WFI: CP_SCRATCH_REG7 (57f) 2938 CP_SCRATCH_REG7: 48 2939 :0,0,51,48 29400122e268: 0000: 0000057f 00000030 2941t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 29420122e270: 0000: c0002600 00000000 2943t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2944 { EVENT = CACHE_FLUSH } 2945 event CACHE_FLUSH 29460122e278: 0000: c0004600 00000006 2947t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2948 { EVENT = CACHE_FLUSH } 2949 event CACHE_FLUSH 29500122e280: 0000: c0004600 00000006 2951t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2952 { EVENT = CACHE_FLUSH } 2953 event CACHE_FLUSH 29540122e288: 0000: c0004600 00000006 2955t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2956 { EVENT = CACHE_FLUSH } 2957 event CACHE_FLUSH 29580122e290: 0000: c0004600 00000006 2959t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2960 { EVENT = CACHE_FLUSH } 2961 event CACHE_FLUSH 29620122e298: 0000: c0004600 00000006 2963t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2964 { EVENT = CACHE_FLUSH } 2965 event CACHE_FLUSH 29660122e2a0: 0000: c0004600 00000006 2967t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2968 { EVENT = CACHE_FLUSH } 2969 event CACHE_FLUSH 29700122e2a8: 0000: c0004600 00000006 2971t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2972 { EVENT = CACHE_FLUSH } 2973 event CACHE_FLUSH 29740122e2b0: 0000: c0004600 00000006 2975t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2976 { EVENT = CACHE_FLUSH } 2977 event CACHE_FLUSH 29780122e2b8: 0000: c0004600 00000006 2979t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2980 { EVENT = CACHE_FLUSH } 2981 event CACHE_FLUSH 29820122e2c0: 0000: c0004600 00000006 2983t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2984 { EVENT = CACHE_FLUSH } 2985 event CACHE_FLUSH 29860122e2c8: 0000: c0004600 00000006 2987t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 2988 { EVENT = CACHE_FLUSH } 2989 event CACHE_FLUSH 29900122e2d0: 0000: c0004600 00000006 29910122f1d8: 0000: c0013700 0122e000 000000b6 2992t2 nop 2993############################################################ 2994vertices: 0 2995cmd: deqp-gles2/185: fence=1258 2996############################################################ 2997cmdstream: 124 dwords 2998t0 write RB_BC_CONTROL (0f01) 2999 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 30000122d000: 0000: 00000f01 1c004046 3001t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3002 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 30030122d008: 0000: c0012d00 00040293 00000020 3004t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3005 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 30060122d014: 0000: c0012d00 00040316 00000002 3007t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3008 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 30090122d020: 0000: c0012d00 00040317 00000002 3010t0 write CP_PERFMON_CNTL (0444) 3011 CP_PERFMON_CNTL: 0 30120122d02c: 0000: 00000444 00000000 3013t0 write RBBM_PM_OVERRIDE1 (039c) 3014 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 3015 RBBM_PM_OVERRIDE2: 0xfff 30160122d034: 0000: 0001039c ffffffff 00000fff 3017t0 write TP0_CHICKEN (0e1e) 3018 TP0_CHICKEN: 0x2 30190122d040: 0000: 00000e1e 00000002 3020t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 30210122d048: 0000: c0003b00 00007fff 3022t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3023 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 30240122d050: 0000: c0012d00 00040307 00100020 3025t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3026 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 30270122d05c: 0000: c0012d00 00040308 000e0120 3028t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3029 VGT_MAX_VTX_INDX: 0xffffffff 3030 VGT_MIN_VTX_INDX: 0 30310122d068: 0000: c0022d00 00040100 ffffffff 00000000 3032t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3033 VGT_INDX_OFFSET: 0 30340122d078: 0000: c0012d00 00040102 00000000 3035t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3036 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 30370122d084: 0000: c0012d00 00040181 00000004 3038t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3039 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 30400122d090: 0000: c0012d00 00040182 ffffffff 3041t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3042 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 30430122d09c: 0000: c0012d00 00040301 00000000 3044t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3045 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 30460122d0a8: 0000: c0012d00 00040300 00000000 3047t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3048 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 30490122d0b4: 0000: c0012d00 00040080 00000000 3050t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3051 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 30520122d0c0: 0000: c0012d00 00040208 00000004 3053t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3054 RB_SAMPLE_POS: 0x88888888 30550122d0cc: 0000: c0012d00 0004020a 88888888 3056t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3057 RB_COLOR_DEST_MASK: 0xffffffff 30580122d0d8: 0000: c0012d00 00040326 ffffffff 3059t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3060 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 30610122d0e4: 0000: c0012d00 0004031b 0003c000 3062t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3063 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 3064 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 30650122d0f0: 0000: c0022d00 00040183 00000000 00000000 3066t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 30670122d100: 0000: c0004b00 00000000 3068t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 30690122d108: 0000: c0035200 000005d0 00000000 5f601000 00000001 3070t0 write SQ_INST_STORE_MANAGMENT (0d02) 3071 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 30720122d11c: 0000: 00000d02 00000180 3073t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 30740122d124: 0000: c0003b00 00000300 3075t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 30760122d12c: 0000: c0004a00 80000180 3077t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 30780122d13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 30790122d15c: 2.000000 0.750000 0.375000 0.250000 30800122d134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 30810122d154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 3082t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3083 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 30840122d16c: 0000: c0012d00 00040104 0000000f 3085t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 3086 RB_BLEND_RED: 0 3087 RB_BLEND_GREEN: 0 3088 RB_BLEND_BLUE: 0 3089 RB_BLEND_ALPHA: 0xff 30900122d178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 3091t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3092 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 30930122d190: 0000: c0012d00 00040206 0000043f 3094t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3095 RB_SURFACE_INFO: { SURFACE_PITCH = 64 | MSAA_SAMPLES = 0 } 30960122d19c: 0000: c0012d00 00040000 00000040 3097t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3098 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1230000 } 30990122d1a8: 0000: c0012d00 00040001 01230009 3100t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3101 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 3102 PA_SC_SCREEN_SCISSOR_BR: { X = 64 | Y = 128 } 31030122d1b4: 0000: c0022d00 0004000e 80000000 00800040 3104t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3105 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 31060122d1c4: 0000: c0012d00 00040080 00000000 3107t0 write CP_SCRATCH_REG6 (057e) 3108 CP_SCRATCH_REG6: 57 3109 :0,0,57,48 31100122d1d0: 0000: 0000057e 00000039 3111t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 3112 ibaddr:0122e000 3113 ibsize:000000b6 3114t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 3115 set shader const 0078 31160122e000: 0000: c0042d00 00010078 0112d403 00100000 0112d403 00100000 3117t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3118 PA_SC_AA_MASK: 0xffff 31190122e018: 0000: c0012d00 00040312 0000ffff 3120t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3121 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 31220122e024: 0000: c0012d00 00040200 00000000 3123t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 3124 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 3125 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 3126 RB_ALPHA_REF: 0 31270122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 3128t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3129 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 3130 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 31310122e044: 0000: c0022d00 00040204 00000000 00090244 3132t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 3133 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 3134 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 3135 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 3136 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 31370122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 3138t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 3139 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 3140 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 3141 PA_CL_GB_VERT_DISC_ADJ: 1.000000 3142 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 3143 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 31440122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 3145t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3146 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3147 PA_SC_WINDOW_SCISSOR_BR: { X = 64 | Y = 128 } 31480122e088: 0000: c0022d00 00040081 00000000 00800040 3149t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 3150 PA_CL_VPORT_XSCALE: 32.000000 3151 PA_CL_VPORT_XOFFSET: 32.000000 3152 PA_CL_VPORT_YSCALE: 64.000000 3153 PA_CL_VPORT_YOFFSET: 64.000000 3154 PA_CL_VPORT_ZSCALE: 0.000000 3155 PA_CL_VPORT_ZOFFSET: 0.000000 31560122e098: 0000: c0062d00 0004010f 42000000 42000000 42800000 42800000 00000000 00000000 3157t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 31580122e0c0: 32.000000 64.000000 0.000000 0.000000 32.000000 64.000000 0.000000 0.000000 31590122e0b8: 0000: c0082d00 00000184 42000000 42800000 00000000 00000000 42000000 42800000 3160* 3161t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 3162 vertex shader, start=0000, size=0015 3163 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 3164 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 3165 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 3166 0000 0000 c200 ALLOC POSITION SIZE(0x0) 3167 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 3168 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 3169 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 3170 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 3171 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 3172 0000 0000 0000 NOP 31730122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 31740122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 31750122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 3176t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 3177 fragment shader, start=0000, size=000c 3178 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 3179 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 3180 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 3181 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 3182 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 3183 0000 0000 0000 NOP 31840122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 31850122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 3186t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3187 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 31880122e17c: 0000: c0012d00 00040181 00000106 3189t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3190 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 31910122e188: 0000: c0012d00 00040180 10030002 3192t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 31930122e19c: 0.000000 0.000000 0.000000 0.000000 31940122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 3195t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3196 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 31970122e1ac: 0000: c0012d00 00040202 00000c20 3198t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3199 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 32000122e1b8: 0000: c0012d00 00040201 00000000 3201t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3202 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 32030122e1c4: 0000: c0012d00 00040104 0000000f 3204t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 3205 RB_BLEND_RED: 0 3206 RB_BLEND_GREEN: 0 3207 RB_BLEND_BLUE: 0 3208 RB_BLEND_ALPHA: 0 32090122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 3210t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 3211 set texture const 0000 3212 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 3213 filter min/mag: point/point 3214 swizzle: xyzw 3215 addr=0110d000 (flags=820), size=64x128, pitch=16448, format=FMT_1_REVERSE 3216 mipaddr=00000000 (flags=200) 32170122e1e8: 0000: c0062d00 00010000 80824800 0110d820 000fe03f 00000d11 00000000 00000200 3218t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3219 VGT_INDX_OFFSET: 0 32200122e208: 0000: c0012d00 00040102 00000000 3221t0 write TC_CNTL_STATUS (0e00) 3222 TC_CNTL_STATUS: { L2_INVALIDATE } 32230122e214: 0000: 00000e00 00000001 3224t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 32250122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 3226t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 32270122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 3228t0 write CP_SCRATCH_REG7 (057f) 3229 CP_SCRATCH_REG7: 53 3230 :0,0,57,53 32310122e24c: 0000: 0000057f 00000035 3232t3 opcode: CP_NOP (10) (2 dwords) 32330122e254: 0000: c0001000 00000000 3234t3 opcode: CP_DRAW_INDX (22) (3 dwords) 3235 { VIZ_QUERY = 0 } 3236 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 3237 draw: 0 3238 prim_type: DI_PT_TRIFAN (5) 3239 source_select: DI_SRC_SEL_AUTO_INDEX (2) 3240 num_indices: 1407 3241 draw[8] register values 3242 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 3243 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 3244 + 00000000 CP_PERFMON_CNTL: 0 3245!+ 00000039 CP_SCRATCH_REG6: 57 3246 :0,0,57,53 3247!+ 00000035 CP_SCRATCH_REG7: 53 3248 :0,0,57,53 3249 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 3250 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 3251 + 00000002 TP0_CHICKEN: 0x2 3252 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 3253!+ 00000040 RB_SURFACE_INFO: { SURFACE_PITCH = 64 | MSAA_SAMPLES = 0 } 3254!+ 01230009 RB_COLOR_INFO: { FORMAT = COLORX_16_16_16_16_FLOAT | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x1230000 } 3255 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 3256!+ 00800040 PA_SC_SCREEN_SCISSOR_BR: { X = 64 | Y = 128 } 3257 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 3258 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3259!+ 00800040 PA_SC_WINDOW_SCISSOR_BR: { X = 64 | Y = 128 } 3260 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 3261 + 00000000 VGT_MIN_VTX_INDX: 0 3262 + 00000000 VGT_INDX_OFFSET: 0 3263 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 3264 + 00000000 RB_BLEND_RED: 0 3265 + 00000000 RB_BLEND_GREEN: 0 3266 + 00000000 RB_BLEND_BLUE: 0 3267 + 00000000 RB_BLEND_ALPHA: 0 3268 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 3269 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 3270 + 00000000 RB_ALPHA_REF: 0 3271!+ 42000000 PA_CL_VPORT_XSCALE: 32.000000 3272!+ 42000000 PA_CL_VPORT_XOFFSET: 32.000000 3273!+ 42800000 PA_CL_VPORT_YSCALE: 64.000000 3274!+ 42800000 PA_CL_VPORT_YOFFSET: 64.000000 3275 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 3276 + 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 3277 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 3278 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 3279 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 3280 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 3281 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 3282 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 3283 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 3284 + 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 3285 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 3286 + 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 3287 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 3288 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 3289 + 88888888 RB_SAMPLE_POS: 0x88888888 3290 + 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 3291 + 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 3292 + 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 3293 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 3294 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 3295 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 3296 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 3297 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 3298 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 3299 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 3300 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 3301 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 3302 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 3303 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 3304 + 0000ffff PA_SC_AA_MASK: 0xffff 3305 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 3306 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 3307 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 3308 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 33090122e25c: 0000: c0012200 00000000 00040085 3310t0 write CP_SCRATCH_REG7 (057f) 3311NEEDS WFI: CP_SCRATCH_REG7 (57f) 3312 CP_SCRATCH_REG7: 54 3313 :0,0,57,54 33140122e268: 0000: 0000057f 00000036 3315t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 33160122e270: 0000: c0002600 00000000 3317t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3318 { EVENT = CACHE_FLUSH } 3319 event CACHE_FLUSH 33200122e278: 0000: c0004600 00000006 3321t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3322 { EVENT = CACHE_FLUSH } 3323 event CACHE_FLUSH 33240122e280: 0000: c0004600 00000006 3325t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3326 { EVENT = CACHE_FLUSH } 3327 event CACHE_FLUSH 33280122e288: 0000: c0004600 00000006 3329t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3330 { EVENT = CACHE_FLUSH } 3331 event CACHE_FLUSH 33320122e290: 0000: c0004600 00000006 3333t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3334 { EVENT = CACHE_FLUSH } 3335 event CACHE_FLUSH 33360122e298: 0000: c0004600 00000006 3337t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3338 { EVENT = CACHE_FLUSH } 3339 event CACHE_FLUSH 33400122e2a0: 0000: c0004600 00000006 3341t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3342 { EVENT = CACHE_FLUSH } 3343 event CACHE_FLUSH 33440122e2a8: 0000: c0004600 00000006 3345t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3346 { EVENT = CACHE_FLUSH } 3347 event CACHE_FLUSH 33480122e2b0: 0000: c0004600 00000006 3349t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3350 { EVENT = CACHE_FLUSH } 3351 event CACHE_FLUSH 33520122e2b8: 0000: c0004600 00000006 3353t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3354 { EVENT = CACHE_FLUSH } 3355 event CACHE_FLUSH 33560122e2c0: 0000: c0004600 00000006 3357t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3358 { EVENT = CACHE_FLUSH } 3359 event CACHE_FLUSH 33600122e2c8: 0000: c0004600 00000006 3361t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3362 { EVENT = CACHE_FLUSH } 3363 event CACHE_FLUSH 33640122e2d0: 0000: c0004600 00000006 33650122d1d8: 0000: c0013700 0122e000 000000b6 3366t2 nop 3367############################################################ 3368vertices: 0 3369cmd: deqp-gles2/185: fence=1259 3370############################################################ 3371cmdstream: 340 dwords 3372t0 write RB_BC_CONTROL (0f01) 3373 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 33740110a000: 0000: 00000f01 1c004046 3375t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3376 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 33770110a008: 0000: c0012d00 00040293 00000020 3378t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3379 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 33800110a014: 0000: c0012d00 00040316 00000002 3381t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3382 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 33830110a020: 0000: c0012d00 00040317 00000002 3384t0 write CP_PERFMON_CNTL (0444) 3385 CP_PERFMON_CNTL: 0 33860110a02c: 0000: 00000444 00000000 3387t0 write RBBM_PM_OVERRIDE1 (039c) 3388 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 3389 RBBM_PM_OVERRIDE2: 0xfff 33900110a034: 0000: 0001039c ffffffff 00000fff 3391t0 write TP0_CHICKEN (0e1e) 3392 TP0_CHICKEN: 0x2 33930110a040: 0000: 00000e1e 00000002 3394t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 33950110a048: 0000: c0003b00 00007fff 3396t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3397 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 33980110a050: 0000: c0012d00 00040307 00100020 3399t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3400 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 34010110a05c: 0000: c0012d00 00040308 000e0120 3402t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3403 VGT_MAX_VTX_INDX: 0xffffffff 3404 VGT_MIN_VTX_INDX: 0 34050110a068: 0000: c0022d00 00040100 ffffffff 00000000 3406t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3407 VGT_INDX_OFFSET: 0 34080110a078: 0000: c0012d00 00040102 00000000 3409t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3410 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 34110110a084: 0000: c0012d00 00040181 00000004 3412t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3413 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 34140110a090: 0000: c0012d00 00040182 ffffffff 3415t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3416 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 34170110a09c: 0000: c0012d00 00040301 00000000 3418t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3419 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 34200110a0a8: 0000: c0012d00 00040300 00000000 3421t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3422 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 34230110a0b4: 0000: c0012d00 00040080 00000000 3424t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3425 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 34260110a0c0: 0000: c0012d00 00040208 00000004 3427t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3428 RB_SAMPLE_POS: 0x88888888 34290110a0cc: 0000: c0012d00 0004020a 88888888 3430t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3431 RB_COLOR_DEST_MASK: 0xffffffff 34320110a0d8: 0000: c0012d00 00040326 ffffffff 3433t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3434 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 34350110a0e4: 0000: c0012d00 0004031b 0003c000 3436t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3437 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 3438 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 34390110a0f0: 0000: c0022d00 00040183 00000000 00000000 3440t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 34410110a100: 0000: c0004b00 00000000 3442t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 34430110a108: 0000: c0035200 000005d0 00000000 5f601000 00000001 3444t0 write SQ_INST_STORE_MANAGMENT (0d02) 3445 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 34460110a11c: 0000: 00000d02 00000180 3447t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 34480110a124: 0000: c0003b00 00000300 3449t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 34500110a12c: 0000: c0004a00 80000180 3451t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 34520110a13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 34530110a15c: 2.000000 0.750000 0.375000 0.250000 34540110a134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 34550110a154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 3456t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3457 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 34580110a16c: 0000: c0012d00 00040104 0000000f 3459t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 3460 RB_BLEND_RED: 0 3461 RB_BLEND_GREEN: 0 3462 RB_BLEND_BLUE: 0 3463 RB_BLEND_ALPHA: 0xff 34640110a178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 3465t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3466 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 34670110a190: 0000: c0012d00 00040206 0000043f 3468t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 3469 RB_SURFACE_INFO: { SURFACE_PITCH = 128 | MSAA_SAMPLES = 0 } 3470 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 3471 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 65536 } 34720110a19c: 0000: c0032d00 00040000 00000080 00000205 00010001 3473t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3474 VGT_CURRENT_BIN_ID_MIN: { COLUMN = 0 | ROW = 0 | GUARD_BAND_MASK = 0 } 34750110a1b0: 0000: c0012d00 00040207 00000000 3476t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3477 VGT_CURRENT_BIN_ID_MAX: { COLUMN = 0 | ROW = 0 | GUARD_BAND_MASK = 0 } 34780110a1bc: 0000: c0012d00 00040203 00000000 3479t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 34800110a1d0: 3.069580 0.000000 8441856.000000 8454144.000000 34810110a1c8: 0000: c0042d00 0000000c 40447400 00000000 4b00d000 4b010000 3482t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 34830110a1e8: 0.125490 0.125490 0.500000 0.000000 0.000980 0.000980 0.000000 0.000000 34840110a1e0: 0000: c0082d00 0000018c 3e008081 3e008081 3f000000 00000000 3a808081 3a808081 3485* 3486t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3487 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 0 } 34880110a208: 0000: c0012d00 00040316 00000000 3489t0 write CP_SCRATCH_REG6 (057e) 3490 CP_SCRATCH_REG6: 67 3491 :0,0,67,54 34920110a214: 0000: 0000057e 00000043 3493t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 3494 ibaddr:0110c000 3495 ibsize:000000c5 3496t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 3497 set shader const 0078 34980110c000: 0000: c0042d00 00010078 0112d483 00100000 0112d4c3 00100000 3499t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (102 dwords) 3500 vertex shader, start=0000, size=0063 3501 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 3502 100b 0003 1000 EXEC ADDR(0xb) CNT(0x1) 3503 0b: 19480000 00262688 00000010 (S)FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(16) CONST(20, 0) 3504 400c 0002 1000 EXEC ADDR(0xc) CNT(0x4) 3505 0c: 00010001 00036c00 82000000 (S)ALU: MAXv R1.x___ = R0.wyzw, C0.xxxx 3506 0d: 4c110302 0000006c 60400201 ALU: ADDv R2.x___ = C0, R2 3507 RECIP_IEEE R3.x___ = R1.xxxx 3508 0e: 000f0004 00006c00 c1000300 ALU: MULv R4 = R0, R3.xxxx 3509 0f: 000f0005 00000000 4b420441 ALU: MULADDv R5 = C1, C2, R4 3510 0000 0000 c200 ALLOC POSITION SIZE(0x0) 3511 1010 0000 1000 EXEC ADDR(0x10) CNT(0x1) 3512 10: 000f803e 00000000 c2000000 ALU: MAXv export62 = R0, R0 ; gl_Position 3513 0000 0000 c600 ALLOC MEMORY SIZE(0x0) 3514 2011 0000 2000 EXEC_END ADDR(0x11) CNT(0x2) 3515 11: 000f8020 20136c00 4b010203 ALU: MULADDv export32 = C3, C1.wyww, R2.xxxx 3516 12: 000f8021 00000000 4b440543 ALU: MULADDv export33 = C3, C4, R5 3517 0000 0000 c600 ALLOC MEMORY SIZE(0x0) 3518 2013 0000 1000 EXEC ADDR(0x13) CNT(0x2) 3519 13: 000f8020 20136c00 4b010204 ALU: MULADDv export32 = C4, C1.wyww, R2.xxxx 3520 14: 000f8021 00000000 4b460545 ALU: MULADDv export33 = C5, C6, R5 3521 0000 0000 c600 ALLOC MEMORY SIZE(0x0) 3522 2015 0000 1000 EXEC ADDR(0x15) CNT(0x2) 3523 15: 000f8020 20136c00 4b010205 ALU: MULADDv export32 = C5, C1.wyww, R2.xxxx 3524 16: 000f8021 00000000 4b480547 ALU: MULADDv export33 = C7, C8, R5 3525 0000 0000 c600 ALLOC MEMORY SIZE(0x0) 3526 2017 0000 1000 EXEC ADDR(0x17) CNT(0x2) 3527 17: 000f8020 20136c00 4b010206 ALU: MULADDv export32 = C6, C1.wyww, R2.xxxx 3528 18: 000f8021 00000000 4b4a0549 ALU: MULADDv export33 = C9, C10, R5 3529 0000 0000 c600 ALLOC MEMORY SIZE(0x0) 3530 2019 0000 1000 EXEC ADDR(0x19) CNT(0x2) 3531 19: 000f8020 20136c00 4b010207 ALU: MULADDv export32 = C7, C1.wyww, R2.xxxx 3532 1a: 000f8021 00000000 4b4c054b ALU: MULADDv export33 = C11, C12, R5 3533 0000 0000 c600 ALLOC MEMORY SIZE(0x0) 3534 201b 0000 1000 EXEC ADDR(0x1b) CNT(0x2) 3535 1b: 000f8020 20136c00 4b010208 ALU: MULADDv export32 = C8, C1.wyww, R2.xxxx 3536 1c: 000f8021 00000000 4b4e054d ALU: MULADDv export33 = C13, C14, R5 3537 0000 0000 c600 ALLOC MEMORY SIZE(0x0) 3538 201d 0000 1000 EXEC ADDR(0x1d) CNT(0x2) 3539 1d: 000f8020 20136c00 4b010209 ALU: MULADDv export32 = C9, C1.wyww, R2.xxxx 3540 1e: 000f8021 00000000 4b50054f ALU: MULADDv export33 = C15, C16, R5 3541 0000 0000 c600 ALLOC MEMORY SIZE(0x0) 3542 201f 0000 2000 EXEC_END ADDR(0x1f) CNT(0x2) 3543 1f: 000f8020 20136c00 4b01020a ALU: MULADDv export32 = C10, C1.wyww, R2.xxxx 3544 20: 000f8021 00000000 4b520551 ALU: MULADDv export33 = C17, C18, R5 3545 0000 0000 0000 NOP 35460110c018: 0000: c0642b00 00000000 00000063 00000000 100bc400 10000003 0002400c 00001000 35470110c038: 0020: c2000000 00001010 00001000 c6000000 00002011 00002000 c6000000 00002013 35480110c058: 0040: 00001000 c6000000 00002015 00001000 c6000000 00002017 00001000 c6000000 35490110c078: 0060: 00002019 00001000 c6000000 0000201b 00001000 c6000000 0000201d 00001000 35500110c098: 0080: c6000000 0000201f 00002000 00000000 19480000 00262688 00000010 00010001 35510110c0b8: 00a0: 00036c00 82000000 4c110302 0000006c 60400201 000f0004 00006c00 c1000300 35520110c0d8: 00c0: 000f0005 00000000 4b420441 000f803e 00000000 c2000000 000f8020 20136c00 35530110c0f8: 00e0: 4b010203 000f8021 00000000 4b440543 000f8020 20136c00 4b010204 000f8021 35540110c118: 0100: 00000000 4b460545 000f8020 20136c00 4b010205 000f8021 00000000 4b480547 35550110c138: 0120: 000f8020 20136c00 4b010206 000f8021 00000000 4b4a0549 000f8020 20136c00 35560110c158: 0140: 4b010207 000f8021 00000000 4b4c054b 000f8020 20136c00 4b010208 000f8021 35570110c178: 0160: 00000000 4b4e054d 000f8020 20136c00 4b010209 000f8021 00000000 4b50054f 35580110c198: 0180: 000f8020 20136c00 4b01020a 000f8021 00000000 4b520551 3559t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3560 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 35610110c1b0: 0000: c0012d00 00040181 00000006 3562t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3563 SQ_PROGRAM_CNTL: { VS_REGS = 5 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 | GEN_INDEX_VTX } 35640110c1bc: 0000: c0012d00 00040180 90030005 3565t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 35660110c1d0: 0.000000 0.000000 0.000000 0.000000 35670110c1c8: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 3568t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 35690110c1e8: 128.000000 128.000000 0.500000 0.000000 128.000000 -128.000000 0.500000 0.000000 35700110c1e0: 0000: c0082d00 00000184 43000000 43000000 3f000000 00000000 43000000 c3000000 35710110c200: 0020: 3f000000 00000000 3572t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3573 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 35740110c208: 0000: c0012d00 00040201 00000000 3575t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3576 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 35770110c214: 0000: c0012d00 00040104 0000000f 3578t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3579 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_POINTS | BACK_PTYPE = PC_DRAW_POINTS | FACE_KILL_ENABLE } 35800110c220: 0000: c0012d00 00040205 40000000 3581t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3582 VGT_INDX_OFFSET: 0 35830110c22c: 0000: c0012d00 00040102 00000000 3584t0 write TC_CNTL_STATUS (0e00) 3585 TC_CNTL_STATUS: { L2_INVALIDATE } 35860110c238: 0000: 00000e00 00000001 3587t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 35880110c240: 0000: c0035200 000005d0 00000000 00001000 00000001 3589t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 35900110c254: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 3591t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 35920110c278: 0.000000 0.000000 0.000000 0.000000 35930110c270: 0000: c0042d00 00000180 00000000 00000000 00000000 00000000 3594t0 write CP_SCRATCH_REG7 (057f) 3595 CP_SCRATCH_REG7: 61 3596 :0,0,67,61 35970110c288: 0000: 0000057f 0000003d 3598t3 opcode: CP_DRAW_INDX (22) (5 dwords) 3599 { VIZ_QUERY = 0 } 3600 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x60000 } 3601 { NUM_INDICES = 18011360 } 3602 { INDX_BASE = 0xc } 3603 draw: 0 3604 prim_type: DI_PT_TRILIST (4) 3605 source_select: DI_SRC_SEL_DMA (0) 3606 num_indices: 18011360 3607 draw[9] register values 3608 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 3609 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 3610 + 00000000 CP_PERFMON_CNTL: 0 3611!+ 00000043 CP_SCRATCH_REG6: 67 3612 :0,0,67,61 3613!+ 0000003d CP_SCRATCH_REG7: 61 3614 :0,0,67,61 3615 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 3616 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 3617 + 00000002 TP0_CHICKEN: 0x2 3618 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 3619!+ 00000080 RB_SURFACE_INFO: { SURFACE_PITCH = 128 | MSAA_SAMPLES = 0 } 3620!+ 00000205 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 3621!+ 00010001 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 65536 } 3622 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 3623 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 3624 + 00000000 VGT_MIN_VTX_INDX: 0 3625 + 00000000 VGT_INDX_OFFSET: 0 3626 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 3627 + 00000000 RB_BLEND_RED: 0 3628 + 00000000 RB_BLEND_GREEN: 0 3629 + 00000000 RB_BLEND_BLUE: 0 3630!+ 000000ff RB_BLEND_ALPHA: 0xff 3631!+ 90030005 SQ_PROGRAM_CNTL: { VS_REGS = 5 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 | GEN_INDEX_VTX } 3632!+ 00000006 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 3633 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 3634 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 3635 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 3636 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 3637 + 00000000 VGT_CURRENT_BIN_ID_MAX: { COLUMN = 0 | ROW = 0 | GUARD_BAND_MASK = 0 } 3638!+ 40000000 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_POINTS | BACK_PTYPE = PC_DRAW_POINTS | FACE_KILL_ENABLE } 3639 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 3640 + 00000000 VGT_CURRENT_BIN_ID_MIN: { COLUMN = 0 | ROW = 0 | GUARD_BAND_MASK = 0 } 3641 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 3642 + 88888888 RB_SAMPLE_POS: 0x88888888 3643 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 3644 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 3645 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 3646 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 3647 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 3648!+ 00000000 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 0 } 3649 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 3650 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 3651 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 36520110c290: 0000: c0032200 00000000 00060004 0112d4e0 0000000c 3653t0 write CP_SCRATCH_REG7 (057f) 3654NEEDS WFI: CP_SCRATCH_REG7 (57f) 3655 CP_SCRATCH_REG7: 62 3656 :0,0,67,62 36570110c2a4: 0000: 0000057f 0000003e 3658t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 36590110c2ac: 0000: c0002600 00000000 3660t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3661 { EVENT = CACHE_FLUSH } 3662 event CACHE_FLUSH 36630110c2b4: 0000: c0004600 00000006 3664t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3665 { EVENT = CACHE_FLUSH } 3666 event CACHE_FLUSH 36670110c2bc: 0000: c0004600 00000006 3668t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3669 { EVENT = CACHE_FLUSH } 3670 event CACHE_FLUSH 36710110c2c4: 0000: c0004600 00000006 3672t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3673 { EVENT = CACHE_FLUSH } 3674 event CACHE_FLUSH 36750110c2cc: 0000: c0004600 00000006 3676t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3677 { EVENT = CACHE_FLUSH } 3678 event CACHE_FLUSH 36790110c2d4: 0000: c0004600 00000006 3680t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3681 { EVENT = CACHE_FLUSH } 3682 event CACHE_FLUSH 36830110c2dc: 0000: c0004600 00000006 3684t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3685 { EVENT = CACHE_FLUSH } 3686 event CACHE_FLUSH 36870110c2e4: 0000: c0004600 00000006 3688t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3689 { EVENT = CACHE_FLUSH } 3690 event CACHE_FLUSH 36910110c2ec: 0000: c0004600 00000006 3692t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3693 { EVENT = CACHE_FLUSH } 3694 event CACHE_FLUSH 36950110c2f4: 0000: c0004600 00000006 3696t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3697 { EVENT = CACHE_FLUSH } 3698 event CACHE_FLUSH 36990110c2fc: 0000: c0004600 00000006 3700t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3701 { EVENT = CACHE_FLUSH } 3702 event CACHE_FLUSH 37030110c304: 0000: c0004600 00000006 3704t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 3705 { EVENT = CACHE_FLUSH } 3706 event CACHE_FLUSH 37070110c30c: 0000: c0004600 00000006 37080110a21c: 0000: c0013700 0110c000 000000c5 3709t2 nop 3710t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3711 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 37120110a234: 0000: c0012d00 00040316 00000002 3713t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3714 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 37150110a240: 0000: c0012d00 00040001 00000205 3716t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3717 PA_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 } 3718 PA_SC_SCREEN_SCISSOR_BR: { X = 128 | Y = 128 } 37190110a24c: 0000: c0022d00 0004000e 00000000 00800080 3720t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3721 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 37220110a25c: 0000: c0012d00 00040001 00000205 3723t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3724 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 37250110a268: 0000: c0012d00 00040080 00000000 3726t3 opcode: CP_MEM_WRITE (3d) (3 dwords) 3727 { ADDR_LO = 0x100903c } 3728 { ADDR_HI = 0x800080 } 3729 gpuaddr:0100903c 37300110a27c: 0.000000 37310110a274: 0000: c0013d00 0100903c 00800080 3732t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3733 RB_COPY_DEST_OFFSET: { X = 0 | Y = 0 } 37340110a280: 0000: c0012d00 0004031c 00000000 3735t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 37360110a294: 0.000000 0.000000 0.000000 0.000000 37370110a28c: 0000: c0042d00 00000580 00000000 00000000 00000000 00000000 3738t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3739 VGT_CURRENT_BIN_ID_MIN: { COLUMN = 1 | ROW = 1 | GUARD_BAND_MASK = 0 } 37400110a2a4: 0000: c0012d00 00040207 00000009 3741t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3742 VGT_CURRENT_BIN_ID_MAX: { COLUMN = 1 | ROW = 1 | GUARD_BAND_MASK = 0 } 37430110a2b0: 0000: c0012d00 00040203 00000009 3744t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 37450110a2bc: 0000: c0004b00 0111d000 3746t0 write CP_SCRATCH_REG6 (057e) 3747 CP_SCRATCH_REG6: 69 3748 :0,0,69,62 37490110a2c4: 0000: 0000057e 00000045 3750t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 3751 ibaddr:0110b000 3752 ibsize:00000198 3753t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3754 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3755 PA_SC_WINDOW_SCISSOR_BR: { X = 16383 | Y = 16383 } 37560110b000: 0000: c0022d00 00040081 00000000 3fff3fff 3757t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 3758 PA_CL_VPORT_XSCALE: 4096.000000 3759 PA_CL_VPORT_XOFFSET: 4096.000000 3760 PA_CL_VPORT_YSCALE: 4096.000000 3761 PA_CL_VPORT_YOFFSET: 4096.000000 37620110b010: 0000: c0042d00 0004010f 45800000 45800000 45800000 45800000 3763t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3764 set shader const 009c 37650110b028: 0000: c0022d00 0001009c 01009003 00000024 3766t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3767 VGT_INDX_OFFSET: 0 37680110b038: 0000: c0012d00 00040102 00000000 3769t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 3770 vertex shader, start=0000, size=000c 3771 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 3772 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 3773 02: 19a80000 00392a88 0000000c (S)FETCH: VERTEX R0.xyz1 = R0.x FMT_32_32_32_FLOAT UNSIGNED STRIDE(12) CONST(26, 0) 3774 0000 0000 c200 ALLOC POSITION SIZE(0x0) 3775 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 3776 03: 000f803e 00000000 c2000000 (S)ALU: MAXv export62 = R0, R0 ; gl_Position 37770110b044: 0000: c00d2b00 00000000 0000000c 00000000 1002c400 10000003 00000000 1003c200 37780110b064: 0020: 20000002 19a80000 00392a88 0000000c 000f803e 00000000 c2000000 3779t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (9 dwords) 3780 fragment shader, start=0000, size=0006 3781 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 3782 1001 0002 2000 EXEC_END ADDR(0x1) CNT(0x1) 3783 01: 000f8000 00000000 02000000 (S)ALU: MAXv export0 = C0, C0 ; gl_FragColor 37840110b080: 0000: c0072b00 00000001 00000006 00000000 1001c400 20000002 000f8000 00000000 37850110b0a0: 0020: 02000000 3786t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3787 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 37880110b0a4: 0000: c0012d00 00040181 00000006 3789t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3790 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 128 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 37910110b0b0: 0000: c0012d00 00040180 10038002 3792t0 write TC_CNTL_STATUS (0e00) 3793 TC_CNTL_STATUS: { L2_INVALIDATE } 37940110b0bc: 0000: 00000e00 00000001 3795t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3796 RB_DEPTHCONTROL: { STENCIL_ENABLE | Z_ENABLE | Z_WRITE_ENABLE | EARLY_Z_ENABLE | ZFUNC = FUNC_ALWAYS | STENCILFUNC = FUNC_ALWAYS | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_REPLACE | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 37970110b0c4: 0000: c0012d00 00040200 0000877f 3798t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3799 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_ALWAYS | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 38000110b0d0: 0000: c0012d00 00040202 00000c27 3801t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3802 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 3803 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | MSAA_ENABLE | PROVOKING_VTX_LAST } 38040110b0dc: 0000: c0022d00 00040204 00000000 00088240 3805t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3806 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 3 | MAX_SAMPLE_DIST = 0 } 38070110b0ec: 0000: c0012d00 00040301 00000003 3808t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3809 PA_SC_AA_MASK: 0xffff 38100110b0f8: 0000: c0012d00 00040312 0000ffff 3811t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3812 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 38130110b104: 0000: c0012d00 00040104 0000000f 3814t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3815 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 38160110b110: 0000: c0012d00 00040201 00000000 3817t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3818 PA_SC_SCREEN_SCISSOR_BR: { X = 32 | Y = 64 } 38190110b11c: 0000: c0012d00 0004000f 00400020 3820t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 3821 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 2 } 3822 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0 } 3823 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 32768 } 38240110b128: 0000: c0032d00 00040000 00008020 00000005 00008001 3825t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 38260110b144: 0.501961 0.250980 0.125490 1.000000 38270110b13c: 0000: c0042d00 00000480 3f008081 3e808081 3e008081 3f800000 3828t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3829 PA_CL_VPORT_ZSCALE: 0.000000 3830 PA_CL_VPORT_ZOFFSET: 0.996586 38310110b154: 0000: c0022d00 00040113 00000000 3f7f2041 3832t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3833 RB_STENCILREFMASK_BF: { STENCILREF = 0x80 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 3834 RB_STENCILREFMASK: { STENCILREF = 0x80 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 38350110b164: 0000: c0022d00 0004010c ffff0080 ffff0080 3836t0 write CP_SCRATCH_REG7 (057f) 3837 CP_SCRATCH_REG7: 1 3838 :0,0,69,1 38390110b174: 0000: 0000057f 00000001 3840t3 opcode: CP_DRAW_INDX (22) (3 dwords) 3841 { VIZ_QUERY = 0 } 3842 { PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x30000 } 3843 draw: 0 3844 prim_type: DI_PT_RECTLIST (8) 3845 source_select: DI_SRC_SEL_AUTO_INDEX (2) 3846 num_indices: 1407 3847 draw[10] register values 3848!+ 00000045 CP_SCRATCH_REG6: 69 3849 :0,0,69,1 3850!+ 00000001 CP_SCRATCH_REG7: 1 3851 :0,0,69,1 3852 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 3853!+ 00008020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 2 } 3854!+ 00000005 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0 } 3855!+ 00008001 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 32768 } 3856!+ 00000000 PA_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 } 3857!+ 00400020 PA_SC_SCREEN_SCISSOR_BR: { X = 32 | Y = 64 } 3858 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 3859 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3860!+ 3fff3fff PA_SC_WINDOW_SCISSOR_BR: { X = 16383 | Y = 16383 } 3861 + 00000000 VGT_INDX_OFFSET: 0 3862 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 3863!+ ffff0080 RB_STENCILREFMASK_BF: { STENCILREF = 0x80 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 3864!+ ffff0080 RB_STENCILREFMASK: { STENCILREF = 0x80 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 3865!+ 45800000 PA_CL_VPORT_XSCALE: 4096.000000 3866!+ 45800000 PA_CL_VPORT_XOFFSET: 4096.000000 3867!+ 45800000 PA_CL_VPORT_YSCALE: 4096.000000 3868!+ 45800000 PA_CL_VPORT_YOFFSET: 4096.000000 3869 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 3870!+ 3f7f2041 PA_CL_VPORT_ZOFFSET: 0.996586 3871!+ 10038002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 128 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 3872 + 00000006 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 3873!+ 0000877f RB_DEPTHCONTROL: { STENCIL_ENABLE | Z_ENABLE | Z_WRITE_ENABLE | EARLY_Z_ENABLE | ZFUNC = FUNC_ALWAYS | STENCILFUNC = FUNC_ALWAYS | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_REPLACE | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 3874 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 3875!+ 00000c27 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_ALWAYS | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 3876!+ 00000009 VGT_CURRENT_BIN_ID_MAX: { COLUMN = 1 | ROW = 1 | GUARD_BAND_MASK = 0 } 3877 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 3878!+ 00088240 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | MSAA_ENABLE | PROVOKING_VTX_LAST } 3879!+ 00000009 VGT_CURRENT_BIN_ID_MIN: { COLUMN = 1 | ROW = 1 | GUARD_BAND_MASK = 0 } 3880!+ 00000003 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 3 | MAX_SAMPLE_DIST = 0 } 3881 + 0000ffff PA_SC_AA_MASK: 0xffff 3882!+ 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 3883 + 00000000 RB_COPY_DEST_OFFSET: { X = 0 | Y = 0 } 38840110b17c: 0000: c0012200 00000000 00030088 3885t0 write CP_SCRATCH_REG7 (057f) 3886NEEDS WFI: CP_SCRATCH_REG7 (57f) 3887 CP_SCRATCH_REG7: 2 3888 :0,0,69,2 38890110b188: 0000: 0000057f 00000002 3890t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3891 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 38920110b190: 0000: c0012d00 00040301 00000000 3893t3 opcode: CP_LOAD_CONSTANT_CONTEXT (2e) (4 dwords) 38940110b19c: 0000: c0022e00 01009000 0004000f 00000001 3895t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 3896 RB_SURFACE_INFO: { SURFACE_PITCH = 128 | MSAA_SAMPLES = 0 } 3897 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 3898 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 65536 } 38990110b1ac: 0000: c0032d00 00040000 00000080 00000205 00010001 3900t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3901 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 3902 PA_SC_WINDOW_SCISSOR_BR: { X = 16383 | Y = 16383 } 39030110b1c0: 0000: c0022d00 00040081 00000000 3fff3fff 3904t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 3905 PA_CL_VPORT_XSCALE: 4096.000000 3906 PA_CL_VPORT_XOFFSET: 4096.000000 3907 PA_CL_VPORT_YSCALE: 4096.000000 3908 PA_CL_VPORT_YOFFSET: 4096.000000 39090110b1d0: 0000: c0042d00 0004010f 45800000 45800000 45800000 45800000 3910t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3911 set shader const 009c 39120110b1e8: 0000: c0022d00 0001009c 01009003 00000024 3913t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3914 VGT_INDX_OFFSET: 0 39150110b1f8: 0000: c0012d00 00040102 00000000 3916t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 3917 vertex shader, start=0000, size=000c 3918 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 3919 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 3920 02: 19a80000 00392a88 0000000c (S)FETCH: VERTEX R0.xyz1 = R0.x FMT_32_32_32_FLOAT UNSIGNED STRIDE(12) CONST(26, 0) 3921 0000 0000 c200 ALLOC POSITION SIZE(0x0) 3922 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 3923 03: 000f803e 00000000 c2000000 (S)ALU: MAXv export62 = R0, R0 ; gl_Position 39240110b204: 0000: c00d2b00 00000000 0000000c 00000000 1002c400 10000003 00000000 1003c200 39250110b224: 0020: 20000002 19a80000 00392a88 0000000c 000f803e 00000000 c2000000 3926t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (9 dwords) 3927 fragment shader, start=0000, size=0006 3928 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 3929 1001 0002 2000 EXEC_END ADDR(0x1) CNT(0x1) 3930 01: 000f8000 00000000 02000000 (S)ALU: MAXv export0 = C0, C0 ; gl_FragColor 39310110b240: 0000: c0072b00 00000001 00000006 00000000 1001c400 20000002 000f8000 00000000 39320110b260: 0020: 02000000 3933t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3934 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 39350110b264: 0000: c0012d00 00040181 00000006 3936t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3937 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 128 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 39380110b270: 0000: c0012d00 00040180 10038002 3939t0 write TC_CNTL_STATUS (0e00) 3940NEEDS WFI: TC_CNTL_STATUS (e00) 3941 TC_CNTL_STATUS: { L2_INVALIDATE } 39420110b27c: 0000: 00000e00 00000001 3943t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3944 RB_DEPTHCONTROL: { STENCIL_ENABLE | Z_ENABLE | Z_WRITE_ENABLE | EARLY_Z_ENABLE | ZFUNC = FUNC_ALWAYS | STENCILFUNC = FUNC_ALWAYS | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_REPLACE | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 39450110b284: 0000: c0012d00 00040200 0000877f 3946t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3947 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_ALWAYS | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 39480110b290: 0000: c0012d00 00040202 00000c27 3949t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3950 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 3951 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | MSAA_ENABLE | PROVOKING_VTX_LAST } 39520110b29c: 0000: c0022d00 00040204 00000000 00088240 3953t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3954 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 3 | MAX_SAMPLE_DIST = 0 } 39550110b2ac: 0000: c0012d00 00040301 00000003 3956t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3957 PA_SC_AA_MASK: 0xffff 39580110b2b8: 0000: c0012d00 00040312 0000ffff 3959t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3960 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 39610110b2c4: 0000: c0012d00 00040104 0000000f 3962t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3963 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 39640110b2d0: 0000: c0012d00 00040201 00000000 3965t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 3966 PA_SC_SCREEN_SCISSOR_BR: { X = 32 | Y = 128 } 39670110b2dc: 0000: c0012d00 0004000f 00800020 3968t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 3969 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 2 } 3970 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0 } 3971 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 65536 } 39720110b2e8: 0000: c0032d00 00040000 00008020 00000005 00010001 3973t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 39740110b304: 0.501961 0.250980 0.125490 1.000000 39750110b2fc: 0000: c0042d00 00000480 3f008081 3e808081 3e008081 3f800000 3976t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3977 PA_CL_VPORT_ZSCALE: 0.000000 3978 PA_CL_VPORT_ZOFFSET: 1.000000 39790110b314: 0000: c0022d00 00040113 00000000 3f800000 3980t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 3981 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 3982 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 39830110b324: 0000: c0022d00 0004010c ffff0000 ffff0000 3984t0 write CP_SCRATCH_REG7 (057f) 3985NEEDS WFI: CP_SCRATCH_REG7 (57f) 3986 CP_SCRATCH_REG7: 3 3987 :0,0,69,3 39880110b334: 0000: 0000057f 00000003 3989t3 opcode: CP_DRAW_INDX (22) (3 dwords) 3990 { VIZ_QUERY = 0 } 3991 { PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x30000 } 3992 draw: 1 3993 prim_type: DI_PT_RECTLIST (8) 3994 source_select: DI_SRC_SEL_AUTO_INDEX (2) 3995 num_indices: 1407 3996 draw[11] register values 3997!+ 00000003 CP_SCRATCH_REG7: 3 3998 :0,0,69,3 3999 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 4000 + 00008020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 2 } 4001 + 00000005 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0 } 4002!+ 00010001 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 65536 } 4003!+ 00800020 PA_SC_SCREEN_SCISSOR_BR: { X = 32 | Y = 128 } 4004 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4005 + 3fff3fff PA_SC_WINDOW_SCISSOR_BR: { X = 16383 | Y = 16383 } 4006 + 00000000 VGT_INDX_OFFSET: 0 4007 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 4008!+ ffff0000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 4009!+ ffff0000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 } 4010 + 45800000 PA_CL_VPORT_XSCALE: 4096.000000 4011 + 45800000 PA_CL_VPORT_XOFFSET: 4096.000000 4012 + 45800000 PA_CL_VPORT_YSCALE: 4096.000000 4013 + 45800000 PA_CL_VPORT_YOFFSET: 4096.000000 4014 + 00000000 PA_CL_VPORT_ZSCALE: 0.000000 4015!+ 3f800000 PA_CL_VPORT_ZOFFSET: 1.000000 4016 + 10038002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 128 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 4017 + 00000006 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 4018 + 0000877f RB_DEPTHCONTROL: { STENCIL_ENABLE | Z_ENABLE | Z_WRITE_ENABLE | EARLY_Z_ENABLE | ZFUNC = FUNC_ALWAYS | STENCILFUNC = FUNC_ALWAYS | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_REPLACE | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 4019 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 4020 + 00000c27 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_ALWAYS | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 4021 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 4022 + 00088240 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | MSAA_ENABLE | PROVOKING_VTX_LAST } 4023 + 00000003 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 3 | MAX_SAMPLE_DIST = 0 } 4024 + 0000ffff PA_SC_AA_MASK: 0xffff 40250110b33c: 0000: c0012200 00000000 00030088 4026t0 write CP_SCRATCH_REG7 (057f) 4027NEEDS WFI: CP_SCRATCH_REG7 (57f) 4028 CP_SCRATCH_REG7: 4 4029 :0,0,69,4 40300110b348: 0000: 0000057f 00000004 4031t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4032 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 40330110b350: 0000: c0012d00 00040301 00000000 4034t3 opcode: CP_LOAD_CONSTANT_CONTEXT (2e) (4 dwords) 40350110b35c: 0000: c0022e00 01009000 0004000f 00000001 4036t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 4037 RB_SURFACE_INFO: { SURFACE_PITCH = 128 | MSAA_SAMPLES = 0 } 4038 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 4039 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 65536 } 40400110b36c: 0000: c0032d00 00040000 00000080 00000205 00010001 4041t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4042 set shader const 0078 40430110b380: 0000: c0042d00 00010078 0112d483 00100000 0112d4c3 00100000 4044t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4045 PA_SC_AA_MASK: 0xffff 40460110b398: 0000: c0012d00 00040312 0000ffff 4047t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4048 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 40490110b3a4: 0000: c0012d00 00040200 00000000 4050t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 4051 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 4052 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 4053 RB_ALPHA_REF: 0 40540110b3b0: 0000: c0032d00 0004010c 00000000 00000000 00000000 4055t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4056 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 4057 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 40580110b3c4: 0000: c0022d00 00040204 00000000 00090240 4059t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4060 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 4061 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 4062 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 4063 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 40640110b3d4: 0000: c0042d00 00040280 00080008 00080008 00000008 00000000 4065t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 4066 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 4067 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 4068 PA_CL_GB_VERT_DISC_ADJ: 1.000000 4069 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 4070 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 40710110b3ec: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 4072t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4073 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4074 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 40750110b408: 0000: c0022d00 00040081 00000000 01000100 4076t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 4077 PA_CL_VPORT_XSCALE: 128.000000 4078 PA_CL_VPORT_XOFFSET: 128.000000 4079 PA_CL_VPORT_YSCALE: -128.000000 4080 PA_CL_VPORT_YOFFSET: 128.000000 4081 PA_CL_VPORT_ZSCALE: 0.500000 4082 PA_CL_VPORT_ZOFFSET: 0.500000 40830110b418: 0000: c0062d00 0004010f 43000000 43000000 c3000000 43000000 3f000000 3f000000 4084t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 40850110b440: 128.000000 128.000000 0.500000 0.000000 128.000000 -128.000000 0.500000 0.000000 40860110b438: 0000: c0082d00 00000184 43000000 43000000 3f000000 00000000 43000000 c3000000 40870110b458: 0020: 3f000000 00000000 4088t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 4089 vertex shader, start=0000, size=0015 4090 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 4091 03: 19481000 00262688 00000010 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(16) CONST(20, 0) 4092 04: 13480000 40252fc8 00000008 FETCH: VERTEX R0.xy__ = R0.x FMT_32_32_FLOAT UNSIGNED STRIDE(8) CONST(20, 1) 4093 0000 0000 c200 ALLOC POSITION SIZE(0x0) 4094 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 4095 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 4096 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 4097 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 4098 06: 00038000 00000000 c2000000 ALU: MAXv export0.xy__ = R0, R0 4099 0000 0000 0000 NOP 41000110b460: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 41010110b480: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000010 13480000 41020110b4a0: 0040: 40252fc8 00000008 000f803e 00000000 c2010100 00038000 00000000 c2000000 4103t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 4104 fragment shader, start=0000, size=000c 4105 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 4106 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 4107 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 4108 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 4109 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 4110 0000 0000 0000 NOP 41110110b4c0: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 41120110b4e0: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 4113t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4114 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 41150110b4fc: 0000: c0012d00 00040181 00000106 4116t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4117 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 41180110b508: 0000: c0012d00 00040180 10030002 4119t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 41200110b51c: 0.000000 0.000000 0.000000 0.000000 41210110b514: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 4122t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4123 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 41240110b52c: 0000: c0012d00 00040202 00001c20 4125t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4126 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 41270110b538: 0000: c0012d00 00040201 00000000 4128t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4129 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 41300110b544: 0000: c0012d00 00040104 0000000f 4131t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4132 RB_BLEND_RED: 0 4133 RB_BLEND_GREEN: 0 4134 RB_BLEND_BLUE: 0 4135 RB_BLEND_ALPHA: 0 41360110b550: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 4137t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 4138 set texture const 0000 4139 clamp x/y/z: clamp-last-texel/clamp-last-texel/wrap 4140 filter min/mag: point/point 4141 swizzle: xyzw 4142 addr=01230000 (flags=820), size=64x128, pitch=16448, format=FMT_1_REVERSE 4143 mipaddr=01240000 (flags=200) 41440110b568: 0000: c0062d00 00010000 80804800 01230820 000fe03f 00000d11 000001c0 01240200 4145t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4146 VGT_INDX_OFFSET: 0 41470110b588: 0000: c0012d00 00040102 00000000 4148t0 write TC_CNTL_STATUS (0e00) 4149NEEDS WFI: TC_CNTL_STATUS (e00) 4150 TC_CNTL_STATUS: { L2_INVALIDATE } 41510110b594: 0000: 00000e00 00000001 4152t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 41530110b59c: 0000: c0035200 000005d0 00000000 00001000 00000001 4154t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 41550110b5b0: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 4156t0 write CP_SCRATCH_REG7 (057f) 4157NEEDS WFI: CP_SCRATCH_REG7 (57f) 4158 CP_SCRATCH_REG7: 59 4159 :0,0,69,59 41600110b5cc: 0000: 0000057f 0000003b 4161t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 41620110b5d4: 0000: c0053400 00000000 0006c004 00000000 00000006 0112d4e0 0000000c 4163t0 write CP_SCRATCH_REG7 (057f) 4164NEEDS WFI: CP_SCRATCH_REG7 (57f) 4165 CP_SCRATCH_REG7: 60 4166 :0,0,69,60 41670110b5f0: 0000: 0000057f 0000003c 4168t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 41690110b5f8: 0000: c0002600 00000000 4170t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4171 { EVENT = CACHE_FLUSH } 4172 event CACHE_FLUSH 41730110b600: 0000: c0004600 00000006 4174t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4175 { EVENT = CACHE_FLUSH } 4176 event CACHE_FLUSH 41770110b608: 0000: c0004600 00000006 4178t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4179 { EVENT = CACHE_FLUSH } 4180 event CACHE_FLUSH 41810110b610: 0000: c0004600 00000006 4182t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4183 { EVENT = CACHE_FLUSH } 4184 event CACHE_FLUSH 41850110b618: 0000: c0004600 00000006 4186t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4187 { EVENT = CACHE_FLUSH } 4188 event CACHE_FLUSH 41890110b620: 0000: c0004600 00000006 4190t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4191 { EVENT = CACHE_FLUSH } 4192 event CACHE_FLUSH 41930110b628: 0000: c0004600 00000006 4194t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4195 { EVENT = CACHE_FLUSH } 4196 event CACHE_FLUSH 41970110b630: 0000: c0004600 00000006 4198t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4199 { EVENT = CACHE_FLUSH } 4200 event CACHE_FLUSH 42010110b638: 0000: c0004600 00000006 4202t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4203 { EVENT = CACHE_FLUSH } 4204 event CACHE_FLUSH 42050110b640: 0000: c0004600 00000006 4206t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4207 { EVENT = CACHE_FLUSH } 4208 event CACHE_FLUSH 42090110b648: 0000: c0004600 00000006 4210t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4211 { EVENT = CACHE_FLUSH } 4212 event CACHE_FLUSH 42130110b650: 0000: c0004600 00000006 4214t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4215 { EVENT = CACHE_FLUSH } 4216 event CACHE_FLUSH 42170110b658: 0000: c0004600 00000006 42180110a2cc: 0000: c0013700 0110b000 00000198 4219t2 nop 4220t0 write CP_SCRATCH_REG6 (057e) 4221 CP_SCRATCH_REG6: 71 4222 :0,0,71,60 42230110a2e4: 0000: 0000057e 00000047 4224t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 4225 ibaddr:0125e000 4226 ibsize:00000064 4227t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4228 set shader const 009c 42290125e000: 0000: c0022d00 0001009c 01009003 00000024 4230t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4231 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 42320125e010: 0000: c0012d00 00040080 00000000 4233t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4234 VGT_INDX_OFFSET: 0 42350125e01c: 0000: c0012d00 00040102 00000000 4236t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 4237 vertex shader, start=0000, size=000c 4238 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 4239 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 4240 02: 19a80000 00392a88 0000000c (S)FETCH: VERTEX R0.xyz1 = R0.x FMT_32_32_32_FLOAT UNSIGNED STRIDE(12) CONST(26, 0) 4241 0000 0000 c200 ALLOC POSITION SIZE(0x0) 4242 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 4243 03: 000f803e 00000000 c2000000 (S)ALU: MAXv export62 = R0, R0 ; gl_Position 42440125e028: 0000: c00d2b00 00000000 0000000c 00000000 1002c400 10000003 00000000 1003c200 42450125e048: 0020: 20000002 19a80000 00392a88 0000000c 000f803e 00000000 c2000000 4246t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (9 dwords) 4247 fragment shader, start=0000, size=0006 4248 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 4249 1001 0002 2000 EXEC_END ADDR(0x1) CNT(0x1) 4250 01: 000f8000 00000000 02000000 (S)ALU: MAXv export0 = C0, C0 ; gl_FragColor 42510125e064: 0000: c0072b00 00000001 00000006 00000000 1001c400 20000002 000f8000 00000000 42520125e084: 0020: 02000000 4253t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4254 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 42550125e088: 0000: c0012d00 00040181 00000006 4256t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4257 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 128 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 42580125e094: 0000: c0012d00 00040180 10038002 4259t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4260 PA_SC_AA_MASK: 0xffff 42610125e0a0: 0000: c0012d00 00040312 0000ffff 4262t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4263 RB_DEPTHCONTROL: { EARLY_Z_ENABLE | ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 42640125e0ac: 0000: c0012d00 00040200 00000008 4265t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4266 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | PROVOKING_VTX_LAST } 42670125e0b8: 0000: c0012d00 00040205 00080240 4268t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4269 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4270 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 42710125e0c4: 0000: c0022d00 00040081 00000000 01000100 4272t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4273 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 42740125e0d4: 0000: c0012d00 00040204 00000000 4275t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4276 PA_CL_VPORT_XSCALE: 64.000000 4277 PA_CL_VPORT_XOFFSET: 64.000000 4278 PA_CL_VPORT_YSCALE: 64.000000 4279 PA_CL_VPORT_YOFFSET: 64.000000 42800125e0e0: 0000: c0042d00 0004010f 42800000 42800000 42800000 42800000 4281t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4282 RB_MODECONTROL: { EDRAM_MODE = EDRAM_COPY } 42830125e0f8: 0000: c0012d00 00040208 00000006 4284t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4285 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x10000 } 42860125e104: 0000: c0012d00 00040001 00010005 4287t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4288 RB_COPY_CONTROL: { COPY_SAMPLE_SELECT = SAMPLE_0 | CLEAR_MASK = 0 } 4289 RB_COPY_DEST_BASE: 0x10ca000 4290 RB_COPY_DEST_PITCH: 256 4291 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | LINEAR | FORMAT = COLORX_8_8_8_8 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 42920125e110: 0000: c0042d00 00040318 00000000 010ca000 00000008 0003c058 4293t0 write CP_SCRATCH_REG7 (057f) 4294 CP_SCRATCH_REG7: 63 4295 :0,0,71,63 42960125e128: 0000: 0000057f 0000003f 4297t3 opcode: CP_DRAW_INDX (22) (3 dwords) 4298 { VIZ_QUERY = 0 } 4299 { PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x30000 } 4300 draw: 0 4301 prim_type: DI_PT_RECTLIST (8) 4302 source_select: DI_SRC_SEL_AUTO_INDEX (2) 4303 num_indices: 1407 4304 draw[12] register values 4305!+ 00000047 CP_SCRATCH_REG6: 71 4306 :0,0,71,63 4307!+ 0000003f CP_SCRATCH_REG7: 63 4308 :0,0,71,63 4309 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 4310!+ 00000080 RB_SURFACE_INFO: { SURFACE_PITCH = 128 | MSAA_SAMPLES = 0 } 4311!+ 00010005 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0x10000 } 4312 + 00010001 RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_24_8 | DEPTH_BASE = 65536 } 4313 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 4314 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4315!+ 01000100 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 4316 + 00000000 VGT_INDX_OFFSET: 0 4317 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 4318 + 00000000 RB_BLEND_RED: 0 4319 + 00000000 RB_BLEND_GREEN: 0 4320 + 00000000 RB_BLEND_BLUE: 0 4321!+ 00000000 RB_BLEND_ALPHA: 0 4322!+ 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 4323!+ 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 4324 + 00000000 RB_ALPHA_REF: 0 4325!+ 42800000 PA_CL_VPORT_XSCALE: 64.000000 4326!+ 42800000 PA_CL_VPORT_XOFFSET: 64.000000 4327!+ 42800000 PA_CL_VPORT_YSCALE: 64.000000 4328!+ 42800000 PA_CL_VPORT_YOFFSET: 64.000000 4329!+ 3f000000 PA_CL_VPORT_ZSCALE: 0.500000 4330!+ 3f000000 PA_CL_VPORT_ZOFFSET: 0.500000 4331 + 10038002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 128 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 4332 + 00000006 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 4333!+ 00000008 RB_DEPTHCONTROL: { EARLY_Z_ENABLE | ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 4334 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 4335!+ 00001c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 4336 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 4337!+ 00080240 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | PROVOKING_VTX_LAST } 4338!+ 00000006 RB_MODECONTROL: { EDRAM_MODE = EDRAM_COPY } 4339!+ 00080008 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 4340!+ 00080008 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 4341!+ 00000008 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 4342 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 4343!+ 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 4344 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 4345 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 4346 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 4347 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 4348 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 4349 + 0000ffff PA_SC_AA_MASK: 0xffff 4350 + 00000000 RB_COPY_CONTROL: { COPY_SAMPLE_SELECT = SAMPLE_0 | CLEAR_MASK = 0 } 4351!+ 010ca000 RB_COPY_DEST_BASE: 0x10ca000 4352!+ 00000008 RB_COPY_DEST_PITCH: 256 4353!+ 0003c058 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | LINEAR | FORMAT = COLORX_8_8_8_8 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 43540125e130: 0000: c0012200 00000000 00030088 4355t0 write CP_SCRATCH_REG7 (057f) 4356NEEDS WFI: CP_SCRATCH_REG7 (57f) 4357 CP_SCRATCH_REG7: 64 4358 :0,0,71,64 43590125e13c: 0000: 0000057f 00000040 4360t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4361 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0 } 43620125e144: 0000: c0012d00 00040001 00000005 4363t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4364 RB_COPY_CONTROL: { COPY_SAMPLE_SELECT = SAMPLE_0 | CLEAR_MASK = 0 } 4365 RB_COPY_DEST_BASE: 0x108a000 4366 RB_COPY_DEST_PITCH: 256 4367 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_8_8_8_8 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 43680125e150: 0000: c0042d00 00040318 00000000 0108a000 00000008 0003c050 4369t0 write CP_SCRATCH_REG7 (057f) 4370NEEDS WFI: CP_SCRATCH_REG7 (57f) 4371 CP_SCRATCH_REG7: 65 4372 :0,0,71,65 43730125e168: 0000: 0000057f 00000041 4374t3 opcode: CP_DRAW_INDX (22) (3 dwords) 4375 { VIZ_QUERY = 0 } 4376 { PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x30000 } 4377 draw: 1 4378 prim_type: DI_PT_RECTLIST (8) 4379 source_select: DI_SRC_SEL_AUTO_INDEX (2) 4380 num_indices: 1407 4381 draw[13] register values 4382!+ 00000041 CP_SCRATCH_REG7: 65 4383 :0,0,71,65 4384!+ 00000005 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 0 | BASE = 0 } 4385 + 00000000 RB_COPY_CONTROL: { COPY_SAMPLE_SELECT = SAMPLE_0 | CLEAR_MASK = 0 } 4386!+ 0108a000 RB_COPY_DEST_BASE: 0x108a000 4387 + 00000008 RB_COPY_DEST_PITCH: 256 4388!+ 0003c050 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_8_8_8_8 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 43890125e170: 0000: c0012200 00000000 00030088 4390t0 write CP_SCRATCH_REG7 (057f) 4391NEEDS WFI: CP_SCRATCH_REG7 (57f) 4392 CP_SCRATCH_REG7: 66 4393 :0,0,71,66 43940125e17c: 0000: 0000057f 00000042 4395t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4396 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 43970125e184: 0000: c0012d00 00040208 00000004 43980110a2ec: 0000: c0013700 0125e000 00000064 4399t2 nop 4400t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4401 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 44020110a304: 0000: c0012d00 00040001 00000205 4403t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4404 PA_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 } 4405 PA_SC_SCREEN_SCISSOR_BR: { X = 128 | Y = 128 } 44060110a310: 0000: c0022d00 0004000e 00000000 00800080 4407t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4408 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 44090110a320: 0000: c0012d00 00040001 00000205 4410t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4411 PA_SC_WINDOW_OFFSET: { X = -128 | Y = 0 } 44120110a32c: 0000: c0012d00 00040080 00007f80 4413t3 opcode: CP_MEM_WRITE (3d) (3 dwords) 4414 { ADDR_LO = 0x100903c } 4415 { ADDR_HI = 0x800080 } 4416 gpuaddr:0100903c 44170110a340: 0.000000 44180110a338: 0000: c0013d00 0100903c 00800080 4419t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4420 RB_COPY_DEST_OFFSET: { X = 128 | Y = 0 } 44210110a344: 0000: c0012d00 0004031c 00000080 4422t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 44230110a358: 128.000000 0.000000 0.000000 0.000000 44240110a350: 0000: c0042d00 00000580 43000000 00000000 00000000 00000000 4425t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4426 VGT_CURRENT_BIN_ID_MIN: { COLUMN = 2 | ROW = 1 | GUARD_BAND_MASK = 0 } 44270110a368: 0000: c0012d00 00040207 0000000a 4428t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4429 VGT_CURRENT_BIN_ID_MAX: { COLUMN = 2 | ROW = 1 | GUARD_BAND_MASK = 0 } 44300110a374: 0000: c0012d00 00040203 0000000a 4431t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 44320110a380: 0000: c0004b00 0111d000 4433t0 write CP_SCRATCH_REG6 (057e) 4434NEEDS WFI: CP_SCRATCH_REG6 (57e) 4435 CP_SCRATCH_REG6: 73 4436 :0,0,73,66 44370110a388: 0000: 0000057e 00000049 4438t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 4439 ibaddr:0110b000 4440 ibsize:00000198 44410110a390: 0000: c0013700 0110b000 00000198 4442t2 nop 4443t0 write CP_SCRATCH_REG6 (057e) 4444NEEDS WFI: CP_SCRATCH_REG6 (57e) 4445 CP_SCRATCH_REG6: 75 4446 :0,0,75,66 44470110a3a8: 0000: 0000057e 0000004b 4448t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 4449 ibaddr:0125e000 4450 ibsize:00000064 44510110a3b0: 0000: c0013700 0125e000 00000064 4452t2 nop 4453t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4454 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 44550110a3c8: 0000: c0012d00 00040001 00000205 4456t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4457 PA_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 } 4458 PA_SC_SCREEN_SCISSOR_BR: { X = 128 | Y = 128 } 44590110a3d4: 0000: c0022d00 0004000e 00000000 00800080 4460t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4461 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 44620110a3e4: 0000: c0012d00 00040001 00000205 4463t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4464 PA_SC_WINDOW_OFFSET: { X = 0 | Y = -128 } 44650110a3f0: 0000: c0012d00 00040080 7f800000 4466t3 opcode: CP_MEM_WRITE (3d) (3 dwords) 4467 { ADDR_LO = 0x100903c } 4468 { ADDR_HI = 0x800080 } 4469 gpuaddr:0100903c 44700110a404: 0.000000 44710110a3fc: 0000: c0013d00 0100903c 00800080 4472t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4473 RB_COPY_DEST_OFFSET: { X = 0 | Y = 128 } 44740110a408: 0000: c0012d00 0004031c 00100000 4475t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 44760110a41c: 0.000000 128.000000 0.000000 0.000000 44770110a414: 0000: c0042d00 00000580 00000000 43000000 00000000 00000000 4478t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4479 VGT_CURRENT_BIN_ID_MIN: { COLUMN = 1 | ROW = 2 | GUARD_BAND_MASK = 0 } 44800110a42c: 0000: c0012d00 00040207 00000011 4481t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4482 VGT_CURRENT_BIN_ID_MAX: { COLUMN = 1 | ROW = 2 | GUARD_BAND_MASK = 0 } 44830110a438: 0000: c0012d00 00040203 00000011 4484t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 44850110a444: 0000: c0004b00 0111d000 4486t0 write CP_SCRATCH_REG6 (057e) 4487NEEDS WFI: CP_SCRATCH_REG6 (57e) 4488 CP_SCRATCH_REG6: 77 4489 :0,0,77,66 44900110a44c: 0000: 0000057e 0000004d 4491t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 4492 ibaddr:0110b000 4493 ibsize:00000198 44940110a454: 0000: c0013700 0110b000 00000198 4495t2 nop 4496t0 write CP_SCRATCH_REG6 (057e) 4497NEEDS WFI: CP_SCRATCH_REG6 (57e) 4498 CP_SCRATCH_REG6: 79 4499 :0,0,79,66 45000110a46c: 0000: 0000057e 0000004f 4501t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 4502 ibaddr:0125e000 4503 ibsize:00000064 45040110a474: 0000: c0013700 0125e000 00000064 4505t2 nop 4506t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4507 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 45080110a48c: 0000: c0012d00 00040001 00000205 4509t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4510 PA_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 } 4511 PA_SC_SCREEN_SCISSOR_BR: { X = 128 | Y = 128 } 45120110a498: 0000: c0022d00 0004000e 00000000 00800080 4513t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4514 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0 } 45150110a4a8: 0000: c0012d00 00040001 00000205 4516t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4517 PA_SC_WINDOW_OFFSET: { X = -128 | Y = -128 } 45180110a4b4: 0000: c0012d00 00040080 7f807f80 4519t3 opcode: CP_MEM_WRITE (3d) (3 dwords) 4520 { ADDR_LO = 0x100903c } 4521 { ADDR_HI = 0x800080 } 4522 gpuaddr:0100903c 45230110a4c8: 0.000000 45240110a4c0: 0000: c0013d00 0100903c 00800080 4525t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4526 RB_COPY_DEST_OFFSET: { X = 128 | Y = 128 } 45270110a4cc: 0000: c0012d00 0004031c 00100080 4528t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 45290110a4e0: 128.000000 128.000000 0.000000 0.000000 45300110a4d8: 0000: c0042d00 00000580 43000000 43000000 00000000 00000000 4531t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4532 VGT_CURRENT_BIN_ID_MIN: { COLUMN = 2 | ROW = 2 | GUARD_BAND_MASK = 0 } 45330110a4f0: 0000: c0012d00 00040207 00000012 4534t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4535 VGT_CURRENT_BIN_ID_MAX: { COLUMN = 2 | ROW = 2 | GUARD_BAND_MASK = 0 } 45360110a4fc: 0000: c0012d00 00040203 00000012 4537t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 45380110a508: 0000: c0004b00 0111d000 4539t0 write CP_SCRATCH_REG6 (057e) 4540NEEDS WFI: CP_SCRATCH_REG6 (57e) 4541 CP_SCRATCH_REG6: 81 4542 :0,0,81,66 45430110a510: 0000: 0000057e 00000051 4544t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 4545 ibaddr:0110b000 4546 ibsize:00000198 45470110a518: 0000: c0013700 0110b000 00000198 4548t2 nop 4549t0 write CP_SCRATCH_REG6 (057e) 4550NEEDS WFI: CP_SCRATCH_REG6 (57e) 4551 CP_SCRATCH_REG6: 83 4552 :0,0,83,66 45530110a530: 0000: 0000057e 00000053 4554t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 4555 ibaddr:0125e000 4556 ibsize:00000064 45570110a538: 0000: c0013700 0125e000 00000064 4558t2 nop 4559############################################################ 4560vertices: 0 4561cmd: deqp-gles2/185: fence=1260 4562############################################################ 4563cmdstream: 124 dwords 4564t0 write RB_BC_CONTROL (0f01) 4565NEEDS WFI: RB_BC_CONTROL (f01) 4566 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 45670122f000: 0000: 00000f01 1c004046 4568t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4569 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 45700122f008: 0000: c0012d00 00040293 00000020 4571t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4572 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 45730122f014: 0000: c0012d00 00040316 00000002 4574t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4575 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 45760122f020: 0000: c0012d00 00040317 00000002 4577t0 write CP_PERFMON_CNTL (0444) 4578NEEDS WFI: CP_PERFMON_CNTL (444) 4579 CP_PERFMON_CNTL: 0 45800122f02c: 0000: 00000444 00000000 4581t0 write RBBM_PM_OVERRIDE1 (039c) 4582NEEDS WFI: RBBM_PM_OVERRIDE1 (39c) 4583 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 4584NEEDS WFI: RBBM_PM_OVERRIDE2 (39d) 4585 RBBM_PM_OVERRIDE2: 0xfff 45860122f034: 0000: 0001039c ffffffff 00000fff 4587t0 write TP0_CHICKEN (0e1e) 4588NEEDS WFI: TP0_CHICKEN (e1e) 4589 TP0_CHICKEN: 0x2 45900122f040: 0000: 00000e1e 00000002 4591t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 45920122f048: 0000: c0003b00 00007fff 4593t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4594 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 45950122f050: 0000: c0012d00 00040307 00100020 4596t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4597 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 45980122f05c: 0000: c0012d00 00040308 000e0120 4599t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4600 VGT_MAX_VTX_INDX: 0xffffffff 4601 VGT_MIN_VTX_INDX: 0 46020122f068: 0000: c0022d00 00040100 ffffffff 00000000 4603t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4604 VGT_INDX_OFFSET: 0 46050122f078: 0000: c0012d00 00040102 00000000 4606t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4607 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 46080122f084: 0000: c0012d00 00040181 00000004 4609t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4610 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 46110122f090: 0000: c0012d00 00040182 ffffffff 4612t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4613 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 46140122f09c: 0000: c0012d00 00040301 00000000 4615t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4616 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 46170122f0a8: 0000: c0012d00 00040300 00000000 4618t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4619 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 46200122f0b4: 0000: c0012d00 00040080 00000000 4621t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4622 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 46230122f0c0: 0000: c0012d00 00040208 00000004 4624t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4625 RB_SAMPLE_POS: 0x88888888 46260122f0cc: 0000: c0012d00 0004020a 88888888 4627t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4628 RB_COLOR_DEST_MASK: 0xffffffff 46290122f0d8: 0000: c0012d00 00040326 ffffffff 4630t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4631 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 46320122f0e4: 0000: c0012d00 0004031b 0003c000 4633t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4634 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 4635 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 46360122f0f0: 0000: c0022d00 00040183 00000000 00000000 4637t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 46380122f100: 0000: c0004b00 00000000 4639t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 46400122f108: 0000: c0035200 000005d0 00000000 5f601000 00000001 4641t0 write SQ_INST_STORE_MANAGMENT (0d02) 4642NEEDS WFI: SQ_INST_STORE_MANAGMENT (d02) 4643 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 46440122f11c: 0000: 00000d02 00000180 4645t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 46460122f124: 0000: c0003b00 00000300 4647t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 46480122f12c: 0000: c0004a00 80000180 4649t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 46500122f13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 46510122f15c: 2.000000 0.750000 0.375000 0.250000 46520122f134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 46530122f154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 4654t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4655 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 46560122f16c: 0000: c0012d00 00040104 0000000f 4657t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4658 RB_BLEND_RED: 0 4659 RB_BLEND_GREEN: 0 4660 RB_BLEND_BLUE: 0 4661 RB_BLEND_ALPHA: 0xff 46620122f178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 4663t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4664 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 46650122f190: 0000: c0012d00 00040206 0000043f 4666t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4667 RB_SURFACE_INFO: { SURFACE_PITCH = 64 | MSAA_SAMPLES = 0 } 46680122f19c: 0000: c0012d00 00040000 00000040 4669t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4670 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1256000 } 46710122f1a8: 0000: c0012d00 00040001 01256245 4672t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4673 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 4674 PA_SC_SCREEN_SCISSOR_BR: { X = 64 | Y = 128 } 46750122f1b4: 0000: c0022d00 0004000e 80000000 00800040 4676t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4677 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 46780122f1c4: 0000: c0012d00 00040080 00000000 4679t0 write CP_SCRATCH_REG6 (057e) 4680NEEDS WFI: CP_SCRATCH_REG6 (57e) 4681 CP_SCRATCH_REG6: 89 4682 :0,0,89,66 46830122f1d0: 0000: 0000057e 00000059 4684t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 4685 ibaddr:0122e000 4686 ibsize:000000b6 4687t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4688 set shader const 0078 46890122e000: 0000: c0042d00 00010078 0112d4ef 00100000 0112d4ef 00100000 4690t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4691 PA_SC_AA_MASK: 0xffff 46920122e018: 0000: c0012d00 00040312 0000ffff 4693t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4694 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 46950122e024: 0000: c0012d00 00040200 00000000 4696t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 4697 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 4698 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 4699 RB_ALPHA_REF: 0 47000122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 4701t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4702 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 4703 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 47040122e044: 0000: c0022d00 00040204 00000000 00090244 4705t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4706 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 4707 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 4708 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 4709 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 47100122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 4711t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 4712 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 4713 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 4714 PA_CL_GB_VERT_DISC_ADJ: 1.000000 4715 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 4716 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 47170122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 4718t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4719 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4720 PA_SC_WINDOW_SCISSOR_BR: { X = 64 | Y = 128 } 47210122e088: 0000: c0022d00 00040081 00000000 00800040 4722t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 4723 PA_CL_VPORT_XSCALE: 32.000000 4724 PA_CL_VPORT_XOFFSET: 32.000000 4725 PA_CL_VPORT_YSCALE: 64.000000 4726 PA_CL_VPORT_YOFFSET: 64.000000 4727 PA_CL_VPORT_ZSCALE: 0.000000 4728 PA_CL_VPORT_ZOFFSET: 0.000000 47290122e098: 0000: c0062d00 0004010f 42000000 42000000 42800000 42800000 00000000 00000000 4730t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 47310122e0c0: 32.000000 64.000000 0.000000 0.000000 32.000000 64.000000 0.000000 0.000000 47320122e0b8: 0000: c0082d00 00000184 42000000 42800000 00000000 00000000 42000000 42800000 4733* 4734t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 4735 vertex shader, start=0000, size=0015 4736 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 4737 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 4738 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 4739 0000 0000 c200 ALLOC POSITION SIZE(0x0) 4740 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 4741 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 4742 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 4743 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 4744 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 4745 0000 0000 0000 NOP 47460122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 47470122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 47480122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 4749t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 4750 fragment shader, start=0000, size=000c 4751 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 4752 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 4753 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 4754 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 4755 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 4756 0000 0000 0000 NOP 47570122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 47580122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 4759t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4760 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 47610122e17c: 0000: c0012d00 00040181 00000106 4762t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4763 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 47640122e188: 0000: c0012d00 00040180 10030002 4765t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 47660122e19c: 0.000000 0.000000 0.000000 0.000000 47670122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 4768t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4769 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 47700122e1ac: 0000: c0012d00 00040202 00000c20 4771t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4772 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 47730122e1b8: 0000: c0012d00 00040201 00000000 4774t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4775 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 47760122e1c4: 0000: c0012d00 00040104 0000000f 4777t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 4778 RB_BLEND_RED: 0 4779 RB_BLEND_GREEN: 0 4780 RB_BLEND_BLUE: 0 4781 RB_BLEND_ALPHA: 0 47820122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 4783t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 4784 set texture const 0000 4785 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 4786 filter min/mag: point/point 4787 swizzle: zyxw 4788 addr=0108a000 (flags=806), size=256x256, pitch=16640, format=FMT_8_8_8_8 4789 mipaddr=00000000 (flags=200) 47900122e1e8: 0000: c0062d00 00010000 82024800 0108a806 001fe0ff 00000c14 00000000 00000200 4791t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4792 VGT_INDX_OFFSET: 0 47930122e208: 0000: c0012d00 00040102 00000000 4794t0 write TC_CNTL_STATUS (0e00) 4795NEEDS WFI: TC_CNTL_STATUS (e00) 4796 TC_CNTL_STATUS: { L2_INVALIDATE } 47970122e214: 0000: 00000e00 00000001 4798t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 47990122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 4800t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 48010122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 4802t0 write CP_SCRATCH_REG7 (057f) 4803NEEDS WFI: CP_SCRATCH_REG7 (57f) 4804 CP_SCRATCH_REG7: 85 4805 :0,0,89,85 48060122e24c: 0000: 0000057f 00000055 4807t3 opcode: CP_NOP (10) (2 dwords) 48080122e254: 0000: c0001000 00000000 4809t3 opcode: CP_DRAW_INDX (22) (3 dwords) 4810 { VIZ_QUERY = 0 } 4811 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 4812 draw: 0 4813 prim_type: DI_PT_TRIFAN (5) 4814 source_select: DI_SRC_SEL_AUTO_INDEX (2) 4815 num_indices: 1407 4816 draw[14] register values 4817 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 4818 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 4819 + 00000000 CP_PERFMON_CNTL: 0 4820!+ 00000059 CP_SCRATCH_REG6: 89 4821 :0,0,89,85 4822!+ 00000055 CP_SCRATCH_REG7: 85 4823 :0,0,89,85 4824 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 4825 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 4826 + 00000002 TP0_CHICKEN: 0x2 4827 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 4828!+ 00000040 RB_SURFACE_INFO: { SURFACE_PITCH = 64 | MSAA_SAMPLES = 0 } 4829!+ 01256245 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1256000 } 4830!+ 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 4831!+ 00800040 PA_SC_SCREEN_SCISSOR_BR: { X = 64 | Y = 128 } 4832 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 4833 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 4834!+ 00800040 PA_SC_WINDOW_SCISSOR_BR: { X = 64 | Y = 128 } 4835 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 4836 + 00000000 VGT_MIN_VTX_INDX: 0 4837 + 00000000 VGT_INDX_OFFSET: 0 4838 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 4839 + 00000000 RB_BLEND_RED: 0 4840 + 00000000 RB_BLEND_GREEN: 0 4841 + 00000000 RB_BLEND_BLUE: 0 4842 + 00000000 RB_BLEND_ALPHA: 0 4843 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 4844 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 4845 + 00000000 RB_ALPHA_REF: 0 4846!+ 42000000 PA_CL_VPORT_XSCALE: 32.000000 4847!+ 42000000 PA_CL_VPORT_XOFFSET: 32.000000 4848 + 42800000 PA_CL_VPORT_YSCALE: 64.000000 4849 + 42800000 PA_CL_VPORT_YOFFSET: 64.000000 4850!+ 00000000 PA_CL_VPORT_ZSCALE: 0.000000 4851!+ 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 4852!+ 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 4853!+ 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 4854 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 4855 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 4856 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 4857!+ 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 4858 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 4859!+ 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 4860!+ 00000012 VGT_CURRENT_BIN_ID_MAX: { COLUMN = 2 | ROW = 2 | GUARD_BAND_MASK = 0 } 4861 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 4862!+ 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 4863 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 4864!+ 00000012 VGT_CURRENT_BIN_ID_MIN: { COLUMN = 2 | ROW = 2 | GUARD_BAND_MASK = 0 } 4865!+ 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 4866 + 88888888 RB_SAMPLE_POS: 0x88888888 4867!+ 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 4868!+ 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 4869!+ 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 4870 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 4871 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 4872 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 4873 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 4874 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 4875 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 4876 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 4877 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 4878 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 4879 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 4880 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 4881 + 0000ffff PA_SC_AA_MASK: 0xffff 4882 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 4883 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 4884!+ 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 4885!+ 00100080 RB_COPY_DEST_OFFSET: { X = 128 | Y = 128 } 4886 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 48870122e25c: 0000: c0012200 00000000 00040085 4888t0 write CP_SCRATCH_REG7 (057f) 4889NEEDS WFI: CP_SCRATCH_REG7 (57f) 4890 CP_SCRATCH_REG7: 86 4891 :0,0,89,86 48920122e268: 0000: 0000057f 00000056 4893t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 48940122e270: 0000: c0002600 00000000 4895t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4896 { EVENT = CACHE_FLUSH } 4897 event CACHE_FLUSH 48980122e278: 0000: c0004600 00000006 4899t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4900 { EVENT = CACHE_FLUSH } 4901 event CACHE_FLUSH 49020122e280: 0000: c0004600 00000006 4903t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4904 { EVENT = CACHE_FLUSH } 4905 event CACHE_FLUSH 49060122e288: 0000: c0004600 00000006 4907t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4908 { EVENT = CACHE_FLUSH } 4909 event CACHE_FLUSH 49100122e290: 0000: c0004600 00000006 4911t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4912 { EVENT = CACHE_FLUSH } 4913 event CACHE_FLUSH 49140122e298: 0000: c0004600 00000006 4915t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4916 { EVENT = CACHE_FLUSH } 4917 event CACHE_FLUSH 49180122e2a0: 0000: c0004600 00000006 4919t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4920 { EVENT = CACHE_FLUSH } 4921 event CACHE_FLUSH 49220122e2a8: 0000: c0004600 00000006 4923t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4924 { EVENT = CACHE_FLUSH } 4925 event CACHE_FLUSH 49260122e2b0: 0000: c0004600 00000006 4927t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4928 { EVENT = CACHE_FLUSH } 4929 event CACHE_FLUSH 49300122e2b8: 0000: c0004600 00000006 4931t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4932 { EVENT = CACHE_FLUSH } 4933 event CACHE_FLUSH 49340122e2c0: 0000: c0004600 00000006 4935t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4936 { EVENT = CACHE_FLUSH } 4937 event CACHE_FLUSH 49380122e2c8: 0000: c0004600 00000006 4939t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 4940 { EVENT = CACHE_FLUSH } 4941 event CACHE_FLUSH 49420122e2d0: 0000: c0004600 00000006 49430122f1d8: 0000: c0013700 0122e000 000000b6 4944t2 nop 4945############################################################ 4946vertices: 0 4947cmd: deqp-gles2/185: fence=1261 4948############################################################ 4949cmdstream: 124 dwords 4950t0 write RB_BC_CONTROL (0f01) 4951 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 49520110c000: 0000: 00000f01 1c004046 4953t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4954 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 49550110c008: 0000: c0012d00 00040293 00000020 4956t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4957 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 49580110c014: 0000: c0012d00 00040316 00000002 4959t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4960 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 49610110c020: 0000: c0012d00 00040317 00000002 4962t0 write CP_PERFMON_CNTL (0444) 4963 CP_PERFMON_CNTL: 0 49640110c02c: 0000: 00000444 00000000 4965t0 write RBBM_PM_OVERRIDE1 (039c) 4966 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 4967 RBBM_PM_OVERRIDE2: 0xfff 49680110c034: 0000: 0001039c ffffffff 00000fff 4969t0 write TP0_CHICKEN (0e1e) 4970 TP0_CHICKEN: 0x2 49710110c040: 0000: 00000e1e 00000002 4972t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 49730110c048: 0000: c0003b00 00007fff 4974t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4975 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 49760110c050: 0000: c0012d00 00040307 00100020 4977t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4978 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 49790110c05c: 0000: c0012d00 00040308 000e0120 4980t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 4981 VGT_MAX_VTX_INDX: 0xffffffff 4982 VGT_MIN_VTX_INDX: 0 49830110c068: 0000: c0022d00 00040100 ffffffff 00000000 4984t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4985 VGT_INDX_OFFSET: 0 49860110c078: 0000: c0012d00 00040102 00000000 4987t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4988 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 49890110c084: 0000: c0012d00 00040181 00000004 4990t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4991 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 49920110c090: 0000: c0012d00 00040182 ffffffff 4993t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4994 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 49950110c09c: 0000: c0012d00 00040301 00000000 4996t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 4997 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 49980110c0a8: 0000: c0012d00 00040300 00000000 4999t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 50010110c0b4: 0000: c0012d00 00040080 00000000 5002t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5003 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 50040110c0c0: 0000: c0012d00 00040208 00000004 5005t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5006 RB_SAMPLE_POS: 0x88888888 50070110c0cc: 0000: c0012d00 0004020a 88888888 5008t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5009 RB_COLOR_DEST_MASK: 0xffffffff 50100110c0d8: 0000: c0012d00 00040326 ffffffff 5011t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5012 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 50130110c0e4: 0000: c0012d00 0004031b 0003c000 5014t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5015 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 5016 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 50170110c0f0: 0000: c0022d00 00040183 00000000 00000000 5018t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 50190110c100: 0000: c0004b00 00000000 5020t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 50210110c108: 0000: c0035200 000005d0 00000000 5f601000 00000001 5022t0 write SQ_INST_STORE_MANAGMENT (0d02) 5023 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 50240110c11c: 0000: 00000d02 00000180 5025t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 50260110c124: 0000: c0003b00 00000300 5027t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 50280110c12c: 0000: c0004a00 80000180 5029t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 50300110c13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 50310110c15c: 2.000000 0.750000 0.375000 0.250000 50320110c134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 50330110c154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 5034t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5035 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 50360110c16c: 0000: c0012d00 00040104 0000000f 5037t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5038 RB_BLEND_RED: 0 5039 RB_BLEND_GREEN: 0 5040 RB_BLEND_BLUE: 0 5041 RB_BLEND_ALPHA: 0xff 50420110c178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 5043t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5044 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 50450110c190: 0000: c0012d00 00040206 0000043f 5046t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5047 RB_SURFACE_INFO: { SURFACE_PITCH = 256 | MSAA_SAMPLES = 0 } 50480110c19c: 0000: c0012d00 00040000 00000100 5049t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5050 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0x108a000 } 50510110c1a8: 0000: c0012d00 00040001 0108a205 5052t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5053 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 5054 PA_SC_SCREEN_SCISSOR_BR: { X = 256 | Y = 256 } 50550110c1b4: 0000: c0022d00 0004000e 80000000 01000100 5056t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5057 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 50580110c1c4: 0000: c0012d00 00040080 00000000 5059t0 write CP_SCRATCH_REG6 (057e) 5060 CP_SCRATCH_REG6: 95 5061 :0,0,95,86 50620110c1d0: 0000: 0000057e 0000005f 5063t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 5064 ibaddr:0110b000 5065 ibsize:000000b8 5066t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5067 set shader const 0078 50680110b000: 0000: c0042d00 00010078 0112d56f 00100000 0112d5af 00100000 5069t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5070 PA_SC_AA_MASK: 0xffff 50710110b018: 0000: c0012d00 00040312 0000ffff 5072t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5073 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 50740110b024: 0000: c0012d00 00040200 00000000 5075t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 5076 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5077 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5078 RB_ALPHA_REF: 0 50790110b030: 0000: c0032d00 0004010c 00000000 00000000 00000000 5080t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5081 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 5082 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 50830110b044: 0000: c0022d00 00040204 00000000 00090240 5084t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5085 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 5086 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 5087 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 5088 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 50890110b054: 0000: c0042d00 00040280 00080008 00080008 00000008 00000000 5090t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 5091 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 5092 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 5093 PA_CL_GB_VERT_DISC_ADJ: 1.000000 5094 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 5095 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 50960110b06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 5097t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5098 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 5099 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 51000110b088: 0000: c0022d00 00040081 00000000 01000100 5101t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 5102 PA_CL_VPORT_XSCALE: 128.000000 5103 PA_CL_VPORT_XOFFSET: 128.000000 5104 PA_CL_VPORT_YSCALE: -128.000000 5105 PA_CL_VPORT_YOFFSET: 128.000000 5106 PA_CL_VPORT_ZSCALE: 0.500000 5107 PA_CL_VPORT_ZOFFSET: 0.500000 51080110b098: 0000: c0062d00 0004010f 43000000 43000000 c3000000 43000000 3f000000 3f000000 5109t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 51100110b0c0: 128.000000 128.000000 0.500000 0.000000 128.000000 -128.000000 0.500000 0.000000 51110110b0b8: 0000: c0082d00 00000184 43000000 43000000 3f000000 00000000 43000000 c3000000 51120110b0d8: 0020: 3f000000 00000000 5113t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 5114 vertex shader, start=0000, size=0015 5115 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 5116 03: 19481000 00262688 00000010 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(16) CONST(20, 0) 5117 04: 13480000 40252fc8 00000008 FETCH: VERTEX R0.xy__ = R0.x FMT_32_32_FLOAT UNSIGNED STRIDE(8) CONST(20, 1) 5118 0000 0000 c200 ALLOC POSITION SIZE(0x0) 5119 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 5120 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 5121 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 5122 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 5123 06: 00038000 00000000 c2000000 ALU: MAXv export0.xy__ = R0, R0 5124 0000 0000 0000 NOP 51250110b0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 51260110b100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000010 13480000 51270110b120: 0040: 40252fc8 00000008 000f803e 00000000 c2010100 00038000 00000000 c2000000 5128t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 5129 fragment shader, start=0000, size=000c 5130 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 5131 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 5132 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 5133 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 5134 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 5135 0000 0000 0000 NOP 51360110b140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 51370110b160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 5138t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5139 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 51400110b17c: 0000: c0012d00 00040181 00000106 5141t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5142 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 51430110b188: 0000: c0012d00 00040180 10030002 5144t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 51450110b19c: 0.000000 0.000000 0.000000 0.000000 51460110b194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 5147t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5148 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 51490110b1ac: 0000: c0012d00 00040202 00001c20 5150t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5151 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 51520110b1b8: 0000: c0012d00 00040201 00000000 5153t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5154 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 51550110b1c4: 0000: c0012d00 00040104 0000000f 5156t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5157 RB_BLEND_RED: 0 5158 RB_BLEND_GREEN: 0 5159 RB_BLEND_BLUE: 0 5160 RB_BLEND_ALPHA: 0 51610110b1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 5162t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 5163 set texture const 0000 5164 clamp x/y/z: clamp-last-texel/clamp-last-texel/wrap 5165 filter min/mag: point/point 5166 swizzle: xyzw 5167 addr=01230000 (flags=820), size=64x128, pitch=16448, format=FMT_1_REVERSE 5168 mipaddr=01240000 (flags=200) 51690110b1e8: 0000: c0062d00 00010000 80804800 01230820 000fe03f 00000d11 000001c0 01240200 5170t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5171 VGT_INDX_OFFSET: 0 51720110b208: 0000: c0012d00 00040102 00000000 5173t0 write TC_CNTL_STATUS (0e00) 5174 TC_CNTL_STATUS: { L2_INVALIDATE } 51750110b214: 0000: 00000e00 00000001 5176t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 51770110b21c: 0000: c0035200 000005d0 00000000 00001000 00000001 5178t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 51790110b230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 5180t0 write CP_SCRATCH_REG7 (057f) 5181 CP_SCRATCH_REG7: 91 5182 :0,0,95,91 51830110b24c: 0000: 0000057f 0000005b 5184t3 opcode: CP_NOP (10) (2 dwords) 51850110b254: 0000: c0001000 00000000 5186t3 opcode: CP_DRAW_INDX (22) (5 dwords) 5187 { VIZ_QUERY = 0 } 5188 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x60000 } 5189 { NUM_INDICES = 18011596 } 5190 { INDX_BASE = 0xc } 5191 draw: 0 5192 prim_type: DI_PT_TRILIST (4) 5193 source_select: DI_SRC_SEL_DMA (0) 5194 num_indices: 18011596 5195 draw[15] register values 5196 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 5197 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 5198 + 00000000 CP_PERFMON_CNTL: 0 5199!+ 0000005f CP_SCRATCH_REG6: 95 5200 :0,0,95,91 5201!+ 0000005b CP_SCRATCH_REG7: 91 5202 :0,0,95,91 5203 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 5204 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 5205 + 00000002 TP0_CHICKEN: 0x2 5206 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 5207!+ 00000100 RB_SURFACE_INFO: { SURFACE_PITCH = 256 | MSAA_SAMPLES = 0 } 5208!+ 0108a205 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0x108a000 } 5209 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 5210!+ 01000100 PA_SC_SCREEN_SCISSOR_BR: { X = 256 | Y = 256 } 5211 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 5212 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 5213!+ 01000100 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 5214 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 5215 + 00000000 VGT_MIN_VTX_INDX: 0 5216 + 00000000 VGT_INDX_OFFSET: 0 5217 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 5218 + 00000000 RB_BLEND_RED: 0 5219 + 00000000 RB_BLEND_GREEN: 0 5220 + 00000000 RB_BLEND_BLUE: 0 5221 + 00000000 RB_BLEND_ALPHA: 0 5222 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5223 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5224 + 00000000 RB_ALPHA_REF: 0 5225!+ 43000000 PA_CL_VPORT_XSCALE: 128.000000 5226!+ 43000000 PA_CL_VPORT_XOFFSET: 128.000000 5227!+ c3000000 PA_CL_VPORT_YSCALE: -128.000000 5228!+ 43000000 PA_CL_VPORT_YOFFSET: 128.000000 5229!+ 3f000000 PA_CL_VPORT_ZSCALE: 0.500000 5230!+ 3f000000 PA_CL_VPORT_ZOFFSET: 0.500000 5231 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 5232 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 5233 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 5234 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 5235 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 5236 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 5237 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 5238!+ 00001c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 5239 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 5240!+ 00090240 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 5241 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 5242 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 5243 + 88888888 RB_SAMPLE_POS: 0x88888888 5244!+ 00080008 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 5245!+ 00080008 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 5246!+ 00000008 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 5247 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 5248 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 5249 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 5250 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 5251 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 5252 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 5253 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 5254 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 5255 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 5256 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 5257 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 5258 + 0000ffff PA_SC_AA_MASK: 0xffff 5259 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 5260 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 5261 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 5262 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 52630110b25c: 0000: c0032200 00000000 00060004 0112d5cc 0000000c 5264t0 write CP_SCRATCH_REG7 (057f) 5265NEEDS WFI: CP_SCRATCH_REG7 (57f) 5266 CP_SCRATCH_REG7: 92 5267 :0,0,95,92 52680110b270: 0000: 0000057f 0000005c 5269t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 52700110b278: 0000: c0002600 00000000 5271t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5272 { EVENT = CACHE_FLUSH } 5273 event CACHE_FLUSH 52740110b280: 0000: c0004600 00000006 5275t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5276 { EVENT = CACHE_FLUSH } 5277 event CACHE_FLUSH 52780110b288: 0000: c0004600 00000006 5279t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5280 { EVENT = CACHE_FLUSH } 5281 event CACHE_FLUSH 52820110b290: 0000: c0004600 00000006 5283t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5284 { EVENT = CACHE_FLUSH } 5285 event CACHE_FLUSH 52860110b298: 0000: c0004600 00000006 5287t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5288 { EVENT = CACHE_FLUSH } 5289 event CACHE_FLUSH 52900110b2a0: 0000: c0004600 00000006 5291t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5292 { EVENT = CACHE_FLUSH } 5293 event CACHE_FLUSH 52940110b2a8: 0000: c0004600 00000006 5295t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5296 { EVENT = CACHE_FLUSH } 5297 event CACHE_FLUSH 52980110b2b0: 0000: c0004600 00000006 5299t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5300 { EVENT = CACHE_FLUSH } 5301 event CACHE_FLUSH 53020110b2b8: 0000: c0004600 00000006 5303t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5304 { EVENT = CACHE_FLUSH } 5305 event CACHE_FLUSH 53060110b2c0: 0000: c0004600 00000006 5307t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5308 { EVENT = CACHE_FLUSH } 5309 event CACHE_FLUSH 53100110b2c8: 0000: c0004600 00000006 5311t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5312 { EVENT = CACHE_FLUSH } 5313 event CACHE_FLUSH 53140110b2d0: 0000: c0004600 00000006 5315t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5316 { EVENT = CACHE_FLUSH } 5317 event CACHE_FLUSH 53180110b2d8: 0000: c0004600 00000006 53190110c1d8: 0000: c0013700 0110b000 000000b8 5320t2 nop 5321############################################################ 5322vertices: 0 5323cmd: deqp-gles2/185: fence=1262 5324############################################################ 5325cmdstream: 124 dwords 5326t0 write RB_BC_CONTROL (0f01) 5327 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 53280122d000: 0000: 00000f01 1c004046 5329t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5330 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 53310122d008: 0000: c0012d00 00040293 00000020 5332t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5333 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 53340122d014: 0000: c0012d00 00040316 00000002 5335t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5336 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 53370122d020: 0000: c0012d00 00040317 00000002 5338t0 write CP_PERFMON_CNTL (0444) 5339 CP_PERFMON_CNTL: 0 53400122d02c: 0000: 00000444 00000000 5341t0 write RBBM_PM_OVERRIDE1 (039c) 5342 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 5343 RBBM_PM_OVERRIDE2: 0xfff 53440122d034: 0000: 0001039c ffffffff 00000fff 5345t0 write TP0_CHICKEN (0e1e) 5346 TP0_CHICKEN: 0x2 53470122d040: 0000: 00000e1e 00000002 5348t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 53490122d048: 0000: c0003b00 00007fff 5350t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5351 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 53520122d050: 0000: c0012d00 00040307 00100020 5353t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5354 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 53550122d05c: 0000: c0012d00 00040308 000e0120 5356t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5357 VGT_MAX_VTX_INDX: 0xffffffff 5358 VGT_MIN_VTX_INDX: 0 53590122d068: 0000: c0022d00 00040100 ffffffff 00000000 5360t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5361 VGT_INDX_OFFSET: 0 53620122d078: 0000: c0012d00 00040102 00000000 5363t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5364 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 53650122d084: 0000: c0012d00 00040181 00000004 5366t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5367 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 53680122d090: 0000: c0012d00 00040182 ffffffff 5369t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5370 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 53710122d09c: 0000: c0012d00 00040301 00000000 5372t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5373 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 53740122d0a8: 0000: c0012d00 00040300 00000000 5375t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5376 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 53770122d0b4: 0000: c0012d00 00040080 00000000 5378t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5379 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 53800122d0c0: 0000: c0012d00 00040208 00000004 5381t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5382 RB_SAMPLE_POS: 0x88888888 53830122d0cc: 0000: c0012d00 0004020a 88888888 5384t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5385 RB_COLOR_DEST_MASK: 0xffffffff 53860122d0d8: 0000: c0012d00 00040326 ffffffff 5387t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5388 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 53890122d0e4: 0000: c0012d00 0004031b 0003c000 5390t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5391 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 5392 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 53930122d0f0: 0000: c0022d00 00040183 00000000 00000000 5394t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 53950122d100: 0000: c0004b00 00000000 5396t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 53970122d108: 0000: c0035200 000005d0 00000000 5f601000 00000001 5398t0 write SQ_INST_STORE_MANAGMENT (0d02) 5399 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 54000122d11c: 0000: 00000d02 00000180 5401t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 54020122d124: 0000: c0003b00 00000300 5403t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 54040122d12c: 0000: c0004a00 80000180 5405t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 54060122d13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 54070122d15c: 2.000000 0.750000 0.375000 0.250000 54080122d134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 54090122d154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 5410t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5411 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 54120122d16c: 0000: c0012d00 00040104 0000000f 5413t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5414 RB_BLEND_RED: 0 5415 RB_BLEND_GREEN: 0 5416 RB_BLEND_BLUE: 0 5417 RB_BLEND_ALPHA: 0xff 54180122d178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 5419t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5420 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 54210122d190: 0000: c0012d00 00040206 0000043f 5422t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5423 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 54240122d19c: 0000: c0012d00 00040000 00000020 5425t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5426 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1254000 } 54270122d1a8: 0000: c0012d00 00040001 01254245 5428t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5429 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 5430 PA_SC_SCREEN_SCISSOR_BR: { X = 32 | Y = 64 } 54310122d1b4: 0000: c0022d00 0004000e 80000000 00400020 5432t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5433 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 54340122d1c4: 0000: c0012d00 00040080 00000000 5435t0 write CP_SCRATCH_REG6 (057e) 5436 CP_SCRATCH_REG6: 101 5437 :0,0,101,92 54380122d1d0: 0000: 0000057e 00000065 5439t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 5440 ibaddr:0122e000 5441 ibsize:000000b6 5442t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5443 set shader const 0078 54440122e000: 0000: c0042d00 00010078 0112d5db 00100000 0112d5db 00100000 5445t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5446 PA_SC_AA_MASK: 0xffff 54470122e018: 0000: c0012d00 00040312 0000ffff 5448t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5449 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 54500122e024: 0000: c0012d00 00040200 00000000 5451t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 5452 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5453 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5454 RB_ALPHA_REF: 0 54550122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 5456t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5457 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 5458 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 54590122e044: 0000: c0022d00 00040204 00000000 00090244 5460t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5461 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 5462 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 5463 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 5464 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 54650122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 5466t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 5467 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 5468 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 5469 PA_CL_GB_VERT_DISC_ADJ: 1.000000 5470 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 5471 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 54720122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 5473t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5474 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 5475 PA_SC_WINDOW_SCISSOR_BR: { X = 32 | Y = 64 } 54760122e088: 0000: c0022d00 00040081 00000000 00400020 5477t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 5478 PA_CL_VPORT_XSCALE: 16.000000 5479 PA_CL_VPORT_XOFFSET: 16.000000 5480 PA_CL_VPORT_YSCALE: 32.000000 5481 PA_CL_VPORT_YOFFSET: 32.000000 5482 PA_CL_VPORT_ZSCALE: 0.000000 5483 PA_CL_VPORT_ZOFFSET: 0.000000 54840122e098: 0000: c0062d00 0004010f 41800000 41800000 42000000 42000000 00000000 00000000 5485t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 54860122e0c0: 16.000000 32.000000 0.000000 0.000000 16.000000 32.000000 0.000000 0.000000 54870122e0b8: 0000: c0082d00 00000184 41800000 42000000 00000000 00000000 41800000 42000000 5488* 5489t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 5490 vertex shader, start=0000, size=0015 5491 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 5492 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 5493 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 5494 0000 0000 c200 ALLOC POSITION SIZE(0x0) 5495 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 5496 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 5497 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 5498 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 5499 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 5500 0000 0000 0000 NOP 55010122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 55020122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 55030122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 5504t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 5505 fragment shader, start=0000, size=000c 5506 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 5507 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 5508 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 5509 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 5510 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 5511 0000 0000 0000 NOP 55120122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 55130122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 5514t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5515 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 55160122e17c: 0000: c0012d00 00040181 00000106 5517t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5518 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 55190122e188: 0000: c0012d00 00040180 10030002 5520t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 55210122e19c: 0.000000 0.000000 0.000000 0.000000 55220122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 5523t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5524 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 55250122e1ac: 0000: c0012d00 00040202 00000c20 5526t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5527 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 55280122e1b8: 0000: c0012d00 00040201 00000000 5529t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5530 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 55310122e1c4: 0000: c0012d00 00040104 0000000f 5532t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5533 RB_BLEND_RED: 0 5534 RB_BLEND_GREEN: 0 5535 RB_BLEND_BLUE: 0 5536 RB_BLEND_ALPHA: 0 55370122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 5538t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 5539 set texture const 0000 5540 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 5541 filter min/mag: point/point 5542 swizzle: zyxw 5543 addr=0108a000 (flags=806), size=256x256, pitch=16640, format=FMT_8_8_8_8 5544 mipaddr=00000000 (flags=200) 55450122e1e8: 0000: c0062d00 00010000 82024800 0108a806 001fe0ff 00000c14 00000000 00000200 5546t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5547 VGT_INDX_OFFSET: 0 55480122e208: 0000: c0012d00 00040102 00000000 5549t0 write TC_CNTL_STATUS (0e00) 5550 TC_CNTL_STATUS: { L2_INVALIDATE } 55510122e214: 0000: 00000e00 00000001 5552t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 55530122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 5554t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 55550122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 5556t0 write CP_SCRATCH_REG7 (057f) 5557 CP_SCRATCH_REG7: 97 5558 :0,0,101,97 55590122e24c: 0000: 0000057f 00000061 5560t3 opcode: CP_NOP (10) (2 dwords) 55610122e254: 0000: c0001000 00000000 5562t3 opcode: CP_DRAW_INDX (22) (3 dwords) 5563 { VIZ_QUERY = 0 } 5564 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 5565 draw: 0 5566 prim_type: DI_PT_TRIFAN (5) 5567 source_select: DI_SRC_SEL_AUTO_INDEX (2) 5568 num_indices: 1407 5569 draw[16] register values 5570 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 5571 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 5572 + 00000000 CP_PERFMON_CNTL: 0 5573!+ 00000065 CP_SCRATCH_REG6: 101 5574 :0,0,101,97 5575!+ 00000061 CP_SCRATCH_REG7: 97 5576 :0,0,101,97 5577 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 5578 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 5579 + 00000002 TP0_CHICKEN: 0x2 5580 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 5581!+ 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 5582!+ 01254245 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1254000 } 5583 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 5584!+ 00400020 PA_SC_SCREEN_SCISSOR_BR: { X = 32 | Y = 64 } 5585 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 5586 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 5587!+ 00400020 PA_SC_WINDOW_SCISSOR_BR: { X = 32 | Y = 64 } 5588 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 5589 + 00000000 VGT_MIN_VTX_INDX: 0 5590 + 00000000 VGT_INDX_OFFSET: 0 5591 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 5592 + 00000000 RB_BLEND_RED: 0 5593 + 00000000 RB_BLEND_GREEN: 0 5594 + 00000000 RB_BLEND_BLUE: 0 5595 + 00000000 RB_BLEND_ALPHA: 0 5596 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5597 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5598 + 00000000 RB_ALPHA_REF: 0 5599!+ 41800000 PA_CL_VPORT_XSCALE: 16.000000 5600!+ 41800000 PA_CL_VPORT_XOFFSET: 16.000000 5601!+ 42000000 PA_CL_VPORT_YSCALE: 32.000000 5602!+ 42000000 PA_CL_VPORT_YOFFSET: 32.000000 5603!+ 00000000 PA_CL_VPORT_ZSCALE: 0.000000 5604!+ 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 5605 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 5606 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 5607 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 5608 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 5609 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 5610 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 5611 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 5612!+ 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 5613 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 5614!+ 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 5615 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 5616 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 5617 + 88888888 RB_SAMPLE_POS: 0x88888888 5618!+ 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 5619!+ 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 5620!+ 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 5621 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 5622 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 5623 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 5624 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 5625 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 5626 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 5627 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 5628 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 5629 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 5630 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 5631 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 5632 + 0000ffff PA_SC_AA_MASK: 0xffff 5633 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 5634 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 5635 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 5636 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 56370122e25c: 0000: c0012200 00000000 00040085 5638t0 write CP_SCRATCH_REG7 (057f) 5639NEEDS WFI: CP_SCRATCH_REG7 (57f) 5640 CP_SCRATCH_REG7: 98 5641 :0,0,101,98 56420122e268: 0000: 0000057f 00000062 5643t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 56440122e270: 0000: c0002600 00000000 5645t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5646 { EVENT = CACHE_FLUSH } 5647 event CACHE_FLUSH 56480122e278: 0000: c0004600 00000006 5649t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5650 { EVENT = CACHE_FLUSH } 5651 event CACHE_FLUSH 56520122e280: 0000: c0004600 00000006 5653t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5654 { EVENT = CACHE_FLUSH } 5655 event CACHE_FLUSH 56560122e288: 0000: c0004600 00000006 5657t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5658 { EVENT = CACHE_FLUSH } 5659 event CACHE_FLUSH 56600122e290: 0000: c0004600 00000006 5661t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5662 { EVENT = CACHE_FLUSH } 5663 event CACHE_FLUSH 56640122e298: 0000: c0004600 00000006 5665t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5666 { EVENT = CACHE_FLUSH } 5667 event CACHE_FLUSH 56680122e2a0: 0000: c0004600 00000006 5669t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5670 { EVENT = CACHE_FLUSH } 5671 event CACHE_FLUSH 56720122e2a8: 0000: c0004600 00000006 5673t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5674 { EVENT = CACHE_FLUSH } 5675 event CACHE_FLUSH 56760122e2b0: 0000: c0004600 00000006 5677t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5678 { EVENT = CACHE_FLUSH } 5679 event CACHE_FLUSH 56800122e2b8: 0000: c0004600 00000006 5681t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5682 { EVENT = CACHE_FLUSH } 5683 event CACHE_FLUSH 56840122e2c0: 0000: c0004600 00000006 5685t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5686 { EVENT = CACHE_FLUSH } 5687 event CACHE_FLUSH 56880122e2c8: 0000: c0004600 00000006 5689t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 5690 { EVENT = CACHE_FLUSH } 5691 event CACHE_FLUSH 56920122e2d0: 0000: c0004600 00000006 56930122d1d8: 0000: c0013700 0122e000 000000b6 5694t2 nop 5695############################################################ 5696vertices: 0 5697cmd: deqp-gles2/185: fence=1263 5698############################################################ 5699cmdstream: 124 dwords 5700t0 write RB_BC_CONTROL (0f01) 5701 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 57020110a000: 0000: 00000f01 1c004046 5703t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5704 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 57050110a008: 0000: c0012d00 00040293 00000020 5706t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5707 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 57080110a014: 0000: c0012d00 00040316 00000002 5709t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5710 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 57110110a020: 0000: c0012d00 00040317 00000002 5712t0 write CP_PERFMON_CNTL (0444) 5713 CP_PERFMON_CNTL: 0 57140110a02c: 0000: 00000444 00000000 5715t0 write RBBM_PM_OVERRIDE1 (039c) 5716 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 5717 RBBM_PM_OVERRIDE2: 0xfff 57180110a034: 0000: 0001039c ffffffff 00000fff 5719t0 write TP0_CHICKEN (0e1e) 5720 TP0_CHICKEN: 0x2 57210110a040: 0000: 00000e1e 00000002 5722t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 57230110a048: 0000: c0003b00 00007fff 5724t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5725 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 57260110a050: 0000: c0012d00 00040307 00100020 5727t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5728 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 57290110a05c: 0000: c0012d00 00040308 000e0120 5730t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5731 VGT_MAX_VTX_INDX: 0xffffffff 5732 VGT_MIN_VTX_INDX: 0 57330110a068: 0000: c0022d00 00040100 ffffffff 00000000 5734t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5735 VGT_INDX_OFFSET: 0 57360110a078: 0000: c0012d00 00040102 00000000 5737t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5738 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 57390110a084: 0000: c0012d00 00040181 00000004 5740t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5741 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 57420110a090: 0000: c0012d00 00040182 ffffffff 5743t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5744 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 57450110a09c: 0000: c0012d00 00040301 00000000 5746t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5747 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 57480110a0a8: 0000: c0012d00 00040300 00000000 5749t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5750 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 57510110a0b4: 0000: c0012d00 00040080 00000000 5752t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5753 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 57540110a0c0: 0000: c0012d00 00040208 00000004 5755t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5756 RB_SAMPLE_POS: 0x88888888 57570110a0cc: 0000: c0012d00 0004020a 88888888 5758t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5759 RB_COLOR_DEST_MASK: 0xffffffff 57600110a0d8: 0000: c0012d00 00040326 ffffffff 5761t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5762 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 57630110a0e4: 0000: c0012d00 0004031b 0003c000 5764t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5765 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 5766 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 57670110a0f0: 0000: c0022d00 00040183 00000000 00000000 5768t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 57690110a100: 0000: c0004b00 00000000 5770t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 57710110a108: 0000: c0035200 000005d0 00000000 5f601000 00000001 5772t0 write SQ_INST_STORE_MANAGMENT (0d02) 5773 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 57740110a11c: 0000: 00000d02 00000180 5775t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 57760110a124: 0000: c0003b00 00000300 5777t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 57780110a12c: 0000: c0004a00 80000180 5779t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 57800110a13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 57810110a15c: 2.000000 0.750000 0.375000 0.250000 57820110a134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 57830110a154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 5784t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5785 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 57860110a16c: 0000: c0012d00 00040104 0000000f 5787t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5788 RB_BLEND_RED: 0 5789 RB_BLEND_GREEN: 0 5790 RB_BLEND_BLUE: 0 5791 RB_BLEND_ALPHA: 0xff 57920110a178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 5793t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5794 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 57950110a190: 0000: c0012d00 00040206 0000043f 5796t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5797 RB_SURFACE_INFO: { SURFACE_PITCH = 256 | MSAA_SAMPLES = 0 } 57980110a19c: 0000: c0012d00 00040000 00000100 5799t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5800 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0x108a000 } 58010110a1a8: 0000: c0012d00 00040001 0108a205 5802t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5803 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 5804 PA_SC_SCREEN_SCISSOR_BR: { X = 256 | Y = 256 } 58050110a1b4: 0000: c0022d00 0004000e 80000000 01000100 5806t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5807 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 58080110a1c4: 0000: c0012d00 00040080 00000000 5809t0 write CP_SCRATCH_REG6 (057e) 5810 CP_SCRATCH_REG6: 107 5811 :0,0,107,98 58120110a1d0: 0000: 0000057e 0000006b 5813t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 5814 ibaddr:0110b000 5815 ibsize:000000b8 5816t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5817 set shader const 0078 58180110b000: 0000: c0042d00 00010078 0112d65b 00100000 0112d69b 00100000 5819t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5820 PA_SC_AA_MASK: 0xffff 58210110b018: 0000: c0012d00 00040312 0000ffff 5822t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5823 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 58240110b024: 0000: c0012d00 00040200 00000000 5825t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 5826 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5827 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5828 RB_ALPHA_REF: 0 58290110b030: 0000: c0032d00 0004010c 00000000 00000000 00000000 5830t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5831 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 5832 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 58330110b044: 0000: c0022d00 00040204 00000000 00090240 5834t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5835 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 5836 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 5837 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 5838 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 58390110b054: 0000: c0042d00 00040280 00080008 00080008 00000008 00000000 5840t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 5841 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 5842 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 5843 PA_CL_GB_VERT_DISC_ADJ: 1.000000 5844 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 5845 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 58460110b06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 5847t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 5848 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 5849 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 58500110b088: 0000: c0022d00 00040081 00000000 01000100 5851t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 5852 PA_CL_VPORT_XSCALE: 128.000000 5853 PA_CL_VPORT_XOFFSET: 128.000000 5854 PA_CL_VPORT_YSCALE: -128.000000 5855 PA_CL_VPORT_YOFFSET: 128.000000 5856 PA_CL_VPORT_ZSCALE: 0.500000 5857 PA_CL_VPORT_ZOFFSET: 0.500000 58580110b098: 0000: c0062d00 0004010f 43000000 43000000 c3000000 43000000 3f000000 3f000000 5859t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 58600110b0c0: 128.000000 128.000000 0.500000 0.000000 128.000000 -128.000000 0.500000 0.000000 58610110b0b8: 0000: c0082d00 00000184 43000000 43000000 3f000000 00000000 43000000 c3000000 58620110b0d8: 0020: 3f000000 00000000 5863t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 5864 vertex shader, start=0000, size=0015 5865 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 5866 03: 19481000 00262688 00000010 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(16) CONST(20, 0) 5867 04: 13480000 40252fc8 00000008 FETCH: VERTEX R0.xy__ = R0.x FMT_32_32_FLOAT UNSIGNED STRIDE(8) CONST(20, 1) 5868 0000 0000 c200 ALLOC POSITION SIZE(0x0) 5869 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 5870 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 5871 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 5872 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 5873 06: 00038000 00000000 c2000000 ALU: MAXv export0.xy__ = R0, R0 5874 0000 0000 0000 NOP 58750110b0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 58760110b100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000010 13480000 58770110b120: 0040: 40252fc8 00000008 000f803e 00000000 c2010100 00038000 00000000 c2000000 5878t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 5879 fragment shader, start=0000, size=000c 5880 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 5881 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 5882 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 5883 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 5884 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 5885 0000 0000 0000 NOP 58860110b140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 58870110b160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 5888t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5889 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 58900110b17c: 0000: c0012d00 00040181 00000106 5891t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5892 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 58930110b188: 0000: c0012d00 00040180 10030002 5894t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 58950110b19c: 0.000000 0.000000 0.000000 0.000000 58960110b194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 5897t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5898 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 58990110b1ac: 0000: c0012d00 00040202 00001c20 5900t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5901 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 59020110b1b8: 0000: c0012d00 00040201 00000000 5903t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5904 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 59050110b1c4: 0000: c0012d00 00040104 0000000f 5906t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 5907 RB_BLEND_RED: 0 5908 RB_BLEND_GREEN: 0 5909 RB_BLEND_BLUE: 0 5910 RB_BLEND_ALPHA: 0 59110110b1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 5912t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 5913 set texture const 0000 5914 clamp x/y/z: clamp-last-texel/clamp-last-texel/wrap 5915 filter min/mag: point/point 5916 swizzle: xyzw 5917 addr=01230000 (flags=820), size=64x128, pitch=16448, format=FMT_1_REVERSE 5918 mipaddr=01240000 (flags=200) 59190110b1e8: 0000: c0062d00 00010000 80804800 01230820 000fe03f 00000d11 000001c0 01240200 5920t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 5921 VGT_INDX_OFFSET: 0 59220110b208: 0000: c0012d00 00040102 00000000 5923t0 write TC_CNTL_STATUS (0e00) 5924 TC_CNTL_STATUS: { L2_INVALIDATE } 59250110b214: 0000: 00000e00 00000001 5926t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 59270110b21c: 0000: c0035200 000005d0 00000000 00001000 00000001 5928t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 59290110b230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 5930t0 write CP_SCRATCH_REG7 (057f) 5931 CP_SCRATCH_REG7: 103 5932 :0,0,107,103 59330110b24c: 0000: 0000057f 00000067 5934t3 opcode: CP_NOP (10) (2 dwords) 59350110b254: 0000: c0001000 00000000 5936t3 opcode: CP_DRAW_INDX (22) (5 dwords) 5937 { VIZ_QUERY = 0 } 5938 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x60000 } 5939 { NUM_INDICES = 18011832 } 5940 { INDX_BASE = 0xc } 5941 draw: 0 5942 prim_type: DI_PT_TRILIST (4) 5943 source_select: DI_SRC_SEL_DMA (0) 5944 num_indices: 18011832 5945 draw[17] register values 5946 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 5947 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 5948 + 00000000 CP_PERFMON_CNTL: 0 5949!+ 0000006b CP_SCRATCH_REG6: 107 5950 :0,0,107,103 5951!+ 00000067 CP_SCRATCH_REG7: 103 5952 :0,0,107,103 5953 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 5954 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 5955 + 00000002 TP0_CHICKEN: 0x2 5956 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 5957!+ 00000100 RB_SURFACE_INFO: { SURFACE_PITCH = 256 | MSAA_SAMPLES = 0 } 5958!+ 0108a205 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0x108a000 } 5959 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 5960!+ 01000100 PA_SC_SCREEN_SCISSOR_BR: { X = 256 | Y = 256 } 5961 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 5962 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 5963!+ 01000100 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 5964 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 5965 + 00000000 VGT_MIN_VTX_INDX: 0 5966 + 00000000 VGT_INDX_OFFSET: 0 5967 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 5968 + 00000000 RB_BLEND_RED: 0 5969 + 00000000 RB_BLEND_GREEN: 0 5970 + 00000000 RB_BLEND_BLUE: 0 5971 + 00000000 RB_BLEND_ALPHA: 0 5972 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5973 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 5974 + 00000000 RB_ALPHA_REF: 0 5975!+ 43000000 PA_CL_VPORT_XSCALE: 128.000000 5976!+ 43000000 PA_CL_VPORT_XOFFSET: 128.000000 5977!+ c3000000 PA_CL_VPORT_YSCALE: -128.000000 5978!+ 43000000 PA_CL_VPORT_YOFFSET: 128.000000 5979!+ 3f000000 PA_CL_VPORT_ZSCALE: 0.500000 5980!+ 3f000000 PA_CL_VPORT_ZOFFSET: 0.500000 5981 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 5982 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 5983 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 5984 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 5985 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 5986 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 5987 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 5988!+ 00001c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 5989 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 5990!+ 00090240 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 5991 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 5992 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 5993 + 88888888 RB_SAMPLE_POS: 0x88888888 5994!+ 00080008 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 5995!+ 00080008 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 5996!+ 00000008 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 5997 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 5998 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 5999 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 6000 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 6001 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 6002 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 6003 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 6004 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 6005 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 6006 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 6007 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 6008 + 0000ffff PA_SC_AA_MASK: 0xffff 6009 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 6010 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 6011 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 6012 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 60130110b25c: 0000: c0032200 00000000 00060004 0112d6b8 0000000c 6014t0 write CP_SCRATCH_REG7 (057f) 6015NEEDS WFI: CP_SCRATCH_REG7 (57f) 6016 CP_SCRATCH_REG7: 104 6017 :0,0,107,104 60180110b270: 0000: 0000057f 00000068 6019t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 60200110b278: 0000: c0002600 00000000 6021t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6022 { EVENT = CACHE_FLUSH } 6023 event CACHE_FLUSH 60240110b280: 0000: c0004600 00000006 6025t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6026 { EVENT = CACHE_FLUSH } 6027 event CACHE_FLUSH 60280110b288: 0000: c0004600 00000006 6029t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6030 { EVENT = CACHE_FLUSH } 6031 event CACHE_FLUSH 60320110b290: 0000: c0004600 00000006 6033t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6034 { EVENT = CACHE_FLUSH } 6035 event CACHE_FLUSH 60360110b298: 0000: c0004600 00000006 6037t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6038 { EVENT = CACHE_FLUSH } 6039 event CACHE_FLUSH 60400110b2a0: 0000: c0004600 00000006 6041t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6042 { EVENT = CACHE_FLUSH } 6043 event CACHE_FLUSH 60440110b2a8: 0000: c0004600 00000006 6045t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6046 { EVENT = CACHE_FLUSH } 6047 event CACHE_FLUSH 60480110b2b0: 0000: c0004600 00000006 6049t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6050 { EVENT = CACHE_FLUSH } 6051 event CACHE_FLUSH 60520110b2b8: 0000: c0004600 00000006 6053t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6054 { EVENT = CACHE_FLUSH } 6055 event CACHE_FLUSH 60560110b2c0: 0000: c0004600 00000006 6057t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6058 { EVENT = CACHE_FLUSH } 6059 event CACHE_FLUSH 60600110b2c8: 0000: c0004600 00000006 6061t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6062 { EVENT = CACHE_FLUSH } 6063 event CACHE_FLUSH 60640110b2d0: 0000: c0004600 00000006 6065t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6066 { EVENT = CACHE_FLUSH } 6067 event CACHE_FLUSH 60680110b2d8: 0000: c0004600 00000006 60690110a1d8: 0000: c0013700 0110b000 000000b8 6070t2 nop 6071############################################################ 6072vertices: 0 6073cmd: deqp-gles2/185: fence=1264 6074############################################################ 6075cmdstream: 124 dwords 6076t0 write RB_BC_CONTROL (0f01) 6077 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 60780122f000: 0000: 00000f01 1c004046 6079t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6080 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 60810122f008: 0000: c0012d00 00040293 00000020 6082t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6083 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 60840122f014: 0000: c0012d00 00040316 00000002 6085t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6086 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 60870122f020: 0000: c0012d00 00040317 00000002 6088t0 write CP_PERFMON_CNTL (0444) 6089 CP_PERFMON_CNTL: 0 60900122f02c: 0000: 00000444 00000000 6091t0 write RBBM_PM_OVERRIDE1 (039c) 6092 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 6093 RBBM_PM_OVERRIDE2: 0xfff 60940122f034: 0000: 0001039c ffffffff 00000fff 6095t0 write TP0_CHICKEN (0e1e) 6096 TP0_CHICKEN: 0x2 60970122f040: 0000: 00000e1e 00000002 6098t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 60990122f048: 0000: c0003b00 00007fff 6100t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6101 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 61020122f050: 0000: c0012d00 00040307 00100020 6103t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6104 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 61050122f05c: 0000: c0012d00 00040308 000e0120 6106t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6107 VGT_MAX_VTX_INDX: 0xffffffff 6108 VGT_MIN_VTX_INDX: 0 61090122f068: 0000: c0022d00 00040100 ffffffff 00000000 6110t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6111 VGT_INDX_OFFSET: 0 61120122f078: 0000: c0012d00 00040102 00000000 6113t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6114 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 61150122f084: 0000: c0012d00 00040181 00000004 6116t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6117 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 61180122f090: 0000: c0012d00 00040182 ffffffff 6119t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6120 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 61210122f09c: 0000: c0012d00 00040301 00000000 6122t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6123 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 61240122f0a8: 0000: c0012d00 00040300 00000000 6125t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6126 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 61270122f0b4: 0000: c0012d00 00040080 00000000 6128t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6129 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 61300122f0c0: 0000: c0012d00 00040208 00000004 6131t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6132 RB_SAMPLE_POS: 0x88888888 61330122f0cc: 0000: c0012d00 0004020a 88888888 6134t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6135 RB_COLOR_DEST_MASK: 0xffffffff 61360122f0d8: 0000: c0012d00 00040326 ffffffff 6137t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6138 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 61390122f0e4: 0000: c0012d00 0004031b 0003c000 6140t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6141 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 6142 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 61430122f0f0: 0000: c0022d00 00040183 00000000 00000000 6144t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 61450122f100: 0000: c0004b00 00000000 6146t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 61470122f108: 0000: c0035200 000005d0 00000000 5f601000 00000001 6148t0 write SQ_INST_STORE_MANAGMENT (0d02) 6149 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 61500122f11c: 0000: 00000d02 00000180 6151t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 61520122f124: 0000: c0003b00 00000300 6153t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 61540122f12c: 0000: c0004a00 80000180 6155t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 61560122f13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 61570122f15c: 2.000000 0.750000 0.375000 0.250000 61580122f134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 61590122f154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 6160t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6161 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 61620122f16c: 0000: c0012d00 00040104 0000000f 6163t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6164 RB_BLEND_RED: 0 6165 RB_BLEND_GREEN: 0 6166 RB_BLEND_BLUE: 0 6167 RB_BLEND_ALPHA: 0xff 61680122f178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 6169t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6170 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 61710122f190: 0000: c0012d00 00040206 0000043f 6172t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6173 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 61740122f19c: 0000: c0012d00 00040000 00000020 6175t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6176 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1266000 } 61770122f1a8: 0000: c0012d00 00040001 01266245 6178t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6179 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 6180 PA_SC_SCREEN_SCISSOR_BR: { X = 16 | Y = 32 } 61810122f1b4: 0000: c0022d00 0004000e 80000000 00200010 6182t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6183 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 61840122f1c4: 0000: c0012d00 00040080 00000000 6185t0 write CP_SCRATCH_REG6 (057e) 6186 CP_SCRATCH_REG6: 113 6187 :0,0,113,104 61880122f1d0: 0000: 0000057e 00000071 6189t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 6190 ibaddr:0122e000 6191 ibsize:000000b6 6192t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6193 set shader const 0078 61940122e000: 0000: c0042d00 00010078 0112d6c7 00100000 0112d6c7 00100000 6195t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6196 PA_SC_AA_MASK: 0xffff 61970122e018: 0000: c0012d00 00040312 0000ffff 6198t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6199 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 62000122e024: 0000: c0012d00 00040200 00000000 6201t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 6202 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6203 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6204 RB_ALPHA_REF: 0 62050122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 6206t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6207 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 6208 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 62090122e044: 0000: c0022d00 00040204 00000000 00090244 6210t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6211 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 6212 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 6213 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 6214 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 62150122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 6216t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 6217 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 6218 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 6219 PA_CL_GB_VERT_DISC_ADJ: 1.000000 6220 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 6221 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 62220122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 6223t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6224 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 6225 PA_SC_WINDOW_SCISSOR_BR: { X = 16 | Y = 32 } 62260122e088: 0000: c0022d00 00040081 00000000 00200010 6227t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 6228 PA_CL_VPORT_XSCALE: 8.000000 6229 PA_CL_VPORT_XOFFSET: 8.000000 6230 PA_CL_VPORT_YSCALE: 16.000000 6231 PA_CL_VPORT_YOFFSET: 16.000000 6232 PA_CL_VPORT_ZSCALE: 0.000000 6233 PA_CL_VPORT_ZOFFSET: 0.000000 62340122e098: 0000: c0062d00 0004010f 41000000 41000000 41800000 41800000 00000000 00000000 6235t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 62360122e0c0: 8.000000 16.000000 0.000000 0.000000 8.000000 16.000000 0.000000 0.000000 62370122e0b8: 0000: c0082d00 00000184 41000000 41800000 00000000 00000000 41000000 41800000 6238* 6239t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 6240 vertex shader, start=0000, size=0015 6241 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 6242 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 6243 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 6244 0000 0000 c200 ALLOC POSITION SIZE(0x0) 6245 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 6246 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 6247 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 6248 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 6249 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 6250 0000 0000 0000 NOP 62510122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 62520122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 62530122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 6254t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 6255 fragment shader, start=0000, size=000c 6256 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 6257 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 6258 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 6259 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 6260 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 6261 0000 0000 0000 NOP 62620122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 62630122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 6264t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6265 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 62660122e17c: 0000: c0012d00 00040181 00000106 6267t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6268 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 62690122e188: 0000: c0012d00 00040180 10030002 6270t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 62710122e19c: 0.000000 0.000000 0.000000 0.000000 62720122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 6273t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6274 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 62750122e1ac: 0000: c0012d00 00040202 00000c20 6276t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6277 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 62780122e1b8: 0000: c0012d00 00040201 00000000 6279t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6280 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 62810122e1c4: 0000: c0012d00 00040104 0000000f 6282t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6283 RB_BLEND_RED: 0 6284 RB_BLEND_GREEN: 0 6285 RB_BLEND_BLUE: 0 6286 RB_BLEND_ALPHA: 0 62870122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 6288t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 6289 set texture const 0000 6290 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 6291 filter min/mag: point/point 6292 swizzle: zyxw 6293 addr=0108a000 (flags=806), size=256x256, pitch=16640, format=FMT_8_8_8_8 6294 mipaddr=00000000 (flags=200) 62950122e1e8: 0000: c0062d00 00010000 82024800 0108a806 001fe0ff 00000c14 00000000 00000200 6296t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6297 VGT_INDX_OFFSET: 0 62980122e208: 0000: c0012d00 00040102 00000000 6299t0 write TC_CNTL_STATUS (0e00) 6300 TC_CNTL_STATUS: { L2_INVALIDATE } 63010122e214: 0000: 00000e00 00000001 6302t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 63030122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 6304t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 63050122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 6306t0 write CP_SCRATCH_REG7 (057f) 6307 CP_SCRATCH_REG7: 109 6308 :0,0,113,109 63090122e24c: 0000: 0000057f 0000006d 6310t3 opcode: CP_NOP (10) (2 dwords) 63110122e254: 0000: c0001000 00000000 6312t3 opcode: CP_DRAW_INDX (22) (3 dwords) 6313 { VIZ_QUERY = 0 } 6314 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 6315 draw: 0 6316 prim_type: DI_PT_TRIFAN (5) 6317 source_select: DI_SRC_SEL_AUTO_INDEX (2) 6318 num_indices: 1407 6319 draw[18] register values 6320 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 6321 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 6322 + 00000000 CP_PERFMON_CNTL: 0 6323!+ 00000071 CP_SCRATCH_REG6: 113 6324 :0,0,113,109 6325!+ 0000006d CP_SCRATCH_REG7: 109 6326 :0,0,113,109 6327 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 6328 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 6329 + 00000002 TP0_CHICKEN: 0x2 6330 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 6331!+ 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 6332!+ 01266245 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1266000 } 6333 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 6334!+ 00200010 PA_SC_SCREEN_SCISSOR_BR: { X = 16 | Y = 32 } 6335 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 6336 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 6337!+ 00200010 PA_SC_WINDOW_SCISSOR_BR: { X = 16 | Y = 32 } 6338 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 6339 + 00000000 VGT_MIN_VTX_INDX: 0 6340 + 00000000 VGT_INDX_OFFSET: 0 6341 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 6342 + 00000000 RB_BLEND_RED: 0 6343 + 00000000 RB_BLEND_GREEN: 0 6344 + 00000000 RB_BLEND_BLUE: 0 6345 + 00000000 RB_BLEND_ALPHA: 0 6346 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6347 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6348 + 00000000 RB_ALPHA_REF: 0 6349!+ 41000000 PA_CL_VPORT_XSCALE: 8.000000 6350!+ 41000000 PA_CL_VPORT_XOFFSET: 8.000000 6351!+ 41800000 PA_CL_VPORT_YSCALE: 16.000000 6352!+ 41800000 PA_CL_VPORT_YOFFSET: 16.000000 6353!+ 00000000 PA_CL_VPORT_ZSCALE: 0.000000 6354!+ 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 6355 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 6356 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 6357 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 6358 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 6359 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 6360 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 6361 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 6362!+ 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 6363 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 6364!+ 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 6365 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 6366 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 6367 + 88888888 RB_SAMPLE_POS: 0x88888888 6368!+ 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 6369!+ 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 6370!+ 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 6371 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 6372 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 6373 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 6374 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 6375 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 6376 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 6377 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 6378 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 6379 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 6380 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 6381 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 6382 + 0000ffff PA_SC_AA_MASK: 0xffff 6383 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 6384 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 6385 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 6386 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 63870122e25c: 0000: c0012200 00000000 00040085 6388t0 write CP_SCRATCH_REG7 (057f) 6389NEEDS WFI: CP_SCRATCH_REG7 (57f) 6390 CP_SCRATCH_REG7: 110 6391 :0,0,113,110 63920122e268: 0000: 0000057f 0000006e 6393t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 63940122e270: 0000: c0002600 00000000 6395t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6396 { EVENT = CACHE_FLUSH } 6397 event CACHE_FLUSH 63980122e278: 0000: c0004600 00000006 6399t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6400 { EVENT = CACHE_FLUSH } 6401 event CACHE_FLUSH 64020122e280: 0000: c0004600 00000006 6403t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6404 { EVENT = CACHE_FLUSH } 6405 event CACHE_FLUSH 64060122e288: 0000: c0004600 00000006 6407t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6408 { EVENT = CACHE_FLUSH } 6409 event CACHE_FLUSH 64100122e290: 0000: c0004600 00000006 6411t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6412 { EVENT = CACHE_FLUSH } 6413 event CACHE_FLUSH 64140122e298: 0000: c0004600 00000006 6415t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6416 { EVENT = CACHE_FLUSH } 6417 event CACHE_FLUSH 64180122e2a0: 0000: c0004600 00000006 6419t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6420 { EVENT = CACHE_FLUSH } 6421 event CACHE_FLUSH 64220122e2a8: 0000: c0004600 00000006 6423t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6424 { EVENT = CACHE_FLUSH } 6425 event CACHE_FLUSH 64260122e2b0: 0000: c0004600 00000006 6427t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6428 { EVENT = CACHE_FLUSH } 6429 event CACHE_FLUSH 64300122e2b8: 0000: c0004600 00000006 6431t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6432 { EVENT = CACHE_FLUSH } 6433 event CACHE_FLUSH 64340122e2c0: 0000: c0004600 00000006 6435t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6436 { EVENT = CACHE_FLUSH } 6437 event CACHE_FLUSH 64380122e2c8: 0000: c0004600 00000006 6439t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6440 { EVENT = CACHE_FLUSH } 6441 event CACHE_FLUSH 64420122e2d0: 0000: c0004600 00000006 64430122f1d8: 0000: c0013700 0122e000 000000b6 6444t2 nop 6445############################################################ 6446vertices: 0 6447cmd: deqp-gles2/185: fence=1265 6448############################################################ 6449cmdstream: 124 dwords 6450t0 write RB_BC_CONTROL (0f01) 6451 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 64520110c000: 0000: 00000f01 1c004046 6453t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6454 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 64550110c008: 0000: c0012d00 00040293 00000020 6456t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6457 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 64580110c014: 0000: c0012d00 00040316 00000002 6459t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6460 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 64610110c020: 0000: c0012d00 00040317 00000002 6462t0 write CP_PERFMON_CNTL (0444) 6463 CP_PERFMON_CNTL: 0 64640110c02c: 0000: 00000444 00000000 6465t0 write RBBM_PM_OVERRIDE1 (039c) 6466 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 6467 RBBM_PM_OVERRIDE2: 0xfff 64680110c034: 0000: 0001039c ffffffff 00000fff 6469t0 write TP0_CHICKEN (0e1e) 6470 TP0_CHICKEN: 0x2 64710110c040: 0000: 00000e1e 00000002 6472t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 64730110c048: 0000: c0003b00 00007fff 6474t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6475 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 64760110c050: 0000: c0012d00 00040307 00100020 6477t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6478 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 64790110c05c: 0000: c0012d00 00040308 000e0120 6480t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6481 VGT_MAX_VTX_INDX: 0xffffffff 6482 VGT_MIN_VTX_INDX: 0 64830110c068: 0000: c0022d00 00040100 ffffffff 00000000 6484t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6485 VGT_INDX_OFFSET: 0 64860110c078: 0000: c0012d00 00040102 00000000 6487t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6488 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 64890110c084: 0000: c0012d00 00040181 00000004 6490t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6491 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 64920110c090: 0000: c0012d00 00040182 ffffffff 6493t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6494 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 64950110c09c: 0000: c0012d00 00040301 00000000 6496t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6497 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 64980110c0a8: 0000: c0012d00 00040300 00000000 6499t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6500 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 65010110c0b4: 0000: c0012d00 00040080 00000000 6502t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6503 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 65040110c0c0: 0000: c0012d00 00040208 00000004 6505t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6506 RB_SAMPLE_POS: 0x88888888 65070110c0cc: 0000: c0012d00 0004020a 88888888 6508t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6509 RB_COLOR_DEST_MASK: 0xffffffff 65100110c0d8: 0000: c0012d00 00040326 ffffffff 6511t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6512 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 65130110c0e4: 0000: c0012d00 0004031b 0003c000 6514t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6515 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 6516 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 65170110c0f0: 0000: c0022d00 00040183 00000000 00000000 6518t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 65190110c100: 0000: c0004b00 00000000 6520t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 65210110c108: 0000: c0035200 000005d0 00000000 5f601000 00000001 6522t0 write SQ_INST_STORE_MANAGMENT (0d02) 6523 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 65240110c11c: 0000: 00000d02 00000180 6525t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 65260110c124: 0000: c0003b00 00000300 6527t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 65280110c12c: 0000: c0004a00 80000180 6529t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 65300110c13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 65310110c15c: 2.000000 0.750000 0.375000 0.250000 65320110c134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 65330110c154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 6534t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6535 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 65360110c16c: 0000: c0012d00 00040104 0000000f 6537t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6538 RB_BLEND_RED: 0 6539 RB_BLEND_GREEN: 0 6540 RB_BLEND_BLUE: 0 6541 RB_BLEND_ALPHA: 0xff 65420110c178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 6543t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6544 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 65450110c190: 0000: c0012d00 00040206 0000043f 6546t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6547 RB_SURFACE_INFO: { SURFACE_PITCH = 256 | MSAA_SAMPLES = 0 } 65480110c19c: 0000: c0012d00 00040000 00000100 6549t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6550 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0x108a000 } 65510110c1a8: 0000: c0012d00 00040001 0108a205 6552t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6553 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 6554 PA_SC_SCREEN_SCISSOR_BR: { X = 256 | Y = 256 } 65550110c1b4: 0000: c0022d00 0004000e 80000000 01000100 6556t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6557 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 65580110c1c4: 0000: c0012d00 00040080 00000000 6559t0 write CP_SCRATCH_REG6 (057e) 6560 CP_SCRATCH_REG6: 119 6561 :0,0,119,110 65620110c1d0: 0000: 0000057e 00000077 6563t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 6564 ibaddr:0110b000 6565 ibsize:000000b8 6566t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6567 set shader const 0078 65680110b000: 0000: c0042d00 00010078 0112d747 00100000 0112d787 00100000 6569t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6570 PA_SC_AA_MASK: 0xffff 65710110b018: 0000: c0012d00 00040312 0000ffff 6572t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6573 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 65740110b024: 0000: c0012d00 00040200 00000000 6575t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 6576 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6577 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6578 RB_ALPHA_REF: 0 65790110b030: 0000: c0032d00 0004010c 00000000 00000000 00000000 6580t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6581 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 6582 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 65830110b044: 0000: c0022d00 00040204 00000000 00090240 6584t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6585 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 6586 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 6587 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 6588 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 65890110b054: 0000: c0042d00 00040280 00080008 00080008 00000008 00000000 6590t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 6591 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 6592 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 6593 PA_CL_GB_VERT_DISC_ADJ: 1.000000 6594 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 6595 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 65960110b06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 6597t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6598 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 6599 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 66000110b088: 0000: c0022d00 00040081 00000000 01000100 6601t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 6602 PA_CL_VPORT_XSCALE: 128.000000 6603 PA_CL_VPORT_XOFFSET: 128.000000 6604 PA_CL_VPORT_YSCALE: -128.000000 6605 PA_CL_VPORT_YOFFSET: 128.000000 6606 PA_CL_VPORT_ZSCALE: 0.500000 6607 PA_CL_VPORT_ZOFFSET: 0.500000 66080110b098: 0000: c0062d00 0004010f 43000000 43000000 c3000000 43000000 3f000000 3f000000 6609t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 66100110b0c0: 128.000000 128.000000 0.500000 0.000000 128.000000 -128.000000 0.500000 0.000000 66110110b0b8: 0000: c0082d00 00000184 43000000 43000000 3f000000 00000000 43000000 c3000000 66120110b0d8: 0020: 3f000000 00000000 6613t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 6614 vertex shader, start=0000, size=0015 6615 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 6616 03: 19481000 00262688 00000010 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(16) CONST(20, 0) 6617 04: 13480000 40252fc8 00000008 FETCH: VERTEX R0.xy__ = R0.x FMT_32_32_FLOAT UNSIGNED STRIDE(8) CONST(20, 1) 6618 0000 0000 c200 ALLOC POSITION SIZE(0x0) 6619 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 6620 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 6621 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 6622 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 6623 06: 00038000 00000000 c2000000 ALU: MAXv export0.xy__ = R0, R0 6624 0000 0000 0000 NOP 66250110b0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 66260110b100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000010 13480000 66270110b120: 0040: 40252fc8 00000008 000f803e 00000000 c2010100 00038000 00000000 c2000000 6628t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 6629 fragment shader, start=0000, size=000c 6630 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 6631 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 6632 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 6633 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 6634 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 6635 0000 0000 0000 NOP 66360110b140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 66370110b160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 6638t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6639 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 66400110b17c: 0000: c0012d00 00040181 00000106 6641t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6642 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 66430110b188: 0000: c0012d00 00040180 10030002 6644t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 66450110b19c: 0.000000 0.000000 0.000000 0.000000 66460110b194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 6647t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6648 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 66490110b1ac: 0000: c0012d00 00040202 00001c20 6650t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6651 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 66520110b1b8: 0000: c0012d00 00040201 00000000 6653t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6654 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 66550110b1c4: 0000: c0012d00 00040104 0000000f 6656t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6657 RB_BLEND_RED: 0 6658 RB_BLEND_GREEN: 0 6659 RB_BLEND_BLUE: 0 6660 RB_BLEND_ALPHA: 0 66610110b1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 6662t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 6663 set texture const 0000 6664 clamp x/y/z: clamp-last-texel/clamp-last-texel/wrap 6665 filter min/mag: point/point 6666 swizzle: xyzw 6667 addr=01230000 (flags=820), size=64x128, pitch=16448, format=FMT_1_REVERSE 6668 mipaddr=01240000 (flags=200) 66690110b1e8: 0000: c0062d00 00010000 80804800 01230820 000fe03f 00000d11 000001c0 01240200 6670t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6671 VGT_INDX_OFFSET: 0 66720110b208: 0000: c0012d00 00040102 00000000 6673t0 write TC_CNTL_STATUS (0e00) 6674 TC_CNTL_STATUS: { L2_INVALIDATE } 66750110b214: 0000: 00000e00 00000001 6676t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 66770110b21c: 0000: c0035200 000005d0 00000000 00001000 00000001 6678t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 66790110b230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 6680t0 write CP_SCRATCH_REG7 (057f) 6681 CP_SCRATCH_REG7: 115 6682 :0,0,119,115 66830110b24c: 0000: 0000057f 00000073 6684t3 opcode: CP_NOP (10) (2 dwords) 66850110b254: 0000: c0001000 00000000 6686t3 opcode: CP_DRAW_INDX (22) (5 dwords) 6687 { VIZ_QUERY = 0 } 6688 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x60000 } 6689 { NUM_INDICES = 18012068 } 6690 { INDX_BASE = 0xc } 6691 draw: 0 6692 prim_type: DI_PT_TRILIST (4) 6693 source_select: DI_SRC_SEL_DMA (0) 6694 num_indices: 18012068 6695 draw[19] register values 6696 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 6697 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 6698 + 00000000 CP_PERFMON_CNTL: 0 6699!+ 00000077 CP_SCRATCH_REG6: 119 6700 :0,0,119,115 6701!+ 00000073 CP_SCRATCH_REG7: 115 6702 :0,0,119,115 6703 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 6704 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 6705 + 00000002 TP0_CHICKEN: 0x2 6706 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 6707!+ 00000100 RB_SURFACE_INFO: { SURFACE_PITCH = 256 | MSAA_SAMPLES = 0 } 6708!+ 0108a205 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0x108a000 } 6709 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 6710!+ 01000100 PA_SC_SCREEN_SCISSOR_BR: { X = 256 | Y = 256 } 6711 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 6712 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 6713!+ 01000100 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 6714 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 6715 + 00000000 VGT_MIN_VTX_INDX: 0 6716 + 00000000 VGT_INDX_OFFSET: 0 6717 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 6718 + 00000000 RB_BLEND_RED: 0 6719 + 00000000 RB_BLEND_GREEN: 0 6720 + 00000000 RB_BLEND_BLUE: 0 6721 + 00000000 RB_BLEND_ALPHA: 0 6722 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6723 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6724 + 00000000 RB_ALPHA_REF: 0 6725!+ 43000000 PA_CL_VPORT_XSCALE: 128.000000 6726!+ 43000000 PA_CL_VPORT_XOFFSET: 128.000000 6727!+ c3000000 PA_CL_VPORT_YSCALE: -128.000000 6728!+ 43000000 PA_CL_VPORT_YOFFSET: 128.000000 6729!+ 3f000000 PA_CL_VPORT_ZSCALE: 0.500000 6730!+ 3f000000 PA_CL_VPORT_ZOFFSET: 0.500000 6731 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 6732 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 6733 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 6734 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 6735 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 6736 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 6737 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 6738!+ 00001c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 6739 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 6740!+ 00090240 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 6741 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 6742 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 6743 + 88888888 RB_SAMPLE_POS: 0x88888888 6744!+ 00080008 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 6745!+ 00080008 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 6746!+ 00000008 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 6747 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 6748 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 6749 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 6750 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 6751 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 6752 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 6753 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 6754 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 6755 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 6756 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 6757 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 6758 + 0000ffff PA_SC_AA_MASK: 0xffff 6759 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 6760 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 6761 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 6762 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 67630110b25c: 0000: c0032200 00000000 00060004 0112d7a4 0000000c 6764t0 write CP_SCRATCH_REG7 (057f) 6765NEEDS WFI: CP_SCRATCH_REG7 (57f) 6766 CP_SCRATCH_REG7: 116 6767 :0,0,119,116 67680110b270: 0000: 0000057f 00000074 6769t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 67700110b278: 0000: c0002600 00000000 6771t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6772 { EVENT = CACHE_FLUSH } 6773 event CACHE_FLUSH 67740110b280: 0000: c0004600 00000006 6775t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6776 { EVENT = CACHE_FLUSH } 6777 event CACHE_FLUSH 67780110b288: 0000: c0004600 00000006 6779t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6780 { EVENT = CACHE_FLUSH } 6781 event CACHE_FLUSH 67820110b290: 0000: c0004600 00000006 6783t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6784 { EVENT = CACHE_FLUSH } 6785 event CACHE_FLUSH 67860110b298: 0000: c0004600 00000006 6787t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6788 { EVENT = CACHE_FLUSH } 6789 event CACHE_FLUSH 67900110b2a0: 0000: c0004600 00000006 6791t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6792 { EVENT = CACHE_FLUSH } 6793 event CACHE_FLUSH 67940110b2a8: 0000: c0004600 00000006 6795t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6796 { EVENT = CACHE_FLUSH } 6797 event CACHE_FLUSH 67980110b2b0: 0000: c0004600 00000006 6799t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6800 { EVENT = CACHE_FLUSH } 6801 event CACHE_FLUSH 68020110b2b8: 0000: c0004600 00000006 6803t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6804 { EVENT = CACHE_FLUSH } 6805 event CACHE_FLUSH 68060110b2c0: 0000: c0004600 00000006 6807t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6808 { EVENT = CACHE_FLUSH } 6809 event CACHE_FLUSH 68100110b2c8: 0000: c0004600 00000006 6811t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6812 { EVENT = CACHE_FLUSH } 6813 event CACHE_FLUSH 68140110b2d0: 0000: c0004600 00000006 6815t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 6816 { EVENT = CACHE_FLUSH } 6817 event CACHE_FLUSH 68180110b2d8: 0000: c0004600 00000006 68190110c1d8: 0000: c0013700 0110b000 000000b8 6820t2 nop 6821############################################################ 6822vertices: 0 6823cmd: deqp-gles2/185: fence=1266 6824############################################################ 6825cmdstream: 124 dwords 6826t0 write RB_BC_CONTROL (0f01) 6827 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 68280122d000: 0000: 00000f01 1c004046 6829t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6830 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 68310122d008: 0000: c0012d00 00040293 00000020 6832t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6833 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 68340122d014: 0000: c0012d00 00040316 00000002 6835t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6836 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 68370122d020: 0000: c0012d00 00040317 00000002 6838t0 write CP_PERFMON_CNTL (0444) 6839 CP_PERFMON_CNTL: 0 68400122d02c: 0000: 00000444 00000000 6841t0 write RBBM_PM_OVERRIDE1 (039c) 6842 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 6843 RBBM_PM_OVERRIDE2: 0xfff 68440122d034: 0000: 0001039c ffffffff 00000fff 6845t0 write TP0_CHICKEN (0e1e) 6846 TP0_CHICKEN: 0x2 68470122d040: 0000: 00000e1e 00000002 6848t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 68490122d048: 0000: c0003b00 00007fff 6850t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6851 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 68520122d050: 0000: c0012d00 00040307 00100020 6853t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6854 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 68550122d05c: 0000: c0012d00 00040308 000e0120 6856t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6857 VGT_MAX_VTX_INDX: 0xffffffff 6858 VGT_MIN_VTX_INDX: 0 68590122d068: 0000: c0022d00 00040100 ffffffff 00000000 6860t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6861 VGT_INDX_OFFSET: 0 68620122d078: 0000: c0012d00 00040102 00000000 6863t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6864 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 68650122d084: 0000: c0012d00 00040181 00000004 6866t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6867 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 68680122d090: 0000: c0012d00 00040182 ffffffff 6869t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6870 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 68710122d09c: 0000: c0012d00 00040301 00000000 6872t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6873 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 68740122d0a8: 0000: c0012d00 00040300 00000000 6875t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6876 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 68770122d0b4: 0000: c0012d00 00040080 00000000 6878t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6879 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 68800122d0c0: 0000: c0012d00 00040208 00000004 6881t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6882 RB_SAMPLE_POS: 0x88888888 68830122d0cc: 0000: c0012d00 0004020a 88888888 6884t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6885 RB_COLOR_DEST_MASK: 0xffffffff 68860122d0d8: 0000: c0012d00 00040326 ffffffff 6887t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6888 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 68890122d0e4: 0000: c0012d00 0004031b 0003c000 6890t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6891 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 6892 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 68930122d0f0: 0000: c0022d00 00040183 00000000 00000000 6894t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 68950122d100: 0000: c0004b00 00000000 6896t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 68970122d108: 0000: c0035200 000005d0 00000000 5f601000 00000001 6898t0 write SQ_INST_STORE_MANAGMENT (0d02) 6899 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 69000122d11c: 0000: 00000d02 00000180 6901t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 69020122d124: 0000: c0003b00 00000300 6903t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 69040122d12c: 0000: c0004a00 80000180 6905t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 69060122d13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 69070122d15c: 2.000000 0.750000 0.375000 0.250000 69080122d134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 69090122d154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 6910t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6911 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 69120122d16c: 0000: c0012d00 00040104 0000000f 6913t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6914 RB_BLEND_RED: 0 6915 RB_BLEND_GREEN: 0 6916 RB_BLEND_BLUE: 0 6917 RB_BLEND_ALPHA: 0xff 69180122d178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 6919t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6920 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 69210122d190: 0000: c0012d00 00040206 0000043f 6922t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6923 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 69240122d19c: 0000: c0012d00 00040000 00000020 6925t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6926 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1266000 } 69270122d1a8: 0000: c0012d00 00040001 01266245 6928t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6929 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 6930 PA_SC_SCREEN_SCISSOR_BR: { X = 8 | Y = 16 } 69310122d1b4: 0000: c0022d00 0004000e 80000000 00100008 6932t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6933 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 69340122d1c4: 0000: c0012d00 00040080 00000000 6935t0 write CP_SCRATCH_REG6 (057e) 6936 CP_SCRATCH_REG6: 125 6937 :0,0,125,116 69380122d1d0: 0000: 0000057e 0000007d 6939t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 6940 ibaddr:0122e000 6941 ibsize:000000b6 6942t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6943 set shader const 0078 69440122e000: 0000: c0042d00 00010078 0112d7b3 00100000 0112d7b3 00100000 6945t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6946 PA_SC_AA_MASK: 0xffff 69470122e018: 0000: c0012d00 00040312 0000ffff 6948t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 6949 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 69500122e024: 0000: c0012d00 00040200 00000000 6951t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 6952 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6953 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 6954 RB_ALPHA_REF: 0 69550122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 6956t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6957 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 6958 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 69590122e044: 0000: c0022d00 00040204 00000000 00090244 6960t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 6961 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 6962 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 6963 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 6964 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 69650122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 6966t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 6967 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 6968 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 6969 PA_CL_GB_VERT_DISC_ADJ: 1.000000 6970 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 6971 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 69720122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 6973t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 6974 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 6975 PA_SC_WINDOW_SCISSOR_BR: { X = 8 | Y = 16 } 69760122e088: 0000: c0022d00 00040081 00000000 00100008 6977t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 6978 PA_CL_VPORT_XSCALE: 4.000000 6979 PA_CL_VPORT_XOFFSET: 4.000000 6980 PA_CL_VPORT_YSCALE: 8.000000 6981 PA_CL_VPORT_YOFFSET: 8.000000 6982 PA_CL_VPORT_ZSCALE: 0.000000 6983 PA_CL_VPORT_ZOFFSET: 0.000000 69840122e098: 0000: c0062d00 0004010f 40800000 40800000 41000000 41000000 00000000 00000000 6985t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 69860122e0c0: 4.000000 8.000000 0.000000 0.000000 4.000000 8.000000 0.000000 0.000000 69870122e0b8: 0000: c0082d00 00000184 40800000 41000000 00000000 00000000 40800000 41000000 6988* 6989t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 6990 vertex shader, start=0000, size=0015 6991 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 6992 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 6993 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 6994 0000 0000 c200 ALLOC POSITION SIZE(0x0) 6995 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 6996 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 6997 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 6998 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 6999 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 7000 0000 0000 0000 NOP 70010122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 70020122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 70030122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 7004t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 7005 fragment shader, start=0000, size=000c 7006 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 7007 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 7008 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 7009 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 7010 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 7011 0000 0000 0000 NOP 70120122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 70130122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 7014t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7015 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 70160122e17c: 0000: c0012d00 00040181 00000106 7017t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7018 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 70190122e188: 0000: c0012d00 00040180 10030002 7020t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 70210122e19c: 0.000000 0.000000 0.000000 0.000000 70220122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 7023t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7024 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 70250122e1ac: 0000: c0012d00 00040202 00000c20 7026t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7027 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 70280122e1b8: 0000: c0012d00 00040201 00000000 7029t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7030 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 70310122e1c4: 0000: c0012d00 00040104 0000000f 7032t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7033 RB_BLEND_RED: 0 7034 RB_BLEND_GREEN: 0 7035 RB_BLEND_BLUE: 0 7036 RB_BLEND_ALPHA: 0 70370122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 7038t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 7039 set texture const 0000 7040 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 7041 filter min/mag: point/point 7042 swizzle: zyxw 7043 addr=0108a000 (flags=806), size=256x256, pitch=16640, format=FMT_8_8_8_8 7044 mipaddr=00000000 (flags=200) 70450122e1e8: 0000: c0062d00 00010000 82024800 0108a806 001fe0ff 00000c14 00000000 00000200 7046t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7047 VGT_INDX_OFFSET: 0 70480122e208: 0000: c0012d00 00040102 00000000 7049t0 write TC_CNTL_STATUS (0e00) 7050 TC_CNTL_STATUS: { L2_INVALIDATE } 70510122e214: 0000: 00000e00 00000001 7052t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 70530122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 7054t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 70550122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 7056t0 write CP_SCRATCH_REG7 (057f) 7057 CP_SCRATCH_REG7: 121 7058 :0,0,125,121 70590122e24c: 0000: 0000057f 00000079 7060t3 opcode: CP_NOP (10) (2 dwords) 70610122e254: 0000: c0001000 00000000 7062t3 opcode: CP_DRAW_INDX (22) (3 dwords) 7063 { VIZ_QUERY = 0 } 7064 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 7065 draw: 0 7066 prim_type: DI_PT_TRIFAN (5) 7067 source_select: DI_SRC_SEL_AUTO_INDEX (2) 7068 num_indices: 1407 7069 draw[20] register values 7070 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 7071 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 7072 + 00000000 CP_PERFMON_CNTL: 0 7073!+ 0000007d CP_SCRATCH_REG6: 125 7074 :0,0,125,121 7075!+ 00000079 CP_SCRATCH_REG7: 121 7076 :0,0,125,121 7077 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 7078 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 7079 + 00000002 TP0_CHICKEN: 0x2 7080 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 7081!+ 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 7082!+ 01266245 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1266000 } 7083 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 7084!+ 00100008 PA_SC_SCREEN_SCISSOR_BR: { X = 8 | Y = 16 } 7085 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 7086 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 7087!+ 00100008 PA_SC_WINDOW_SCISSOR_BR: { X = 8 | Y = 16 } 7088 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 7089 + 00000000 VGT_MIN_VTX_INDX: 0 7090 + 00000000 VGT_INDX_OFFSET: 0 7091 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 7092 + 00000000 RB_BLEND_RED: 0 7093 + 00000000 RB_BLEND_GREEN: 0 7094 + 00000000 RB_BLEND_BLUE: 0 7095 + 00000000 RB_BLEND_ALPHA: 0 7096 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7097 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7098 + 00000000 RB_ALPHA_REF: 0 7099!+ 40800000 PA_CL_VPORT_XSCALE: 4.000000 7100!+ 40800000 PA_CL_VPORT_XOFFSET: 4.000000 7101!+ 41000000 PA_CL_VPORT_YSCALE: 8.000000 7102!+ 41000000 PA_CL_VPORT_YOFFSET: 8.000000 7103!+ 00000000 PA_CL_VPORT_ZSCALE: 0.000000 7104!+ 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 7105 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 7106 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 7107 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 7108 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 7109 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 7110 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 7111 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 7112!+ 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 7113 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 7114!+ 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 7115 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 7116 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 7117 + 88888888 RB_SAMPLE_POS: 0x88888888 7118!+ 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 7119!+ 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 7120!+ 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 7121 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 7122 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 7123 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 7124 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 7125 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 7126 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 7127 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 7128 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 7129 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 7130 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 7131 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 7132 + 0000ffff PA_SC_AA_MASK: 0xffff 7133 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 7134 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 7135 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 7136 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 71370122e25c: 0000: c0012200 00000000 00040085 7138t0 write CP_SCRATCH_REG7 (057f) 7139NEEDS WFI: CP_SCRATCH_REG7 (57f) 7140 CP_SCRATCH_REG7: 122 7141 :0,0,125,122 71420122e268: 0000: 0000057f 0000007a 7143t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 71440122e270: 0000: c0002600 00000000 7145t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7146 { EVENT = CACHE_FLUSH } 7147 event CACHE_FLUSH 71480122e278: 0000: c0004600 00000006 7149t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7150 { EVENT = CACHE_FLUSH } 7151 event CACHE_FLUSH 71520122e280: 0000: c0004600 00000006 7153t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7154 { EVENT = CACHE_FLUSH } 7155 event CACHE_FLUSH 71560122e288: 0000: c0004600 00000006 7157t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7158 { EVENT = CACHE_FLUSH } 7159 event CACHE_FLUSH 71600122e290: 0000: c0004600 00000006 7161t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7162 { EVENT = CACHE_FLUSH } 7163 event CACHE_FLUSH 71640122e298: 0000: c0004600 00000006 7165t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7166 { EVENT = CACHE_FLUSH } 7167 event CACHE_FLUSH 71680122e2a0: 0000: c0004600 00000006 7169t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7170 { EVENT = CACHE_FLUSH } 7171 event CACHE_FLUSH 71720122e2a8: 0000: c0004600 00000006 7173t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7174 { EVENT = CACHE_FLUSH } 7175 event CACHE_FLUSH 71760122e2b0: 0000: c0004600 00000006 7177t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7178 { EVENT = CACHE_FLUSH } 7179 event CACHE_FLUSH 71800122e2b8: 0000: c0004600 00000006 7181t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7182 { EVENT = CACHE_FLUSH } 7183 event CACHE_FLUSH 71840122e2c0: 0000: c0004600 00000006 7185t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7186 { EVENT = CACHE_FLUSH } 7187 event CACHE_FLUSH 71880122e2c8: 0000: c0004600 00000006 7189t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7190 { EVENT = CACHE_FLUSH } 7191 event CACHE_FLUSH 71920122e2d0: 0000: c0004600 00000006 71930122d1d8: 0000: c0013700 0122e000 000000b6 7194t2 nop 7195############################################################ 7196vertices: 0 7197cmd: deqp-gles2/185: fence=1267 7198############################################################ 7199cmdstream: 124 dwords 7200t0 write RB_BC_CONTROL (0f01) 7201 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 72020110a000: 0000: 00000f01 1c004046 7203t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7204 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 72050110a008: 0000: c0012d00 00040293 00000020 7206t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7207 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 72080110a014: 0000: c0012d00 00040316 00000002 7209t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7210 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 72110110a020: 0000: c0012d00 00040317 00000002 7212t0 write CP_PERFMON_CNTL (0444) 7213 CP_PERFMON_CNTL: 0 72140110a02c: 0000: 00000444 00000000 7215t0 write RBBM_PM_OVERRIDE1 (039c) 7216 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 7217 RBBM_PM_OVERRIDE2: 0xfff 72180110a034: 0000: 0001039c ffffffff 00000fff 7219t0 write TP0_CHICKEN (0e1e) 7220 TP0_CHICKEN: 0x2 72210110a040: 0000: 00000e1e 00000002 7222t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 72230110a048: 0000: c0003b00 00007fff 7224t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7225 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 72260110a050: 0000: c0012d00 00040307 00100020 7227t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7228 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 72290110a05c: 0000: c0012d00 00040308 000e0120 7230t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7231 VGT_MAX_VTX_INDX: 0xffffffff 7232 VGT_MIN_VTX_INDX: 0 72330110a068: 0000: c0022d00 00040100 ffffffff 00000000 7234t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7235 VGT_INDX_OFFSET: 0 72360110a078: 0000: c0012d00 00040102 00000000 7237t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7238 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 72390110a084: 0000: c0012d00 00040181 00000004 7240t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7241 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 72420110a090: 0000: c0012d00 00040182 ffffffff 7243t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7244 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 72450110a09c: 0000: c0012d00 00040301 00000000 7246t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7247 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 72480110a0a8: 0000: c0012d00 00040300 00000000 7249t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7250 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 72510110a0b4: 0000: c0012d00 00040080 00000000 7252t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7253 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 72540110a0c0: 0000: c0012d00 00040208 00000004 7255t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7256 RB_SAMPLE_POS: 0x88888888 72570110a0cc: 0000: c0012d00 0004020a 88888888 7258t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7259 RB_COLOR_DEST_MASK: 0xffffffff 72600110a0d8: 0000: c0012d00 00040326 ffffffff 7261t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7262 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 72630110a0e4: 0000: c0012d00 0004031b 0003c000 7264t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7265 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 7266 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 72670110a0f0: 0000: c0022d00 00040183 00000000 00000000 7268t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 72690110a100: 0000: c0004b00 00000000 7270t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 72710110a108: 0000: c0035200 000005d0 00000000 5f601000 00000001 7272t0 write SQ_INST_STORE_MANAGMENT (0d02) 7273 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 72740110a11c: 0000: 00000d02 00000180 7275t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 72760110a124: 0000: c0003b00 00000300 7277t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 72780110a12c: 0000: c0004a00 80000180 7279t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 72800110a13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 72810110a15c: 2.000000 0.750000 0.375000 0.250000 72820110a134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 72830110a154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 7284t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7285 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 72860110a16c: 0000: c0012d00 00040104 0000000f 7287t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7288 RB_BLEND_RED: 0 7289 RB_BLEND_GREEN: 0 7290 RB_BLEND_BLUE: 0 7291 RB_BLEND_ALPHA: 0xff 72920110a178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 7293t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7294 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 72950110a190: 0000: c0012d00 00040206 0000043f 7296t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7297 RB_SURFACE_INFO: { SURFACE_PITCH = 256 | MSAA_SAMPLES = 0 } 72980110a19c: 0000: c0012d00 00040000 00000100 7299t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7300 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0x108a000 } 73010110a1a8: 0000: c0012d00 00040001 0108a205 7302t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7303 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 7304 PA_SC_SCREEN_SCISSOR_BR: { X = 256 | Y = 256 } 73050110a1b4: 0000: c0022d00 0004000e 80000000 01000100 7306t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7307 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 73080110a1c4: 0000: c0012d00 00040080 00000000 7309t0 write CP_SCRATCH_REG6 (057e) 7310 CP_SCRATCH_REG6: 131 7311 :0,0,131,122 73120110a1d0: 0000: 0000057e 00000083 7313t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 7314 ibaddr:0110b000 7315 ibsize:000000b8 7316t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7317 set shader const 0078 73180110b000: 0000: c0042d00 00010078 0112d833 00100000 0112d873 00100000 7319t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7320 PA_SC_AA_MASK: 0xffff 73210110b018: 0000: c0012d00 00040312 0000ffff 7322t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7323 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 73240110b024: 0000: c0012d00 00040200 00000000 7325t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 7326 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7327 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7328 RB_ALPHA_REF: 0 73290110b030: 0000: c0032d00 0004010c 00000000 00000000 00000000 7330t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7331 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 7332 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 73330110b044: 0000: c0022d00 00040204 00000000 00090240 7334t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7335 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 7336 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 7337 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 7338 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 73390110b054: 0000: c0042d00 00040280 00080008 00080008 00000008 00000000 7340t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 7341 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 7342 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 7343 PA_CL_GB_VERT_DISC_ADJ: 1.000000 7344 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 7345 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 73460110b06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 7347t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7348 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 7349 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 73500110b088: 0000: c0022d00 00040081 00000000 01000100 7351t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 7352 PA_CL_VPORT_XSCALE: 128.000000 7353 PA_CL_VPORT_XOFFSET: 128.000000 7354 PA_CL_VPORT_YSCALE: -128.000000 7355 PA_CL_VPORT_YOFFSET: 128.000000 7356 PA_CL_VPORT_ZSCALE: 0.500000 7357 PA_CL_VPORT_ZOFFSET: 0.500000 73580110b098: 0000: c0062d00 0004010f 43000000 43000000 c3000000 43000000 3f000000 3f000000 7359t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 73600110b0c0: 128.000000 128.000000 0.500000 0.000000 128.000000 -128.000000 0.500000 0.000000 73610110b0b8: 0000: c0082d00 00000184 43000000 43000000 3f000000 00000000 43000000 c3000000 73620110b0d8: 0020: 3f000000 00000000 7363t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 7364 vertex shader, start=0000, size=0015 7365 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 7366 03: 19481000 00262688 00000010 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(16) CONST(20, 0) 7367 04: 13480000 40252fc8 00000008 FETCH: VERTEX R0.xy__ = R0.x FMT_32_32_FLOAT UNSIGNED STRIDE(8) CONST(20, 1) 7368 0000 0000 c200 ALLOC POSITION SIZE(0x0) 7369 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 7370 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 7371 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 7372 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 7373 06: 00038000 00000000 c2000000 ALU: MAXv export0.xy__ = R0, R0 7374 0000 0000 0000 NOP 73750110b0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 73760110b100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000010 13480000 73770110b120: 0040: 40252fc8 00000008 000f803e 00000000 c2010100 00038000 00000000 c2000000 7378t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 7379 fragment shader, start=0000, size=000c 7380 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 7381 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 7382 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 7383 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 7384 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 7385 0000 0000 0000 NOP 73860110b140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 73870110b160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 7388t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7389 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 73900110b17c: 0000: c0012d00 00040181 00000106 7391t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7392 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 73930110b188: 0000: c0012d00 00040180 10030002 7394t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 73950110b19c: 0.000000 0.000000 0.000000 0.000000 73960110b194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 7397t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7398 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 73990110b1ac: 0000: c0012d00 00040202 00001c20 7400t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7401 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 74020110b1b8: 0000: c0012d00 00040201 00000000 7403t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7404 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 74050110b1c4: 0000: c0012d00 00040104 0000000f 7406t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7407 RB_BLEND_RED: 0 7408 RB_BLEND_GREEN: 0 7409 RB_BLEND_BLUE: 0 7410 RB_BLEND_ALPHA: 0 74110110b1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 7412t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 7413 set texture const 0000 7414 clamp x/y/z: clamp-last-texel/clamp-last-texel/wrap 7415 filter min/mag: point/point 7416 swizzle: xyzw 7417 addr=01230000 (flags=820), size=64x128, pitch=16448, format=FMT_1_REVERSE 7418 mipaddr=01240000 (flags=200) 74190110b1e8: 0000: c0062d00 00010000 80804800 01230820 000fe03f 00000d11 000001c0 01240200 7420t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7421 VGT_INDX_OFFSET: 0 74220110b208: 0000: c0012d00 00040102 00000000 7423t0 write TC_CNTL_STATUS (0e00) 7424 TC_CNTL_STATUS: { L2_INVALIDATE } 74250110b214: 0000: 00000e00 00000001 7426t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 74270110b21c: 0000: c0035200 000005d0 00000000 00001000 00000001 7428t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 74290110b230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 7430t0 write CP_SCRATCH_REG7 (057f) 7431 CP_SCRATCH_REG7: 127 7432 :0,0,131,127 74330110b24c: 0000: 0000057f 0000007f 7434t3 opcode: CP_NOP (10) (2 dwords) 74350110b254: 0000: c0001000 00000000 7436t3 opcode: CP_DRAW_INDX (22) (5 dwords) 7437 { VIZ_QUERY = 0 } 7438 { PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x60000 } 7439 { NUM_INDICES = 18012304 } 7440 { INDX_BASE = 0xc } 7441 draw: 0 7442 prim_type: DI_PT_TRILIST (4) 7443 source_select: DI_SRC_SEL_DMA (0) 7444 num_indices: 18012304 7445 draw[21] register values 7446 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 7447 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 7448 + 00000000 CP_PERFMON_CNTL: 0 7449!+ 00000083 CP_SCRATCH_REG6: 131 7450 :0,0,131,127 7451!+ 0000007f CP_SCRATCH_REG7: 127 7452 :0,0,131,127 7453 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 7454 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 7455 + 00000002 TP0_CHICKEN: 0x2 7456 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 7457!+ 00000100 RB_SURFACE_INFO: { SURFACE_PITCH = 256 | MSAA_SAMPLES = 0 } 7458!+ 0108a205 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | ENDIAN = 0 | SWAP = 1 | BASE = 0x108a000 } 7459 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 7460!+ 01000100 PA_SC_SCREEN_SCISSOR_BR: { X = 256 | Y = 256 } 7461 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 7462 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 7463!+ 01000100 PA_SC_WINDOW_SCISSOR_BR: { X = 256 | Y = 256 } 7464 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 7465 + 00000000 VGT_MIN_VTX_INDX: 0 7466 + 00000000 VGT_INDX_OFFSET: 0 7467 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 7468 + 00000000 RB_BLEND_RED: 0 7469 + 00000000 RB_BLEND_GREEN: 0 7470 + 00000000 RB_BLEND_BLUE: 0 7471 + 00000000 RB_BLEND_ALPHA: 0 7472 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7473 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7474 + 00000000 RB_ALPHA_REF: 0 7475!+ 43000000 PA_CL_VPORT_XSCALE: 128.000000 7476!+ 43000000 PA_CL_VPORT_XOFFSET: 128.000000 7477!+ c3000000 PA_CL_VPORT_YSCALE: -128.000000 7478!+ 43000000 PA_CL_VPORT_YOFFSET: 128.000000 7479!+ 3f000000 PA_CL_VPORT_ZSCALE: 0.500000 7480!+ 3f000000 PA_CL_VPORT_ZOFFSET: 0.500000 7481 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 7482 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 7483 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 7484 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 7485 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 7486 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 7487 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 7488!+ 00001c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 7489 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 7490!+ 00090240 PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 7491 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 7492 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 7493 + 88888888 RB_SAMPLE_POS: 0x88888888 7494!+ 00080008 PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 } 7495!+ 00080008 PA_SU_POINT_MINMAX: { MIN = 0.500000 | MAX = 0.500000 } 7496!+ 00000008 PA_SU_LINE_CNTL: { WIDTH = 0.500000 } 7497 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 7498 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 7499 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 7500 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 7501 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 7502 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 7503 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 7504 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 7505 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 7506 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 7507 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 7508 + 0000ffff PA_SC_AA_MASK: 0xffff 7509 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 7510 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 7511 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 7512 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 75130110b25c: 0000: c0032200 00000000 00060004 0112d890 0000000c 7514t0 write CP_SCRATCH_REG7 (057f) 7515NEEDS WFI: CP_SCRATCH_REG7 (57f) 7516 CP_SCRATCH_REG7: 128 7517 :0,0,131,128 75180110b270: 0000: 0000057f 00000080 7519t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 75200110b278: 0000: c0002600 00000000 7521t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7522 { EVENT = CACHE_FLUSH } 7523 event CACHE_FLUSH 75240110b280: 0000: c0004600 00000006 7525t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7526 { EVENT = CACHE_FLUSH } 7527 event CACHE_FLUSH 75280110b288: 0000: c0004600 00000006 7529t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7530 { EVENT = CACHE_FLUSH } 7531 event CACHE_FLUSH 75320110b290: 0000: c0004600 00000006 7533t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7534 { EVENT = CACHE_FLUSH } 7535 event CACHE_FLUSH 75360110b298: 0000: c0004600 00000006 7537t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7538 { EVENT = CACHE_FLUSH } 7539 event CACHE_FLUSH 75400110b2a0: 0000: c0004600 00000006 7541t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7542 { EVENT = CACHE_FLUSH } 7543 event CACHE_FLUSH 75440110b2a8: 0000: c0004600 00000006 7545t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7546 { EVENT = CACHE_FLUSH } 7547 event CACHE_FLUSH 75480110b2b0: 0000: c0004600 00000006 7549t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7550 { EVENT = CACHE_FLUSH } 7551 event CACHE_FLUSH 75520110b2b8: 0000: c0004600 00000006 7553t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7554 { EVENT = CACHE_FLUSH } 7555 event CACHE_FLUSH 75560110b2c0: 0000: c0004600 00000006 7557t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7558 { EVENT = CACHE_FLUSH } 7559 event CACHE_FLUSH 75600110b2c8: 0000: c0004600 00000006 7561t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7562 { EVENT = CACHE_FLUSH } 7563 event CACHE_FLUSH 75640110b2d0: 0000: c0004600 00000006 7565t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7566 { EVENT = CACHE_FLUSH } 7567 event CACHE_FLUSH 75680110b2d8: 0000: c0004600 00000006 75690110a1d8: 0000: c0013700 0110b000 000000b8 7570t2 nop 7571############################################################ 7572vertices: 0 7573cmd: deqp-gles2/185: fence=1268 7574############################################################ 7575cmdstream: 124 dwords 7576t0 write RB_BC_CONTROL (0f01) 7577 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 75780122f000: 0000: 00000f01 1c004046 7579t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7580 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 75810122f008: 0000: c0012d00 00040293 00000020 7582t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7583 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 75840122f014: 0000: c0012d00 00040316 00000002 7585t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7586 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 75870122f020: 0000: c0012d00 00040317 00000002 7588t0 write CP_PERFMON_CNTL (0444) 7589 CP_PERFMON_CNTL: 0 75900122f02c: 0000: 00000444 00000000 7591t0 write RBBM_PM_OVERRIDE1 (039c) 7592 RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 7593 RBBM_PM_OVERRIDE2: 0xfff 75940122f034: 0000: 0001039c ffffffff 00000fff 7595t0 write TP0_CHICKEN (0e1e) 7596 TP0_CHICKEN: 0x2 75970122f040: 0000: 00000e1e 00000002 7598t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 75990122f048: 0000: c0003b00 00007fff 7600t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7601 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 76020122f050: 0000: c0012d00 00040307 00100020 7603t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7604 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 76050122f05c: 0000: c0012d00 00040308 000e0120 7606t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7607 VGT_MAX_VTX_INDX: 0xffffffff 7608 VGT_MIN_VTX_INDX: 0 76090122f068: 0000: c0022d00 00040100 ffffffff 00000000 7610t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7611 VGT_INDX_OFFSET: 0 76120122f078: 0000: c0012d00 00040102 00000000 7613t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7614 SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 0 } 76150122f084: 0000: c0012d00 00040181 00000004 7616t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7617 SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 76180122f090: 0000: c0012d00 00040182 ffffffff 7619t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7620 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 76210122f09c: 0000: c0012d00 00040301 00000000 7622t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7623 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 76240122f0a8: 0000: c0012d00 00040300 00000000 7625t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7626 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 76270122f0b4: 0000: c0012d00 00040080 00000000 7628t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7629 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 76300122f0c0: 0000: c0012d00 00040208 00000004 7631t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7632 RB_SAMPLE_POS: 0x88888888 76330122f0cc: 0000: c0012d00 0004020a 88888888 7634t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7635 RB_COLOR_DEST_MASK: 0xffffffff 76360122f0d8: 0000: c0012d00 00040326 ffffffff 7637t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7638 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 76390122f0e4: 0000: c0012d00 0004031b 0003c000 7640t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7641 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 7642 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 76430122f0f0: 0000: c0022d00 00040183 00000000 00000000 7644t3 opcode: CP_SET_DRAW_INIT_FLAGS (4b) (2 dwords) 76450122f100: 0000: c0004b00 00000000 7646t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 76470122f108: 0000: c0035200 000005d0 00000000 5f601000 00000001 7648t0 write SQ_INST_STORE_MANAGMENT (0d02) 7649 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 76500122f11c: 0000: 00000d02 00000180 7651t3 opcode: CP_INVALIDATE_STATE (3b) (2 dwords) 76520122f124: 0000: c0003b00 00000300 7653t3 opcode: CP_SET_SHADER_BASES (4a) (2 dwords) 76540122f12c: 0000: c0004a00 80000180 7655t3 opcode: CP_SET_CONSTANT (2d) (14 dwords) 76560122f13c: 0.000000 0.000000 0.000000 0.000000 20000.000000 1.000000 0.500000 0.000000 76570122f15c: 2.000000 0.750000 0.375000 0.250000 76580122f134: 0000: c00c2d00 00000000 00000000 00000000 00000000 00000000 469c4000 3f800000 76590122f154: 0020: 3f000000 00000000 40000000 3f400000 3ec00000 3e800000 7660t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7661 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 76620122f16c: 0000: c0012d00 00040104 0000000f 7663t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7664 RB_BLEND_RED: 0 7665 RB_BLEND_GREEN: 0 7666 RB_BLEND_BLUE: 0 7667 RB_BLEND_ALPHA: 0xff 76680122f178: 0000: c0042d00 00040105 00000000 00000000 00000000 000000ff 7669t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7670 PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 76710122f190: 0000: c0012d00 00040206 0000043f 7672t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7673 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 76740122f19c: 0000: c0012d00 00040000 00000020 7675t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7676 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1266000 } 76770122f1a8: 0000: c0012d00 00040001 01266245 7678t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7679 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 7680 PA_SC_SCREEN_SCISSOR_BR: { X = 4 | Y = 8 } 76810122f1b4: 0000: c0022d00 0004000e 80000000 00080004 7682t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7683 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 76840122f1c4: 0000: c0012d00 00040080 00000000 7685t0 write CP_SCRATCH_REG6 (057e) 7686 CP_SCRATCH_REG6: 137 7687 :0,0,137,128 76880122f1d0: 0000: 0000057e 00000089 7689t3 opcode: CP_INDIRECT_BUFFER_PFD (37) (3 dwords) 7690 ibaddr:0122e000 7691 ibsize:000000b6 7692t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7693 set shader const 0078 76940122e000: 0000: c0042d00 00010078 0112d89f 00100000 0112d89f 00100000 7695t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7696 PA_SC_AA_MASK: 0xffff 76970122e018: 0000: c0012d00 00040312 0000ffff 7698t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7699 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 77000122e024: 0000: c0012d00 00040200 00000000 7701t3 opcode: CP_SET_CONSTANT (2d) (5 dwords) 7702 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7703 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7704 RB_ALPHA_REF: 0 77050122e030: 0000: c0032d00 0004010c 00000000 00000000 00000000 7706t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7707 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 7708 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 77090122e044: 0000: c0022d00 00040204 00000000 00090244 7710t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7711 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 7712 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 7713 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 7714 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 77150122e054: 0000: c0042d00 00040280 00000000 00000000 00000000 00000000 7716t3 opcode: CP_SET_CONSTANT (2d) (7 dwords) 7717 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 7718 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 7719 PA_CL_GB_VERT_DISC_ADJ: 1.000000 7720 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 7721 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 77220122e06c: 0000: c0052d00 00040302 00000001 3f800000 3f800000 3f800000 3f800000 7723t3 opcode: CP_SET_CONSTANT (2d) (4 dwords) 7724 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 7725 PA_SC_WINDOW_SCISSOR_BR: { X = 4 | Y = 8 } 77260122e088: 0000: c0022d00 00040081 00000000 00080004 7727t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 7728 PA_CL_VPORT_XSCALE: 2.000000 7729 PA_CL_VPORT_XOFFSET: 2.000000 7730 PA_CL_VPORT_YSCALE: 4.000000 7731 PA_CL_VPORT_YOFFSET: 4.000000 7732 PA_CL_VPORT_ZSCALE: 0.000000 7733 PA_CL_VPORT_ZOFFSET: 0.000000 77340122e098: 0000: c0062d00 0004010f 40000000 40000000 40800000 40800000 00000000 00000000 7735t3 opcode: CP_SET_CONSTANT (2d) (10 dwords) 77360122e0c0: 2.000000 4.000000 0.000000 0.000000 2.000000 4.000000 0.000000 0.000000 77370122e0b8: 0000: c0082d00 00000184 40000000 40800000 00000000 00000000 40000000 40800000 7738* 7739t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (24 dwords) 7740 vertex shader, start=0000, size=0015 7741 2003 0007 1000 EXEC ADDR(0x3) CNT(0x2) 7742 03: 19481000 00262688 00000020 (S)FETCH: VERTEX R1.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) CONST(20, 0) 7743 04: 13480000 40262688 00001020 FETCH: VERTEX R0.xyzw = R0.x FMT_32_32_32_32_FLOAT UNSIGNED STRIDE(32) OFFSET(16) CONST(20, 1) 7744 0000 0000 c200 ALLOC POSITION SIZE(0x0) 7745 1005 0002 1000 EXEC ADDR(0x5) CNT(0x1) 7746 05: 000f803e 00000000 c2010100 (S)ALU: MAXv export62 = R1, R1 ; gl_Position 7747 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 7748 1006 0000 2000 EXEC_END ADDR(0x6) CNT(0x1) 7749 06: 000f8000 00000000 c2000000 ALU: MAXv export0 = R0, R0 7750 0000 0000 0000 NOP 77510122e0e0: 0000: c0162b00 00000000 00000015 00072003 00001000 c2000000 00021005 00001000 77520122e100: 0020: c4000000 00001006 00002000 00000000 19481000 00262688 00000020 13480000 77530122e120: 0040: 40262688 00001020 000f803e 00000000 c2010100 000f8000 00000000 c2000000 7754t3 opcode: CP_IM_LOAD_IMMEDIATE (2b) (15 dwords) 7755 fragment shader, start=0000, size=000c 7756 1002 0003 1000 EXEC ADDR(0x2) CNT(0x1) 7757 02: 90000001 1ffff688 00000002 (S)FETCH: SAMPLE R0.xyzw = R0.xyz CONST(0) LOCATION(CENTER) 7758 0000 0000 c400 ALLOC PARAM/PIXEL SIZE(0x0) 7759 1003 0002 2000 EXEC_END ADDR(0x3) CNT(0x1) 7760 03: 000f8000 00000000 c2000000 (S)ALU: MAXv export0 = R0, R0 ; gl_FragColor 7761 0000 0000 0000 NOP 77620122e140: 0000: c00d2b00 00000001 0000000c 00031002 00001000 c4000000 00021003 00002000 77630122e160: 0020: 00000000 90000001 1ffff688 00000002 000f8000 00000000 c2000000 7764t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7765 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 77660122e17c: 0000: c0012d00 00040181 00000106 7767t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7768 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 77690122e188: 0000: c0012d00 00040180 10030002 7770t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 77710122e19c: 0.000000 0.000000 0.000000 0.000000 77720122e194: 0000: c0042d00 00000080 00000000 00000000 00000000 00000000 7773t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7774 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 77750122e1ac: 0000: c0012d00 00040202 00000c20 7776t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7777 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 77780122e1b8: 0000: c0012d00 00040201 00000000 7779t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7780 RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 77810122e1c4: 0000: c0012d00 00040104 0000000f 7782t3 opcode: CP_SET_CONSTANT (2d) (6 dwords) 7783 RB_BLEND_RED: 0 7784 RB_BLEND_GREEN: 0 7785 RB_BLEND_BLUE: 0 7786 RB_BLEND_ALPHA: 0 77870122e1d0: 0000: c0042d00 00040105 00000000 00000000 00000000 00000000 7788t3 opcode: CP_SET_CONSTANT (2d) (8 dwords) 7789 set texture const 0000 7790 clamp x/y/z: clamp-last-texel/clamp-last-texel/clamp-last-texel 7791 filter min/mag: point/point 7792 swizzle: zyxw 7793 addr=0108a000 (flags=806), size=256x256, pitch=16640, format=FMT_8_8_8_8 7794 mipaddr=00000000 (flags=200) 77950122e1e8: 0000: c0062d00 00010000 82024800 0108a806 001fe0ff 00000c14 00000000 00000200 7796t3 opcode: CP_SET_CONSTANT (2d) (3 dwords) 7797 VGT_INDX_OFFSET: 0 77980122e208: 0000: c0012d00 00040102 00000000 7799t0 write TC_CNTL_STATUS (0e00) 7800 TC_CNTL_STATUS: { L2_INVALIDATE } 78010122e214: 0000: 00000e00 00000001 7802t3 opcode: CP_WAIT_REG_EQ (52) (5 dwords) 78030122e21c: 0000: c0035200 000005d0 00000000 00001000 00000001 7804t3 opcode: CP_DRAW_INDX_BIN (34) (7 dwords) 78050122e230: 0000: c0053400 00000000 0003c004 00000000 00000003 01009040 00000006 7806t0 write CP_SCRATCH_REG7 (057f) 7807 CP_SCRATCH_REG7: 133 7808 :0,0,137,133 78090122e24c: 0000: 0000057f 00000085 7810t3 opcode: CP_NOP (10) (2 dwords) 78110122e254: 0000: c0001000 00000000 7812t3 opcode: CP_DRAW_INDX (22) (3 dwords) 7813 { VIZ_QUERY = 0 } 7814 { PRIM_TYPE = DI_PT_TRIFAN | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX_SIZE_IGN | NUM_INSTANCES = 0 | 0x40000 } 7815 draw: 0 7816 prim_type: DI_PT_TRIFAN (5) 7817 source_select: DI_SRC_SEL_AUTO_INDEX (2) 7818 num_indices: 1407 7819 draw[22] register values 7820 + ffffffff RBBM_PM_OVERRIDE1: { RBBM_AHBCLK_PM_OVERRIDE | SC_REG_SCLK_PM_OVERRIDE | SC_SCLK_PM_OVERRIDE | SP_TOP_SCLK_PM_OVERRIDE | SP_V0_SCLK_PM_OVERRIDE | SQ_REG_SCLK_PM_OVERRIDE | SQ_REG_FIFOS_SCLK_PM_OVERRIDE | SQ_CONST_MEM_SCLK_PM_OVERRIDE | SQ_SQ_SCLK_PM_OVERRIDE | SX_SCLK_PM_OVERRIDE | SX_REG_SCLK_PM_OVERRIDE | TCM_TCO_SCLK_PM_OVERRIDE | TCM_TCM_SCLK_PM_OVERRIDE | TCM_TCD_SCLK_PM_OVERRIDE | TCM_REG_SCLK_PM_OVERRIDE | TPC_TPC_SCLK_PM_OVERRIDE | TPC_REG_SCLK_PM_OVERRIDE | TCF_TCA_SCLK_PM_OVERRIDE | TCF_TCB_SCLK_PM_OVERRIDE | TCF_TCB_READ_SCLK_PM_OVERRIDE | TP_TP_SCLK_PM_OVERRIDE | TP_REG_SCLK_PM_OVERRIDE | CP_G_SCLK_PM_OVERRIDE | CP_REG_SCLK_PM_OVERRIDE | CP_G_REG_SCLK_PM_OVERRIDE | SPI_SCLK_PM_OVERRIDE | RB_REG_SCLK_PM_OVERRIDE | RB_SCLK_PM_OVERRIDE | MH_MH_SCLK_PM_OVERRIDE | MH_REG_SCLK_PM_OVERRIDE | MH_MMU_SCLK_PM_OVERRIDE | MH_TCROQ_SCLK_PM_OVERRIDE } 7821 + 00000fff RBBM_PM_OVERRIDE2: 0xfff 7822 + 00000000 CP_PERFMON_CNTL: 0 7823!+ 00000089 CP_SCRATCH_REG6: 137 7824 :0,0,137,133 7825!+ 00000085 CP_SCRATCH_REG7: 133 7826 :0,0,137,133 7827 + 00000180 SQ_INST_STORE_MANAGMENT: { INST_BASE_PIX = 384 | INST_BASE_VTX = 0 } 7828 + 00000001 TC_CNTL_STATUS: { L2_INVALIDATE } 7829 + 00000002 TP0_CHICKEN: 0x2 7830 + 1c004046 RB_BC_CONTROL: { ACCUM_TIMEOUT_SELECT = 3 | DISABLE_LZ_NULL_ZCMD_DROP | AZ_THROTTLE_COUNT = 0 | ENABLE_CRC_UPDATE | ACCUM_ALLOC_MASK = 0 | ACCUM_DATA_FIFO_LIMIT = 8 | MEM_EXPORT_TIMEOUT_SELECT = 3 } 7831!+ 00000020 RB_SURFACE_INFO: { SURFACE_PITCH = 32 | MSAA_SAMPLES = 0 } 7832!+ 01266245 RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 | LINEAR | ENDIAN = 0 | SWAP = 1 | BASE = 0x1266000 } 7833 + 80000000 PA_SC_SCREEN_SCISSOR_TL: { WINDOW_OFFSET_DISABLE | X = 0 | Y = 0 } 7834!+ 00080004 PA_SC_SCREEN_SCISSOR_BR: { X = 4 | Y = 8 } 7835 + 00000000 PA_SC_WINDOW_OFFSET: { X = 0 | Y = 0 } 7836 + 00000000 PA_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 7837!+ 00080004 PA_SC_WINDOW_SCISSOR_BR: { X = 4 | Y = 8 } 7838 + ffffffff VGT_MAX_VTX_INDX: 0xffffffff 7839 + 00000000 VGT_MIN_VTX_INDX: 0 7840 + 00000000 VGT_INDX_OFFSET: 0 7841 + 0000000f RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 7842 + 00000000 RB_BLEND_RED: 0 7843 + 00000000 RB_BLEND_GREEN: 0 7844 + 00000000 RB_BLEND_BLUE: 0 7845 + 00000000 RB_BLEND_ALPHA: 0 7846 + 00000000 RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7847 + 00000000 RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 } 7848 + 00000000 RB_ALPHA_REF: 0 7849!+ 40000000 PA_CL_VPORT_XSCALE: 2.000000 7850!+ 40000000 PA_CL_VPORT_XOFFSET: 2.000000 7851!+ 40800000 PA_CL_VPORT_YSCALE: 4.000000 7852!+ 40800000 PA_CL_VPORT_YOFFSET: 4.000000 7853!+ 00000000 PA_CL_VPORT_ZSCALE: 0.000000 7854!+ 00000000 PA_CL_VPORT_ZOFFSET: 0.000000 7855 + 10030002 SQ_PROGRAM_CNTL: { VS_REGS = 2 | PS_REGS = 0 | VS_RESOURCE | PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR | PS_EXPORT_MODE = 2 } 7856 + 00000106 SQ_CONTEXT_MISC: { SC_OUTPUT_SCREEN_XY | SC_SAMPLE_CNTL = CENTERS_ONLY | PARAM_GEN_POS = 1 } 7857 + ffffffff SQ_INTERPOLATOR_CNTL: { PARAM_SHADE = 65535 | SAMPLING_PATTERN = 65535 } 7858 + 00000000 SQ_WRAPPING_0: { PARAM_WRAP_0 = 0 | PARAM_WRAP_1 = 0 | PARAM_WRAP_2 = 0 | PARAM_WRAP_3 = 0 | PARAM_WRAP_4 = 0 | PARAM_WRAP_5 = 0 | PARAM_WRAP_6 = 0 | PARAM_WRAP_7 = 0 } 7859 + 00000000 SQ_WRAPPING_1: { PARAM_WRAP_8 = 0 | PARAM_WRAP_9 = 0 | PARAM_WRAP_10 = 0 | PARAM_WRAP_11 = 0 | PARAM_WRAP_12 = 0 | PARAM_WRAP_13 = 0 | PARAM_WRAP_14 = 0 | PARAM_WRAP_15 = 0 } 7860 + 00000000 RB_DEPTHCONTROL: { ZFUNC = FUNC_NEVER | STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS = STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER | STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP | STENCILZFAIL_BF = STENCIL_KEEP } 7861 + 00000000 RB_BLEND_CONTROL: { COLOR_SRCBLEND = FACTOR_ZERO | COLOR_COMB_FCN = BLEND2_DST_PLUS_SRC | COLOR_DESTBLEND = FACTOR_ZERO | ALPHA_SRCBLEND = FACTOR_ZERO | ALPHA_COMB_FCN = BLEND2_DST_PLUS_SRC | ALPHA_DESTBLEND = FACTOR_ZERO } 7862!+ 00000c20 RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE | ROP_CODE = 12 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 | ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 } 7863 + 00000000 PA_CL_CLIP_CNTL: { DX_CLIP_SPACE_DEF = DXCLIP_OPENGL } 7864!+ 00090244 PA_SU_SC_MODE_CNTL: { FACE | POLYMODE = POLY_DISABLED | FRONT_PTYPE = PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | VTX_WINDOW_OFFSET_ENABLE | PROVOKING_VTX_LAST } 7865 + 0000043f PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA | VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VPORT_Z_SCALE_ENA | VPORT_Z_OFFSET_ENA | VTX_W0_FMT } 7866 + 00000004 RB_MODECONTROL: { EDRAM_MODE = COLOR_DEPTH } 7867 + 88888888 RB_SAMPLE_POS: 0x88888888 7868!+ 00000000 PA_SU_POINT_SIZE: { HEIGHT = 0.000000 | WIDTH = 0.000000 } 7869!+ 00000000 PA_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 } 7870!+ 00000000 PA_SU_LINE_CNTL: { WIDTH = 0.000000 } 7871 + 00000000 PA_SC_LINE_STIPPLE: { LINE_PATTERN = 0 | REPEAT_COUNT = 0 | PATTERN_BIT_ORDER = LITTLE | AUTO_RESET_CNTL = NEVER } 7872 + 00000020 PA_SC_VIZ_QUERY: { VIZ_QUERY_ID = 16 } 7873 + 00000000 PA_SC_LINE_CNTL: { BRES_CNTL = 0 } 7874 + 00000000 PA_SC_AA_CONFIG: { MSAA_NUM_SAMPLES = 0 | MAX_SAMPLE_DIST = 0 } 7875 + 00000001 PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE = TRUNCATE | QUANT_MODE = ONE_SIXTEENTH } 7876 + 3f800000 PA_CL_GB_VERT_CLIP_ADJ: 1.000000 7877 + 3f800000 PA_CL_GB_VERT_DISC_ADJ: 1.000000 7878 + 3f800000 PA_CL_GB_HORZ_CLIP_ADJ: 1.000000 7879 + 3f800000 PA_CL_GB_HORZ_DISC_ADJ: 1.000000 7880 + 00100020 SQ_VS_CONST: { BASE = 32 | SIZE = 256 } 7881 + 000e0120 SQ_PS_CONST: { BASE = 288 | SIZE = 224 } 7882 + 0000ffff PA_SC_AA_MASK: 0xffff 7883 + 00000002 VGT_VERTEX_REUSE_BLOCK_CNTL: { VTX_REUSE_DEPTH = 2 } 7884 + 00000002 VGT_OUT_DEALLOC_CNTL: { DEALLOC_DIST = 2 } 7885 + 0003c000 RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | FORMAT = COLORX_4_4_4_4 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE | DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE | WRITE_ALPHA } 7886 + ffffffff RB_COLOR_DEST_MASK: 0xffffffff 78870122e25c: 0000: c0012200 00000000 00040085 7888t0 write CP_SCRATCH_REG7 (057f) 7889NEEDS WFI: CP_SCRATCH_REG7 (57f) 7890 CP_SCRATCH_REG7: 134 7891 :0,0,137,134 78920122e268: 0000: 0000057f 00000086 7893t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords) 78940122e270: 0000: c0002600 00000000 7895t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7896 { EVENT = CACHE_FLUSH } 7897 event CACHE_FLUSH 78980122e278: 0000: c0004600 00000006 7899t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7900 { EVENT = CACHE_FLUSH } 7901 event CACHE_FLUSH 79020122e280: 0000: c0004600 00000006 7903t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7904 { EVENT = CACHE_FLUSH } 7905 event CACHE_FLUSH 79060122e288: 0000: c0004600 00000006 7907t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7908 { EVENT = CACHE_FLUSH } 7909 event CACHE_FLUSH 79100122e290: 0000: c0004600 00000006 7911t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7912 { EVENT = CACHE_FLUSH } 7913 event CACHE_FLUSH 79140122e298: 0000: c0004600 00000006 7915t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7916 { EVENT = CACHE_FLUSH } 7917 event CACHE_FLUSH 79180122e2a0: 0000: c0004600 00000006 7919t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7920 { EVENT = CACHE_FLUSH } 7921 event CACHE_FLUSH 79220122e2a8: 0000: c0004600 00000006 7923t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7924 { EVENT = CACHE_FLUSH } 7925 event CACHE_FLUSH 79260122e2b0: 0000: c0004600 00000006 7927t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7928 { EVENT = CACHE_FLUSH } 7929 event CACHE_FLUSH 79300122e2b8: 0000: c0004600 00000006 7931t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7932 { EVENT = CACHE_FLUSH } 7933 event CACHE_FLUSH 79340122e2c0: 0000: c0004600 00000006 7935t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7936 { EVENT = CACHE_FLUSH } 7937 event CACHE_FLUSH 79380122e2c8: 0000: c0004600 00000006 7939t3 opcode: CP_EVENT_WRITE (46) (2 dwords) 7940 { EVENT = CACHE_FLUSH } 7941 event CACHE_FLUSH 79420122e2d0: 0000: c0004600 00000006 79430122f1d8: 0000: c0013700 0122e000 000000b6 7944t2 nop 7945############################################################ 7946vertices: 0 7947