Searched refs:base_lo (Results 1 – 6 of 6) sorted by relevance
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | chain-hi-to-lo.ll | 37 define <2 x half> @chain_hi_to_lo_private_different_bases(half addrspace(5)* %base_lo, half addrspa…
56 %load_lo = load half, half addrspace(5)* %base_lo
115 define <2 x half> @chain_hi_to_lo_group_different_bases(half addrspace(3)* %base_lo, half addrspace…
125 %load_lo = load half, half addrspace(3)* %base_lo
159 define <2 x half> @chain_hi_to_lo_global_different_bases(half addrspace(1)* %base_lo, half addrspac…
169 %load_lo = load half, half addrspace(1)* %base_lo
203 define <2 x half> @chain_hi_to_lo_flat_different_bases(half* %base_lo, half* %base_hi) {
213 %load_lo = load half, half* %base_lo
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| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| D | mtrr.h | 71 __u32 base_lo; member
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| /external/mesa3d/src/freedreno/ir3/ |
| D | ir3_compiler_nir.c | 755 struct ir3_instruction *base_lo, *base_hi, *addr, *src0, *src1; in emit_intrinsic_load_ubo() local
766 base_lo = create_uniform(b, ubo + (src0->regs[1]->iim_val * ptrsz)); in emit_intrinsic_load_ubo()
769 base_lo = create_uniform_indirect(b, ubo, TYPE_U32, ir3_get_addr0(ctx, src0, ptrsz)); in emit_intrinsic_load_ubo()
781 addr = base_lo; in emit_intrinsic_load_ubo()
810 carry = ir3_CMPS_U(b, addr, 0, base_lo, 0); in emit_intrinsic_load_ubo()
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| D | instr-a3xx.h | 718 uint32_t base_lo : 1; /* used with bindless */ member
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| D | ir3.c | 486 cat5->base_lo = instr->cat5.tex_base & 1; in emit_cat5()
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| D | disasm-a3xx.c | 780 unsigned base = (cat5->s2en_bindless.base_hi << 1) | cat5->base_lo; in print_instr_cat5()
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