| /external/arm-trusted-firmware/plat/xilinx/versal/ |
| D | bl31_versal_setup.c | 23 static entry_point_info_t bl32_image_ep_info; variable
41 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
49 bl32_image_ep_info.pc = BL32_BASE; in bl31_set_default_config()
50 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); in bl31_set_default_config()
93 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
94 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
99 enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info, in bl31_early_platform_setup2()
108 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/xilinx/zynqmp/ |
| D | bl31_zynqmp_setup.c | 22 static entry_point_info_t bl32_image_ep_info; variable
39 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
48 bl32_image_ep_info.pc = BL32_BASE; in bl31_set_default_config()
49 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); in bl31_set_default_config()
89 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
90 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
100 enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info, in bl31_early_platform_setup2()
109 if (bl32_image_ep_info.pc) { in bl31_early_platform_setup2()
110 VERBOSE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/marvell/armada/common/ |
| D | marvell_bl31_setup.c | 27 static entry_point_info_t bl32_image_ep_info; variable
50 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
79 SET_PARAM_HEAD(&bl32_image_ep_info, in marvell_bl31_early_platform_setup()
83 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in marvell_bl31_early_platform_setup()
84 bl32_image_ep_info.pc = BL32_BASE; in marvell_bl31_early_platform_setup()
85 bl32_image_ep_info.spsr = marvell_get_spsr_for_bl32_entry(); in marvell_bl31_early_platform_setup()
126 bl32_image_ep_info = *bl_params->ep_info; in marvell_bl31_early_platform_setup()
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| /external/arm-trusted-firmware/plat/layerscape/common/ |
| D | ls_bl31_setup.c | 23 static entry_point_info_t bl32_image_ep_info; variable
51 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
82 SET_PARAM_HEAD(&bl32_image_ep_info, in ls_bl31_early_platform_setup()
86 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in ls_bl31_early_platform_setup()
87 bl32_image_ep_info.pc = BL32_BASE; in ls_bl31_early_platform_setup()
88 bl32_image_ep_info.spsr = ls_get_spsr_for_bl32_entry(); in ls_bl31_early_platform_setup()
132 bl32_image_ep_info = *bl_params->ep_info; in ls_bl31_early_platform_setup()
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| /external/arm-trusted-firmware/plat/allwinner/common/ |
| D | sunxi_bl31_setup.c | 28 static entry_point_info_t bl32_image_ep_info; variable
88 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
89 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
90 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
185 if ((type == SECURE) && bl32_image_ep_info.pc) in bl31_plat_get_next_image_ep_info()
186 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /external/arm-trusted-firmware/plat/arm/common/ |
| D | arm_bl31_setup.c | 26 static entry_point_info_t bl32_image_ep_info; variable
84 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
116 SET_PARAM_HEAD(&bl32_image_ep_info, in arm_bl31_early_platform_setup()
120 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in arm_bl31_early_platform_setup()
121 bl32_image_ep_info.pc = BL32_BASE; in arm_bl31_early_platform_setup()
122 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); in arm_bl31_early_platform_setup()
131 bl32_image_ep_info.args.arg0 = ARM_TRUSTED_SRAM_BASE + in arm_bl31_early_platform_setup()
198 bl32_image_ep_info = *bl_params->ep_info; in arm_bl31_early_platform_setup()
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| /external/arm-trusted-firmware/plat/imx/imx8m/imx8mm/ |
| D | imx8mm_bl31_setup.c | 57 static entry_point_info_t bl32_image_ep_info; variable
129 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
130 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
131 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
132 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
178 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /external/arm-trusted-firmware/plat/imx/imx8m/imx8mp/ |
| D | imx8mp_bl31_setup.c | 55 static entry_point_info_t bl32_image_ep_info; variable
127 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
128 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
129 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
130 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
178 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /external/arm-trusted-firmware/plat/imx/imx8m/imx8mn/ |
| D | imx8mn_bl31_setup.c | 57 static entry_point_info_t bl32_image_ep_info; variable
129 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
130 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
131 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
132 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
178 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /external/arm-trusted-firmware/plat/brcm/common/ |
| D | brcm_bl31_setup.c | 29 static entry_point_info_t bl32_image_ep_info; variable
65 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
103 SET_PARAM_HEAD(&bl32_image_ep_info, in brcm_bl31_early_platform_setup()
107 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in brcm_bl31_early_platform_setup()
108 bl32_image_ep_info.pc = BL32_BASE; in brcm_bl31_early_platform_setup()
109 bl32_image_ep_info.spsr = brcm_get_spsr_for_bl32_entry(); in brcm_bl31_early_platform_setup()
167 bl32_image_ep_info = *bl_params->ep_info; in brcm_bl31_early_platform_setup()
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| /external/arm-trusted-firmware/plat/socionext/synquacer/ |
| D | sq_bl31_setup.c | 20 static entry_point_info_t bl32_image_ep_info; variable
30 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
93 SET_PARAM_HEAD(&bl32_image_ep_info, in bl31_early_platform_setup2()
97 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
98 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
99 bl32_image_ep_info.spsr = sq_get_spsr_for_bl32_entry(); in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/ti/k3/common/ |
| D | k3_bl31_setup.c | 37 static entry_point_info_t bl32_image_ep_info; variable
74 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
75 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
76 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, in bl31_early_platform_setup2()
78 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
187 &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /external/arm-trusted-firmware/plat/imx/imx8m/imx8mq/ |
| D | imx8mq_bl31_setup.c | 46 static entry_point_info_t bl32_image_ep_info; variable
151 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
152 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
153 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
154 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
204 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /external/arm-trusted-firmware/plat/amlogic/axg/ |
| D | axg_bl31_setup.c | 22 static entry_point_info_t bl32_image_ep_info; variable
38 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
84 bl32_image_ep_info = *from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
95 bl32_image_ep_info.args.arg0 = MODE_RW_32; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/qemu/common/ |
| D | qemu_bl31_setup.c | 18 static entry_point_info_t bl32_image_ep_info; variable
52 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
94 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /external/arm-trusted-firmware/plat/socionext/uniphier/ |
| D | uniphier_bl31_setup.c | 21 static entry_point_info_t bl32_image_ep_info; variable
28 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
48 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/hisilicon/poplar/ |
| D | bl31_plat_setup.c | 30 static entry_point_info_t bl32_image_ep_info; variable
45 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
94 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/amlogic/g12a/ |
| D | g12a_bl31_setup.c | 22 static entry_point_info_t bl32_image_ep_info; variable
38 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
84 bl32_image_ep_info = *from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| D | tegra_bl31_setup.c | 46 static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info; variable
71 } else if ((type == SECURE) && (bl32_image_ep_info.pc != 0U)) { in bl31_plat_get_next_image_ep_info()
72 ep = &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
119 bl32_image_ep_info = *arg_from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/rpi/rpi3/ |
| D | rpi3_bl31_setup.c | 24 static entry_point_info_t bl32_image_ep_info; variable
40 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
98 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/mediatek/mt6795/ |
| D | bl31_plat_setup.c | 46 static entry_point_info_t bl32_image_ep_info; variable
160 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
210 SET_PARAM_HEAD(&bl32_image_ep_info, in bl31_early_platform_setup2()
214 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
215 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/intel/soc/agilex/ |
| D | bl31_plat_setup.c | 20 static entry_point_info_t bl32_image_ep_info; variable
28 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
77 bl32_image_ep_info = *arg_from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/intel/soc/stratix10/ |
| D | bl31_plat_setup.c | 28 static entry_point_info_t bl32_image_ep_info; variable
36 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
85 bl32_image_ep_info = *arg_from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/rpi/rpi4/ |
| D | rpi4_bl31_setup.c | 46 static entry_point_info_t bl32_image_ep_info; variable
62 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /external/arm-trusted-firmware/plat/xilinx/common/include/ |
| D | plat_startup.h | 18 enum fsbl_handoff fsbl_atf_handover(entry_point_info_t *bl32_image_ep_info,
|