/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | load-constant-i32.ll | 187 ; GCN-NOHSA-DAG: buffer_store_dwordx4 188 ; GCN-NOHSA-DAG: buffer_store_dwordx4 189 ; GCN-NOHSA-DAG: buffer_store_dwordx4 190 ; GCN-NOHSA-DAG: buffer_store_dwordx4 215 ; GCN-NOHSA-DAG: buffer_store_dwordx4 216 ; GCN-NOHSA-DAG: buffer_store_dwordx4 217 ; GCN-NOHSA-DAG: buffer_store_dwordx4 218 ; GCN-NOHSA-DAG: buffer_store_dwordx4 255 ; GCN-NOHSA: buffer_store_dwordx4 256 ; GCN-NOHSA: buffer_store_dwordx4 [all …]
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D | load-global-i32.ll | 157 ; GCN-NOHSA: buffer_store_dwordx4 175 ; GCN-NOHSA-DAG: buffer_store_dwordx4 186 ; GCN-NOHSA: buffer_store_dwordx4 187 ; GCN-NOHSA: buffer_store_dwordx4 208 ; GCN-NOHSA-DAG: buffer_store_dwordx4 209 ; GCN-NOHSA-DAG: buffer_store_dwordx4 227 ; GCN-NOHSA-DAG: buffer_store_dwordx4 228 ; GCN-NOHSA-DAG: buffer_store_dwordx4 229 ; GCN-NOHSA-DAG: buffer_store_dwordx4 230 ; GCN-NOHSA-DAG: buffer_store_dwordx4 [all …]
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D | bitcast-vector-extract.ll | 8 ; GCN: buffer_store_dwordx4 9 ; GCN: buffer_store_dwordx4 11 ; GCN: buffer_store_dwordx4 13 ; GCN: buffer_store_dwordx4 24 ; GCN: buffer_store_dwordx4 25 ; GCN: buffer_store_dwordx4 27 ; GCN: buffer_store_dwordx4 29 ; GCN: buffer_store_dwordx4 40 ; GCN: buffer_store_dwordx4 41 ; GCN: buffer_store_dwordx4 [all …]
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D | function-args.ll | 171 ; GCN: buffer_store_dwordx4 v[0:3], off 178 ; GCN-DAG: buffer_store_dwordx4 v[0:3], off 186 ; GCN-DAG: buffer_store_dwordx4 v[0:3], off 187 ; GCN-DAG: buffer_store_dwordx4 v[4:7], off 194 ; GCN-DAG: buffer_store_dwordx4 v[0:3], off 195 ; GCN-DAG: buffer_store_dwordx4 v[4:7], off 196 ; GCN-DAG: buffer_store_dwordx4 v[8:11], off 197 ; GCN-DAG: buffer_store_dwordx4 v[12:15], off 204 ; GCN-DAG: buffer_store_dwordx4 v[0:3], off 205 ; GCN-DAG: buffer_store_dwordx4 v[4:7], off [all …]
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D | reorder-stores.ll | 7 ; GCN: buffer_store_dwordx4 8 ; GCN: buffer_store_dwordx4 41 ; GCN: buffer_store_dwordx4 42 ; GCN: buffer_store_dwordx4 43 ; GCN: buffer_store_dwordx4 44 ; GCN: buffer_store_dwordx4
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D | indirect-addressing-si-noopt.ll | 12 ; CHECK: buffer_store_dwordx4 13 ; CHECK: buffer_store_dwordx4 14 ; CHECK: buffer_store_dwordx4 15 ; CHECK: buffer_store_dwordx4
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D | llvm.amdgcn.struct.buffer.store.ll | 6 ;CHECK: buffer_store_dwordx4 v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 7 ;CHECK: buffer_store_dwordx4 v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_store_dwordx4 v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 19 ;CHECK: buffer_store_dwordx4 v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 28 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 idxen 37 ;CHECK: buffer_store_dwordx4 v[0:3], v[4:5], s[0:3], 0 idxen offen 46 ;CHECK: buffer_store_dwordx4 v[0:3], v[4:5], s[0:3], 0 idxen offen 56 ;CHECK: buffer_store_dwordx4 v[0:3], v[5:6], s[0:3], 0 idxen offen 67 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 idxen 71 ;CHECK: buffer_store_dwordx4 v[0:3], v6, s[0:3], 0 idxen [all …]
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D | llvm.amdgcn.buffer.store.ll | 6 ;CHECK: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 7 ;CHECK: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 glc 8 ;CHECK: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 slc 19 ;CHECK: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:42 28 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 idxen 37 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen 46 ;CHECK: buffer_store_dwordx4 v[0:3], v[4:5], s[0:3], 0 idxen offen 56 ;CHECK: buffer_store_dwordx4 v[0:3], v[5:6], s[0:3], 0 idxen offen 67 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 idxen 71 ;CHECK: buffer_store_dwordx4 v[0:3], v6, s[0:3], 0 idxen [all …]
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D | insert_vector_elt.ll | 25 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 40 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 60 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 75 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 95 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 110 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 130 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 145 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 165 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 180 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 [all …]
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D | llvm.amdgcn.raw.buffer.store.ll | 6 ;CHECK: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 7 ;CHECK: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 glc 8 ;CHECK: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 slc 19 ;CHECK: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:42 28 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen 39 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen 43 ;CHECK: buffer_store_dwordx4 v[0:3], v6, s[0:3], 0 offen 72 ;CHECK-DAG: buffer_store_dwordx4 v[{{[0-9]}}:{{[0-9]}}], v0, s[0:3], 0 offen offset:4 92 ;CHECK-DAG: buffer_store_dwordx4 v[{{[0-9]}}:{{[0-9]}}], v{{[0-9]}}, s[0:3], 0 offen offset:4 135 ;CHECK: buffer_store_dwordx4 v[{{[0-9]}}:{{[0-9]}}], v0, s[0:3], 0 offen offset:4 [all …]
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D | ds_read2_superreg.ll | 89 ; CI: buffer_store_dwordx4 [[REG_ZW]] 102 ; CI: buffer_store_dwordx4 [[REG_ZW]] 117 ; CI-DAG: buffer_store_dwordx4 [[VEC_HI]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 off… 118 ; CI-DAG: buffer_store_dwordx4 [[VEC_LO]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64{{$}} 136 ; CI-DAG: buffer_store_dwordx4 [[VEC0_3]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64{{$}} 137 ; CI-DAG: buffer_store_dwordx4 [[VEC4_7]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 off… 138 ; CI-DAG: buffer_store_dwordx4 [[VEC8_11]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 of… 139 ; CI-DAG: buffer_store_dwordx4 [[VEC12_15]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 o… 177 ; CI: buffer_store_dwordx4 v{{\[}}[[REG_ELT0]]:[[REG_ELT3]]{{\]}}
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D | shift-and-i128-ubfe.ll | 12 ; GCN: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[… 35 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO3]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9… 57 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9… 80 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO3]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9… 104 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[OR0]]:[[ZERO1]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+…
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D | merge-stores.ll | 106 ; GCN: buffer_store_dwordx4 v{{\[}}[[LO]]:[[HI]]{{\]}} 120 ; GCN: buffer_store_dwordx4 135 ; GCN: buffer_store_dwordx4 149 ; GCN-AA: buffer_store_dwordx4 v 183 ; GCN: buffer_store_dwordx4 193 ; GCN: buffer_store_dwordx4 194 ; GCN: buffer_store_dwordx4 256 ; GCN: buffer_store_dwordx4 [[LOAD]] 304 ; GCN: buffer_store_dwordx4 [[LOAD]] 327 ; GCN: buffer_store_dwordx4 [[LOAD]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:28 [all …]
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D | trunc-store.ll | 5 ; SI: buffer_store_dwordx4 13 ; SI: buffer_store_dwordx4
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D | load-constant-i16.ll | 313 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 345 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 382 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16 388 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 433 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16 434 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[8:11], 0 508 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 509 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 575 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 576 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 [all …]
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D | extract-vector-elt-build-vector-combine.ll | 9 ; GCN: buffer_store_dwordx4 10 ; GCN: buffer_store_dwordx4 52 ; GCN: buffer_store_dwordx4 98 ; GCN: buffer_store_dwordx4
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/external/llvm/test/CodeGen/AMDGPU/ |
D | load-constant-i32.ll | 185 ; GCN-NOHSA-DAG: buffer_store_dwordx4 186 ; GCN-NOHSA-DAG: buffer_store_dwordx4 187 ; GCN-NOHSA-DAG: buffer_store_dwordx4 188 ; GCN-NOHSA-DAG: buffer_store_dwordx4 213 ; GCN-NOHSA-DAG: buffer_store_dwordx4 214 ; GCN-NOHSA-DAG: buffer_store_dwordx4 215 ; GCN-NOHSA-DAG: buffer_store_dwordx4 216 ; GCN-NOHSA-DAG: buffer_store_dwordx4 253 ; GCN-NOHSA: buffer_store_dwordx4 254 ; GCN-NOHSA: buffer_store_dwordx4 [all …]
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D | load-global-i32.ll | 155 ; GCN-NOHSA: buffer_store_dwordx4 173 ; GCN-NOHSA-DAG: buffer_store_dwordx4 184 ; GCN-NOHSA: buffer_store_dwordx4 185 ; GCN-NOHSA: buffer_store_dwordx4 206 ; GCN-NOHSA-DAG: buffer_store_dwordx4 207 ; GCN-NOHSA-DAG: buffer_store_dwordx4 225 ; GCN-NOHSA-DAG: buffer_store_dwordx4 226 ; GCN-NOHSA-DAG: buffer_store_dwordx4 227 ; GCN-NOHSA-DAG: buffer_store_dwordx4 228 ; GCN-NOHSA-DAG: buffer_store_dwordx4 [all …]
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D | insert_vector_elt.ll | 20 ; GCN: buffer_store_dwordx4 v{{\[}}[[LOW_REG]]: 109 ; GCN: buffer_store_dwordx4 {{v\[}}[[LOW_RESULT_REG]]: 118 ; GCN: buffer_store_dwordx4 119 ; GCN: buffer_store_dwordx4 128 ; GCN: buffer_store_dwordx4 129 ; GCN: buffer_store_dwordx4 130 ; GCN: buffer_store_dwordx4 131 ; GCN: buffer_store_dwordx4 160 ; GCN: buffer_store_dwordx4 169 ; GCN: buffer_store_dwordx4 [all …]
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D | llvm.amdgcn.buffer.store.ll | 5 ;CHECK: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 slc 17 ;CHECK: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:42 25 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 idxen 33 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 offen 41 ;CHECK: buffer_store_dwordx4 v[0:3], v[4:5], s[0:3], 0 idxen offen 50 ;CHECK: buffer_store_dwordx4 v[0:3], v[5:6], s[0:3], 0 idxen offen 60 ;CHECK: buffer_store_dwordx4 v[0:3], v4, s[0:3], 0 idxen 64 ;CHECK: buffer_store_dwordx4 v[0:3], v6, s[0:3], 0 idxen
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D | reorder-stores.ll | 7 ; SI: buffer_store_dwordx4 8 ; SI: buffer_store_dwordx4 37 ; SI: buffer_store_dwordx4 38 ; SI: buffer_store_dwordx4 39 ; SI: buffer_store_dwordx4 40 ; SI: buffer_store_dwordx4
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D | ds_read2_superreg.ll | 89 ; CI: buffer_store_dwordx4 [[REG_ZW]] 102 ; CI: buffer_store_dwordx4 [[REG_ZW]] 117 ; CI-DAG: buffer_store_dwordx4 [[VEC_HI]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 off… 118 ; CI-DAG: buffer_store_dwordx4 [[VEC_LO]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64{{$}} 136 ; CI-DAG: buffer_store_dwordx4 [[VEC0_3]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64{{$}} 137 ; CI-DAG: buffer_store_dwordx4 [[VEC4_7]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 off… 138 ; CI-DAG: buffer_store_dwordx4 [[VEC8_11]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 of… 139 ; CI-DAG: buffer_store_dwordx4 [[VEC12_15]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 o… 177 ; CI: buffer_store_dwordx4 v{{\[}}[[REG_ELT0]]:[[REG_ELT3]]{{\]}}
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D | trunc-store.ll | 5 ; SI: buffer_store_dwordx4 13 ; SI: buffer_store_dwordx4
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D | shift-and-i128-ubfe.ll | 12 ; GCN: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[… 34 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9… 56 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9… 78 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9… 102 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[OR0]]:[[ZERO]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:…
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D | extract-vector-elt-build-vector-combine.ll | 9 ; GCN: buffer_store_dwordx4 10 ; GCN: buffer_store_dwordx4 52 ; GCN: buffer_store_dwordx4 98 ; GCN: buffer_store_dwordx4
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