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Searched refs:cr3 (Results 1 – 25 of 69) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dreg_copy.mir25 …; CHECK: renamable $cr3 = nofpexcept XVTDIVDP killed renamable $v2, killed renamable $v3, implicit…
26 ; CHECK: $r3 = MFOCRF $cr3
29 renamable $cr3 = nofpexcept XVTDIVDP killed renamable $v2, killed renamable $v3, implicit $rm
30 renamable $r3 = COPY killed renamable $cr3, implicit-def $x3
66 …; CHECK: renamable $cr3 = nofpexcept XVTDIVDP killed renamable $v2, killed renamable $v3, implicit…
67 ; CHECK: $x5 = MFOCRF8 $cr3
70 renamable $cr3 = nofpexcept XVTDIVDP killed renamable $v2, killed renamable $v3, implicit $rm
71 renamable $x5 = COPY killed renamable $cr3, implicit-def $x3
Daix32-crsave.mir62 ; CHECK-NEXT: isImmutable: true, isAliased: false, callee-saved-register: '$cr3',
68 ; CHECK-NEXT: liveins: $r3, $r14, $cr3
70 ; CHECK: $r12 = MFCR implicit killed $cr3
76 ; CHECK-NEXT: $cr3 = MTOCRF killed $r12
Dppc64le-crsave.ll12 call void asm sideeffect "", "~{cr3}"()
26 ; CHECK: .cfi_offset cr3, 8
Dp10-spill-crlt.ll39 ; CHECK-NEXT: .cfi_offset cr3, 8
47 ; CHECK-NEXT: cmpdi cr3, r3, 0
49 ; CHECK-NEXT: crnot 4*cr5+lt, 4*cr3+eq
68 ; CHECK-NEXT: bc 12, 4*cr3+eq, .LBB0_9
113 ; CHECK-BE-NEXT: cmpdi cr3, r3, 0
116 ; CHECK-BE-NEXT: crnot 4*cr5+lt, 4*cr3+eq
136 ; CHECK-BE-NEXT: bc 12, 4*cr3+eq, .LBB0_9
Dcc.ll11 …call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5}…
44 …call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cc},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},…
Dcrsave.ll40 …$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32…
79 tail call void asm sideeffect "# clobbers", "~{cr2},~{cr3},~{cr4}"()
Dp10-spill-creq.ll62 ; CHECK-NEXT: cmpwi cr3, r4, -1
67 ; CHECK-NEXT: crand 4*cr5+gt, 4*cr3+gt, 4*cr5+lt
75 ; CHECK-NEXT: cmpwi cr3, r5, 0
93 ; CHECK-NEXT: crand 4*cr4+un, 4*cr3+lt, 4*cr4+eq
116 ; CHECK-NEXT: crand 4*cr4+eq, 4*cr3+eq, 4*cr4+eq
137 ; CHECK-NEXT: crandc 4*cr5+gt, lt, 4*cr3+eq
Dp10-spill-crgt.ll32 ; CHECK-NEXT: .cfi_offset cr3, 8
46 ; CHECK-NEXT: cmplwi cr3, r3, 336
63 ; CHECK-NEXT: bgt cr3, .LBB0_5
196 ; CHECK-NEXT: cmpwi cr3, r5, 366
240 ; CHECK-BE-NEXT: cmplwi cr3, r3, 336
260 ; CHECK-BE-NEXT: bgt cr3, .LBB0_5
393 ; CHECK-BE-NEXT: cmpwi cr3, r5, 366
D2010-02-12-saveCR.ll19 call void asm sideeffect "", "~{cr2},~{cr3}"() nounwind
DNoCRFieldRedefWhenSpillingCRBIT.mir17 …tail call void asm sideeffect "# nothing", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7…
102 …implicit-def dead early-clobber $cr2, 12, implicit-def dead early-clobber $cr3, 12, implicit-def d…
/external/pffft/
Dfftpack.c294 real ci2, ci3, di2, di3, cr2, cr3, dr2, dr3, ti2, tr2; in passb3() local
317 cr3 = taui * (cc_ref(1, 2, k) - cc_ref(1, 3, k)); in passb3()
321 ch_ref(2, k, 2) = ci2 + cr3; in passb3()
322 ch_ref(2, k, 3) = ci2 - cr3; in passb3()
333 cr3 = taui * (cc_ref(i - 1, 2, k) - cc_ref(i - 1, 3, k)); in passb3()
337 di2 = ci2 + cr3; in passb3()
338 di3 = ci2 - cr3; in passb3()
360 real ci2, ci3, ci4, cr2, cr3, cr4, ti1, ti2, ti3, ti4, tr1, tr2, tr3, tr4; in passb4() local
407 cr3 = tr2 - tr3; in passb4()
416 ch_ref(i - 1, k, 3) = wa2[i - 1] * cr3 - wa2[i] * ci3; in passb4()
[all …]
Dpffft_priv_impl.h114 v4sf tr2, ti2, cr2, ci2, cr3, ci3, dr2, di2, dr3, di3; in passf3_ps() local
126 cr3 = SVMUL(taui, VSUB(cc[i+ido], cc[i+2*ido])); in passf3_ps()
130 di2 = VADD(ci2, cr3); in passf3_ps()
131 di3 = VSUB(ci2, cr3); in passf3_ps()
148 v4sf ci2, ci3, ci4, cr2, cr3, cr4, ti1, ti2, ti3, ti4, tr1, tr2, tr3, tr4; in passf4_ps() local
184 cr3 = VSUB(tr2, tr3); in passf4_ps()
198 VCPLXMUL(cr3, ci3, LD_PS1(wr2), LD_PS1(wi2)); in passf4_ps()
200 ch[i + 2*l1ido] = cr3; in passf4_ps()
224 v4sf ci2, ci3, ci4, ci5, di3, di4, di5, di2, cr2, cr3, cr5, cr4, ti2, ti3, in passf5_ps() local
247 cr3 = VADD(cc_ref(i-1, 1), VADD(SVMUL(tr12, tr2),SVMUL(tr11, tr3))); in passf5_ps()
[all …]
/external/slf4j/slf4j-migrator/src/main/java/org/slf4j/migrator/line/
DJCLRuleSet.java51 SingleConversionRule cr3 = new SingleConversionRule(Pattern.compile("(^Log\\b)"), "Logger"); in JCLRuleSet() local
61 conversionRuleList.add(cr3); in JCLRuleSet()
/external/llvm/test/CodeGen/PowerPC/
Dppc64le-crsave.ll12 call void asm sideeffect "", "~{cr3}"()
26 ; CHECK: .cfi_offset cr3, 8
D2010-02-12-saveCR.ll16 ; CHECK: mfcr [[T4:r[0-9]+]] ; cr3
24 call void asm sideeffect "", "~{cr2},~{cr3}"() nounwind
Dcc.ll11 …call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5}…
44 …call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cc},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},…
Dcrsave.ll39 …$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32…
77 tail call void asm sideeffect "# clobbers", "~{cr2},~{cr3},~{cr4}"()
/external/speex/libspeexdsp/
Dsmallft.c175 float ci2,ci3,ci4,cr2,cr3,cr4,ti1,ti2,ti3,ti4,tr1,tr2,tr3,tr4; in dradf4() local
216 cr3=wa2[i-2]*cc[t3-1]+wa2[i-1]*cc[t3]; in dradf4()
229 tr2=cc[t2-1]+cr3; in dradf4()
230 tr3=cc[t2-1]-cr3; in dradf4()
693 float ci2,ci3,di2,di3,cr2,cr3,dr2,dr3,ti2,tr2; in dradb3() local
736 cr3=taui*(cc[t5-1]-cc[t6-1]); in dradb3()
740 di2=ci2+cr3; in dradb3()
741 di3=ci2-cr3; in dradb3()
755 float ci2,ci3,ci4,cr2,cr3,cr4,ti1,ti2,ti3,ti4,tr1,tr2,tr3,tr4; in dradb4() local
799 cr3=tr2-tr3; in dradb4()
[all …]
/external/llvm-project/llvm/test/MC/PowerPC/
Dppc64-encoding-spe.s84 evcmpeq %cr3, %r22, %r19
87 evcmpgts %cr3, %r22, %r19
90 evcmpgtu %cr3, %r22, %r19
93 evcmplts %cr3, %r22, %r19
96 evcmpltu %cr3, %r22, %r19
653 efdcmpeq %cr3, %r3, %r8
701 efdtsteq %cr3, %r4, %r5
704 efdtstgt %cr3, %r3, %r6
728 efscmpeq %cr3, %r3, %r8
770 efststeq %cr3, %r4, %r5
[all …]
Dppc64-regs.s80 #CHECK: .cfi_offset cr3, 623
196 .cfi_offset cr3,623
/external/linux-kselftest/tools/testing/selftests/kvm/include/x86_64/
Dprocessor.h200 uint64_t cr3; in get_cr3() local
203 : /* output */ [cr3]"=r"(cr3)); in get_cr3()
204 return cr3; in get_cr3()
/external/llvm/test/MC/PowerPC/
Dppc64-regs.s80 #CHECK: .cfi_offset cr3, 623
196 .cfi_offset cr3,623
/external/llvm/test/CodeGen/X86/
Dinline-asm-q-regs.ll8 …%asmtmp = call %0 asm sideeffect "mov %cr0, $0 \0Amov %cr2, $1 \0Amov %cr3, $…
/external/llvm-project/llvm/test/CodeGen/X86/
Dinline-asm-q-regs.ll8 …%asmtmp = call %0 asm sideeffect "mov %cr0, $0 \0Amov %cr2, $1 \0Amov %cr3, $…
Dcallbr-asm-instr-scheduling.ll24 ; CHECK-NEXT: movq %cr3, %rax
42 …%0 = tail call i64 asm sideeffect "mov %cr3,$0\0A\09", "=r,=*m,~{dirflag},~{fpsr},~{flags}"(i64* n…

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