1; RUN: llc -O0 -frame-pointer=all -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC32 2; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC64 3; RUN: llc -O0 -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=PPC64-ELFv2 4 5declare void @foo() 6 7define i32 @test_cr2() nounwind uwtable { 8entry: 9 %ret = alloca i32, align 4 10 %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind 11 store i32 %0, i32* %ret, align 4 12 call void @foo() 13 %1 = load i32, i32* %ret, align 4 14 ret i32 %1 15} 16 17; PPC32-LABEL: test_cr2: 18; PPC32: stwu 1, -32(1) 19; PPC32: stw 31, 28(1) 20; PPC32: mfcr 12 21; PPC32-NEXT: stw 12, 24(31) 22; PPC32: lwz 12, 24(31) 23; PPC32-NEXT: mtocrf 32, 12 24 25; PPC64: .cfi_startproc 26; PPC64: mfcr 12 27; PPC64: stw 12, 8(1) 28; PPC64: stdu 1, -[[AMT:[0-9]+]](1) 29; PPC64: .cfi_def_cfa_offset 128 30; PPC64: .cfi_offset lr, 16 31; PPC64: .cfi_offset cr2, 8 32; PPC64: addi 1, 1, [[AMT]] 33; PPC64: lwz 12, 8(1) 34; PPC64: mtocrf 32, 12 35; PPC64: .cfi_endproc 36 37define i32 @test_cr234() nounwind { 38entry: 39 %ret = alloca i32, align 4 40 %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind 41 store i32 %0, i32* %ret, align 4 42 call void @foo() 43 %1 = load i32, i32* %ret, align 4 44 ret i32 %1 45} 46 47; PPC32-LABEL: test_cr234: 48; PPC32: stwu 1, -32(1) 49; PPC32: stw 31, 28(1) 50; PPC32: mfcr 12 51; PPC32-NEXT: stw 12, 24(31) 52; PPC32: lwz 12, 24(31) 53; PPC32-NEXT: mtocrf 32, 12 54; PPC32-NEXT: mtocrf 16, 12 55; PPC32-NEXT: mtocrf 8, 12 56 57; PPC64: mfcr 12 58; PPC64: stw 12, 8(1) 59; PPC64: stdu 1, -[[AMT:[0-9]+]](1) 60; PPC64: addi 1, 1, [[AMT]] 61; PPC64: lwz 12, 8(1) 62; PPC64: mtocrf 32, 12 63; PPC64: mtocrf 16, 12 64; PPC64: mtocrf 8, 12 65 66; Generate mfocrf in prologue when we need to save 1 nonvolatile CR field 67define void @cloberOneNvCrField() { 68entry: 69 tail call void asm sideeffect "# clobbers", "~{cr2}"() 70 ret void 71 72; PPC64-ELFv2-LABEL: @cloberOneNvCrField 73; PPC64-ELFv2: mfocrf [[REG1:[0-9]+]], 32 74} 75 76; Generate mfcr in prologue when we need to save all nonvolatile CR field 77define void @cloberAllNvCrField() { 78entry: 79 tail call void asm sideeffect "# clobbers", "~{cr2},~{cr3},~{cr4}"() 80 ret void 81 82; PPC64-ELFv2-LABEL: @cloberAllNvCrField 83; PPC64-ELFv2: mfcr [[REG1:[0-9]+]] 84} 85