| /external/llvm-project/llvm/test/MC/ARM/ |
| D | speculation-barriers.s | 5 csdb label
9 @ ARM: csdb @ encoding: [0x14,0xf0,0x20,0xe3]
13 @ THUMB: csdb @ encoding: [0xaf,0xf3,0x14,0x80]
18 @ ERROR-NEXT: csdb
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | speculation-hardening-loads.ll | 13 ; CHECK-NEXT: csdb
30 ; CHECK-NEXT: csdb
52 ; csdb instruction must occur before the add instruction with w8 as operand.
53 ; CHECK-NEXT: csdb
77 ; csdb instruction must occur before the add instruction with x8 as operand.
78 ; CHECK-NEXT: csdb
96 ; CHECK-NOT: csdb
113 ; CHECK-NEXT: csdb
130 ; CHECK-NEXT: csdb
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | speculation-barriers.s | 3 csdb label
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | csdb-thumb.txt | 4 # CHECK: csdb
|
| D | csdb-arm.txt | 4 # CHECK: csdb
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | speculation-barriers.txt | 7 # CHECK: csdb
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3969 def : t2InstAlias<"csdb$p.w", (t2HINT 20, pred:$p), 0>;
3970 def : t2InstAlias<"csdb$p", (t2HINT 20, pred:$p), 1>;
|
| D | ARMInstrInfo.td | 2061 def : InstAlias<"csdb$p", (HINT 20, pred:$p)>, Requires<[IsARM, HasV6K]>;
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 4038 def : t2InstAlias<"csdb$p.w", (t2HINT 20, pred:$p), 0>;
4039 def : t2InstAlias<"csdb$p", (t2HINT 20, pred:$p), 1>;
|
| D | ARMInstrInfo.td | 2176 def : InstAlias<"csdb$p", (HINT 20, pred:$p)>, Requires<[IsARM, HasV6K]>;
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 2181 void csdb();
|
| D | assembler-aarch64.cc | 2713 void Assembler::csdb() { hint(CSDB); } in csdb() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 1344 csdb(); in Csdb()
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 719 void csdb()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 9882 "crc32h\006crc32w\004csdb\004csel\004cset\005csetm\005csinc\005csinv\005"
10460 …{ 235 /* csdb */, ARM::HINT, Convert__imm_95_20__CondCode2_0, AMFBS_IsARM_HasV6K, { MCK_CondCode }…
10461 …{ 235 /* csdb */, ARM::t2HINT, Convert__imm_95_20__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode }, …
10462 …{ 235 /* csdb */, ARM::t2HINT, Convert__imm_95_20__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MC…
|
| D | ARMGenAsmWriter.inc | 12553 /* 74 */ "csdb$\xFF\x02\x01\0"
|
| /external/vixl/test/aarch64/ |
| D | test-cpu-features-aarch64.cc | 249 TEST_NONE(csdb_0, csdb())
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 752 def : InstAlias<"csdb", (HINT 20)>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 709 def : InstAlias<"csdb", (HINT 20)>;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmWriter.inc | 22247 /* 2397 */ "csdb\0"
|
| D | AArch64GenAsmWriter1.inc | 22968 /* 2397 */ "csdb\0"
|
| D | AArch64GenAsmMatcher.inc | 12492 "crc32x\004csdb\004csel\004cset\005csetm\005csinc\005csinv\005csneg\007c"
13450 { 851 /* csdb */, AArch64::HINT, Convert__imm_95_20, AMFBS_None, { }, },
20823 { 851 /* csdb */, AArch64::HINT, Convert__imm_95_20, AMFBS_None, { }, },
|