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/external/mesa3d/src/compiler/nir/
Dnir_lower_flrp.c55 nir_instr_as_alu(neg_a->parent_instr)->exact = alu->exact; in replace_with_strict_ffma()
58 nir_instr_as_alu(inner_ffma->parent_instr)->exact = alu->exact; in replace_with_strict_ffma()
61 nir_instr_as_alu(outer_ffma->parent_instr)->exact = alu->exact; in replace_with_strict_ffma()
84 nir_instr_as_alu(neg_c->parent_instr)->exact = alu->exact; in replace_with_single_ffma()
88 nir_instr_as_alu(one_minus_c->parent_instr)->exact = alu->exact; in replace_with_single_ffma()
91 nir_instr_as_alu(b_times_c->parent_instr)->exact = alu->exact; in replace_with_single_ffma()
94 nir_instr_as_alu(final_ffma->parent_instr)->exact = alu->exact; in replace_with_single_ffma()
117 nir_instr_as_alu(neg_c->parent_instr)->exact = alu->exact; in replace_with_strict()
121 nir_instr_as_alu(one_minus_c->parent_instr)->exact = alu->exact; in replace_with_strict()
124 nir_instr_as_alu(first_product->parent_instr)->exact = alu->exact; in replace_with_strict()
[all …]
/external/mesa3d/src/compiler/spirv/
Dvtn_alu.c257 SpvOp opcode, bool *swap, bool *exact, in vtn_nir_alu_op_for_spirv_opcode() argument
265 *exact = false; in vtn_nir_alu_op_for_spirv_opcode()
324 case SpvOpFOrdEqual: *exact = true; return nir_op_feq; in vtn_nir_alu_op_for_spirv_opcode()
325 case SpvOpFUnordEqual: *exact = true; return nir_op_feq; in vtn_nir_alu_op_for_spirv_opcode()
328 case SpvOpFOrdNotEqual: *exact = true; return nir_op_fneu; in vtn_nir_alu_op_for_spirv_opcode()
329 case SpvOpFUnordNotEqual: *exact = true; return nir_op_fneu; in vtn_nir_alu_op_for_spirv_opcode()
332 case SpvOpFOrdLessThan: *exact = true; return nir_op_flt; in vtn_nir_alu_op_for_spirv_opcode()
333 case SpvOpFUnordLessThan: *exact = true; return nir_op_flt; in vtn_nir_alu_op_for_spirv_opcode()
336 case SpvOpFOrdGreaterThan: *swap = true; *exact = true; return nir_op_flt; in vtn_nir_alu_op_for_spirv_opcode()
337 case SpvOpFUnordGreaterThan: *swap = true; *exact = true; return nir_op_flt; in vtn_nir_alu_op_for_spirv_opcode()
[all …]
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dexact.ll15 ; CHECK-NEXT: [[Y:%.*]] = ashr exact i32 %x, 3
18 %y = sdiv exact i32 %x, 8
24 ; CHECK-NEXT: [[Y:%.*]] = ashr exact <2 x i32> %x, <i32 7, i32 7>
27 %y = sdiv exact <2 x i32> %x, <i32 128, i32 128>
46 %y = sdiv exact i32 %x, 3
67 %y = sdiv exact i32 %x, 3
76 %y = udiv exact i32 %x, %w
83 ; CHECK-NEXT: [[Z:%.*]] = lshr exact i32 %x, %w
87 %z = udiv exact i32 %x, %y
94 ; CHECK-NEXT: [[B:%.*]] = ashr exact i64 [[A]], 2
[all …]
Dsdiv-exact-by-negative-power-of-two.ll11 ; CHECK-NEXT: [[DIV_NEG:%.*]] = ashr exact i8 [[X:%.*]], 5
15 %div = sdiv exact i8 %x, -32
23 %div = sdiv i8 %x, -32 ; not exact
29 ; CHECK-NEXT: [[DIV_NEG:%.*]] = ashr exact <2 x i8> [[X:%.*]], <i8 5, i8 5>
33 %div = sdiv exact <2 x i8> %x, <i8 -32, i8 -32>
39 ; CHECK-NEXT: [[DIV_NEG:%.*]] = ashr exact <2 x i8> [[X:%.*]], <i8 5, i8 4>
43 %div = sdiv exact <2 x i8> %x, <i8 -32, i8 -16>
49 ; CHECK-NEXT: [[DIV:%.*]] = sdiv exact <2 x i8> [[X:%.*]], <i8 -32, i8 16>
52 %div = sdiv exact <2 x i8> %x, <i8 -32, i8 16>
60 %div = sdiv exact <2 x i8> %x, <i8 -32, i8 undef>
Dsdiv-exact-by-power-of-two.ll12 ; CHECK-NEXT: [[DIV:%.*]] = ashr exact i8 [[X:%.*]], 5
15 %div = sdiv exact i8 %x, 32
23 %div = sdiv i8 %x, 32 ; not exact
38 ; CHECK-NEXT: [[DIV:%.*]] = ashr exact <2 x i8> [[X:%.*]], <i8 5, i8 5>
41 %div = sdiv exact <2 x i8> %x, <i8 32, i8 32>
47 ; CHECK-NEXT: [[DIV:%.*]] = ashr exact <2 x i8> [[X:%.*]], <i8 5, i8 4>
50 %div = sdiv exact <2 x i8> %x, <i8 32, i8 16>
58 %div = sdiv exact <2 x i8> %x, <i8 32, i8 undef>
63 ; CHECK-NEXT: [[DIV:%.*]] = sdiv exact <2 x i8> [[X:%.*]], <i8 32, i8 -128>
66 %div = sdiv exact <2 x i8> %x, <i8 32, i8 128> ; non-non-negative divisor
Dcanonicalize-lack-of-signed-truncation-check.ll23 %tmp1 = ashr exact i8 %tmp0, 5
36 %tmp1 = ashr exact i65 %tmp0, 1
52 %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 5>
60 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 6>
65 %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 6>
73 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 5, i8 5>
78 %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 5, i8 5>
86 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
91 %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 undef, i8 5>
99 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
[all …]
Dcanonicalize-signed-truncation-check.ll23 %tmp1 = ashr exact i8 %tmp0, 5
36 %tmp1 = ashr exact i65 %tmp0, 1
52 %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 5>
60 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 6>
65 %tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 6>
73 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 5, i8 5>
78 %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 5, i8 5>
86 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
91 %tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 undef, i8 5>
99 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
[all …]
Dicmp-shr-lt-gt.ll1781 %s = lshr exact i4 %x, 1
1791 %s = lshr exact i4 %x, 1
1801 %s = lshr exact i4 %x, 1
1811 %s = lshr exact i4 %x, 1
1821 %s = lshr exact i4 %x, 1
1831 %s = lshr exact i4 %x, 1
1841 %s = lshr exact i4 %x, 1
1850 %s = lshr exact i4 %x, 1
1859 %s = lshr exact i4 %x, 1
1868 %s = lshr exact i4 %x, 1
[all …]
/external/llvm/test/Transforms/InstCombine/
Dexact.ll15 ; CHECK-NEXT: [[Y:%.*]] = ashr exact i32 %x, 3
18 %y = sdiv exact i32 %x, 8
24 ; CHECK-NEXT: [[Y:%.*]] = ashr exact <2 x i32> %x, <i32 7, i32 7>
27 %y = sdiv exact <2 x i32> %x, <i32 128, i32 128>
46 %y = sdiv exact i32 %x, 3
67 %y = sdiv exact i32 %x, 3
76 %y = udiv exact i32 %x, %w
83 ; CHECK-NEXT: [[Z:%.*]] = lshr exact i32 %x, %w
87 %z = udiv exact i32 %x, %y
94 ; CHECK-NEXT: [[B:%.*]] = ashr exact i64 [[A]], 2
[all …]
/external/skia/docs/examples/
DPath_IsQuadDegenerate.cpp7 auto debugster = [](const SkPath& path, bool exact) -> void { in draw() argument
11 SkPath::IsQuadDegenerate(path.getPoint(0), path.getPoint(1), path.getPoint(2), exact) ? in draw()
12 "" : "not ", exact ? "exactly" : "nearly"); in draw()
18 for (bool exact : { false, true } ) { in draw()
19 debugster(path, exact); in draw()
20 debugster(offset, exact); in draw()
/external/llvm-project/polly/lib/External/isl/
Disl_transitive_closure.c121 isl_bool exact; in check_power_exactness() local
131 exact = isl_map_is_subset(app_1, map); in check_power_exactness()
134 if (!exact || exact < 0) { in check_power_exactness()
137 return exact; in check_power_exactness()
144 exact = isl_map_is_subset(app_2, app_1); in check_power_exactness()
149 return exact; in check_power_exactness()
177 isl_bool exact; in check_exactness() local
195 exact = isl_map_is_subset(app, test); in check_exactness()
202 return exact; in check_exactness()
869 __isl_keep isl_map *map, isl_bool *exact, int project) in construct_component() argument
[all …]
Dbound.c55 int exact; member
122 if (vpb->exact && bounded) in verify_point()
180 __isl_take isl_pw_qpolynomial_fold *bound, int exact, in check_solution() argument
211 vpb.exact = exact; in check_solution()
246 isl_bool exact; in main() local
270 pwf = isl_pw_qpolynomial_fold_bound(pwf, &exact); in main()
274 r = check_solution(copy, pwf, exact, options); in main()
276 if (!exact) in main()
/external/llvm-project/llvm/test/CodeGen/NVPTX/
Dsext-in-reg.ll11 %conv1 = ashr exact i64 %sext, 56
13 %conv4 = ashr exact i64 %sext1, 56
29 %conv1 = ashr exact i64 %sext, 32
31 %conv4 = ashr exact i64 %sext1, 32
47 %conv1 = ashr exact i64 %sext, 48
49 %conv4 = ashr exact i64 %sext1, 48
65 %conv1 = ashr exact i32 %sext, 24
67 %conv4 = ashr exact i32 %sext1, 24
83 %conv1 = ashr exact i32 %sext, 16
85 %conv4 = ashr exact i32 %sext1, 16
[all …]
/external/llvm/test/CodeGen/NVPTX/
Dsext-in-reg.ll11 %conv1 = ashr exact i64 %sext, 56
13 %conv4 = ashr exact i64 %sext1, 56
29 %conv1 = ashr exact i64 %sext, 32
31 %conv4 = ashr exact i64 %sext1, 32
47 %conv1 = ashr exact i64 %sext, 48
49 %conv4 = ashr exact i64 %sext1, 48
65 %conv1 = ashr exact i32 %sext, 24
67 %conv4 = ashr exact i32 %sext1, 24
83 %conv1 = ashr exact i32 %sext, 16
85 %conv4 = ashr exact i32 %sext1, 16
[all …]
/external/llvm-project/lld/test/ELF/lto/
Dversion-libcall.ll10 ;; An exact pattern can localize a libcall.
11 ; RUN: echo '{ global: foo; local: __udivti3; };' > %t.exact.ver
12 ; RUN: ld.lld -shared --version-script %t.exact.ver %t.bc --start-lib %t1.o --end-lib -o %t.exact.so
13 ; RUN: llvm-nm %t.exact.so | FileCheck %s
24 ; RUN: echo '{ foo; __udivti3; };' > %t.exact.list
25 ; RUN: ld.lld -pie --dynamic-list %t.exact.list %t.bc --start-lib %t1.o --end-lib -o %t.exact
26 ; RUN: llvm-nm %t.exact | FileCheck --check-prefix=LIST %s
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dmul64-sext.ll10 %v4 = ashr exact i64 %v3, 32
12 %v6 = ashr exact i64 %v5, 32
26 %v6 = ashr exact i64 %v5, 32
38 %v4 = ashr exact i64 %v3, 32
40 %v6 = ashr exact i64 %v5, 48
66 %v5 = ashr exact i64 %v4, 32
68 %v7 = ashr exact i64 %v6, 32
82 %v5 = ashr exact i64 %v4, 32
97 %v5 = ashr exact i64 %v4, 32
99 %v7 = ashr exact i64 %v6, 32
[all …]
Dmul64.ll40 %v3 = ashr exact i32 %v2, 16
70 %v4 = ashr exact i32 %v3, 16
86 %v4 = ashr exact i32 %v3, 16
101 %v3 = ashr exact i32 %v2, 16
178 %v1 = ashr exact i64 %v0, 32
180 %v3 = ashr exact i64 %v2, 48
192 %v1 = ashr exact i64 %v0, 32
207 %v1 = ashr exact i64 %v0, 32
211 %v5 = ashr exact i32 %v4, 16
225 %v2 = ashr exact i64 %v1, 48
[all …]
/external/llvm/test/Transforms/InstSimplify/
Dshr-nop.ll20 %shr = lshr exact i8 0, %a
29 %shr = ashr exact i8 0, %a
47 %shr = lshr exact i8 0, %a
56 %shr = ashr exact i8 0, %a
83 %shr = lshr exact i8 128, %a
92 %shr = ashr exact i8 -128, %a
110 %shr = lshr exact i8 128, %a
119 %shr = ashr exact i8 -128, %a
218 %shr = ashr exact i8 -1, %a
227 %shr = ashr exact i8 -1, %a
[all …]
/external/llvm-project/llvm/test/Transforms/InstSimplify/
Dshr-nop.ll20 %shr = lshr exact i8 0, %a
29 %shr = ashr exact i8 0, %a
47 %shr = lshr exact i8 0, %a
56 %shr = ashr exact i8 0, %a
83 %shr = lshr exact i8 128, %a
92 %shr = ashr exact i8 -128, %a
110 %shr = lshr exact i8 128, %a
119 %shr = ashr exact i8 -128, %a
218 %shr = ashr exact i8 -1, %a
227 %shr = ashr exact i8 -1, %a
[all …]
/external/llvm-project/llvm/test/Analysis/ScalarEvolution/
Dashr.ll18 ; Not even if we know it's exact
22 ; CHECK-NEXT: %i0 = ashr exact i32 %x, %y
26 %i0 = ashr exact i32 %x, %y
40 ; However, if it's a constant AND the shift is exact, we can model it!
44 ; CHECK-NEXT: %i0 = ashr exact i32 %x, 4
48 %i0 = ashr exact i32 %x, 4
55 ; CHECK-NEXT: %i0 = ashr exact i32 %x, 32
59 %i0 = ashr exact i32 %x, 32
67 ; CHECK-NEXT: %i0 = ashr exact i32 %x, 5
71 %i0 = ashr exact i32 %x, 5
/external/llvm-project/llvm/test/Transforms/IndVarSimplify/
Dstrengthen-overflow.ll107 define hidden void @test.shl.exact.equal() {
108 ; CHECK-LABEL: @test.shl.exact.equal
117 ; CHECK: %shr1 = ashr exact i32 %shl, 1
119 ; CHECK: %shr2 = lshr exact i32 %shl, 1
128 define hidden void @test.shl.exact.greater() {
129 ; CHECK-LABEL: @test.shl.exact.greater
138 ; CHECK: %shr1 = ashr exact i32 %shl, 2
140 ; CHECK: %shr2 = lshr exact i32 %shl, 2
149 define hidden void @test.shl.exact.unbound(i32 %arg) {
150 ; CHECK-LABEL: @test.shl.exact.unbound
[all …]
/external/bcc/src/cc/frontends/p4/test/testprograms/
Dbasic_routing.p4126 standard_metadata.ingress_port : exact;
140 ingress_metadata.bd : exact;
155 ingress_metadata.vrf : exact;
156 ipv4.dstAddr : exact;
167 ingress_metadata.vrf : exact;
168 ipv4.dstAddr : exact; // lpm not supported
183 ingress_metadata.nexthop_index : exact;
219 ingress_metadata.nexthop_index : exact;
/external/llvm-project/llvm/test/CodeGen/X86/
Dsar_fold.ll8 %2 = ashr exact i32 %1, 15
17 %2 = ashr exact i32 %1, 17
26 %2 = ashr exact i32 %1, 23
35 %2 = ashr exact i32 %1, 25
/external/llvm/test/CodeGen/X86/
Dsar_fold.ll8 %2 = ashr exact i32 %1, 15
17 %2 = ashr exact i32 %1, 17
26 %2 = ashr exact i32 %1, 23
35 %2 = ashr exact i32 %1, 25
Dshift-combine.ll25 %shr = ashr exact i32 %sub, 3
35 %shr = ashr exact i32 %sub, 3
45 %shr = ashr exact i32 %sub, 2
55 %shr = lshr exact i32 %sub, 3
65 %shr = lshr exact i32 %sub, 3
75 %shr = lshr exact i32 %sub, 2

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