1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instsimplify -S | FileCheck %s 3 4define i32 @foo(i32 %x) { 5; CHECK-LABEL: @foo( 6; CHECK-NEXT: [[O:%.*]] = and i32 %x, 1 7; CHECK-NEXT: [[N:%.*]] = add i32 [[O]], -1 8; CHECK-NEXT: ret i32 [[N]] 9; 10 %o = and i32 %x, 1 11 %n = add i32 %o, -1 12 %t = ashr i32 %n, 17 13 ret i32 %t 14} 15 16define i1 @exact_lshr_eq_both_zero(i8 %a) { 17; CHECK-LABEL: @exact_lshr_eq_both_zero( 18; CHECK-NEXT: ret i1 true 19; 20 %shr = lshr exact i8 0, %a 21 %cmp = icmp eq i8 %shr, 0 22 ret i1 %cmp 23} 24 25define i1 @exact_ashr_eq_both_zero(i8 %a) { 26; CHECK-LABEL: @exact_ashr_eq_both_zero( 27; CHECK-NEXT: ret i1 true 28; 29 %shr = ashr exact i8 0, %a 30 %cmp = icmp eq i8 %shr, 0 31 ret i1 %cmp 32} 33 34define i1 @nonexact_ashr_eq_both_zero(i8 %a) { 35; CHECK-LABEL: @nonexact_ashr_eq_both_zero( 36; CHECK-NEXT: ret i1 true 37; 38 %shr = ashr i8 0, %a 39 %cmp = icmp eq i8 %shr, 0 40 ret i1 %cmp 41} 42 43define i1 @exact_lshr_ne_both_zero(i8 %a) { 44; CHECK-LABEL: @exact_lshr_ne_both_zero( 45; CHECK-NEXT: ret i1 false 46; 47 %shr = lshr exact i8 0, %a 48 %cmp = icmp ne i8 %shr, 0 49 ret i1 %cmp 50} 51 52define i1 @exact_ashr_ne_both_zero(i8 %a) { 53; CHECK-LABEL: @exact_ashr_ne_both_zero( 54; CHECK-NEXT: ret i1 false 55; 56 %shr = ashr exact i8 0, %a 57 %cmp = icmp ne i8 %shr, 0 58 ret i1 %cmp 59} 60 61define i1 @nonexact_lshr_ne_both_zero(i8 %a) { 62; CHECK-LABEL: @nonexact_lshr_ne_both_zero( 63; CHECK-NEXT: ret i1 false 64; 65 %shr = lshr i8 0, %a 66 %cmp = icmp ne i8 %shr, 0 67 ret i1 %cmp 68} 69 70define i1 @nonexact_ashr_ne_both_zero(i8 %a) { 71; CHECK-LABEL: @nonexact_ashr_ne_both_zero( 72; CHECK-NEXT: ret i1 false 73; 74 %shr = ashr i8 0, %a 75 %cmp = icmp ne i8 %shr, 0 76 ret i1 %cmp 77} 78 79define i1 @exact_lshr_eq_last_zero(i8 %a) { 80; CHECK-LABEL: @exact_lshr_eq_last_zero( 81; CHECK-NEXT: ret i1 false 82; 83 %shr = lshr exact i8 128, %a 84 %cmp = icmp eq i8 %shr, 0 85 ret i1 %cmp 86} 87 88define i1 @exact_ashr_eq_last_zero(i8 %a) { 89; CHECK-LABEL: @exact_ashr_eq_last_zero( 90; CHECK-NEXT: ret i1 false 91; 92 %shr = ashr exact i8 -128, %a 93 %cmp = icmp eq i8 %shr, 0 94 ret i1 %cmp 95} 96 97define i1 @nonexact_lshr_eq_both_zero(i8 %a) { 98; CHECK-LABEL: @nonexact_lshr_eq_both_zero( 99; CHECK-NEXT: ret i1 true 100; 101 %shr = lshr i8 0, %a 102 %cmp = icmp eq i8 %shr, 0 103 ret i1 %cmp 104} 105 106define i1 @exact_lshr_ne_last_zero(i8 %a) { 107; CHECK-LABEL: @exact_lshr_ne_last_zero( 108; CHECK-NEXT: ret i1 true 109; 110 %shr = lshr exact i8 128, %a 111 %cmp = icmp ne i8 %shr, 0 112 ret i1 %cmp 113} 114 115define i1 @exact_ashr_ne_last_zero(i8 %a) { 116; CHECK-LABEL: @exact_ashr_ne_last_zero( 117; CHECK-NEXT: ret i1 true 118; 119 %shr = ashr exact i8 -128, %a 120 %cmp = icmp ne i8 %shr, 0 121 ret i1 %cmp 122} 123 124define i1 @nonexact_lshr_eq_last_zero(i8 %a) { 125; CHECK-LABEL: @nonexact_lshr_eq_last_zero( 126; CHECK-NEXT: ret i1 false 127; 128 %shr = lshr i8 128, %a 129 %cmp = icmp eq i8 %shr, 0 130 ret i1 %cmp 131} 132 133define i1 @nonexact_ashr_eq_last_zero(i8 %a) { 134; CHECK-LABEL: @nonexact_ashr_eq_last_zero( 135; CHECK-NEXT: ret i1 false 136; 137 %shr = ashr i8 -128, %a 138 %cmp = icmp eq i8 %shr, 0 139 ret i1 %cmp 140} 141 142define i1 @nonexact_lshr_ne_last_zero(i8 %a) { 143; CHECK-LABEL: @nonexact_lshr_ne_last_zero( 144; CHECK-NEXT: ret i1 true 145; 146 %shr = lshr i8 128, %a 147 %cmp = icmp ne i8 %shr, 0 148 ret i1 %cmp 149} 150 151define i1 @nonexact_ashr_ne_last_zero(i8 %a) { 152; CHECK-LABEL: @nonexact_ashr_ne_last_zero( 153; CHECK-NEXT: ret i1 true 154; 155 %shr = ashr i8 -128, %a 156 %cmp = icmp ne i8 %shr, 0 157 ret i1 %cmp 158} 159 160define i1 @lshr_eq_first_zero(i8 %a) { 161; CHECK-LABEL: @lshr_eq_first_zero( 162; CHECK-NEXT: ret i1 false 163; 164 %shr = lshr i8 0, %a 165 %cmp = icmp eq i8 %shr, 2 166 ret i1 %cmp 167} 168 169define i1 @ashr_eq_first_zero(i8 %a) { 170; CHECK-LABEL: @ashr_eq_first_zero( 171; CHECK-NEXT: ret i1 false 172; 173 %shr = ashr i8 0, %a 174 %cmp = icmp eq i8 %shr, 2 175 ret i1 %cmp 176} 177 178define i1 @lshr_ne_first_zero(i8 %a) { 179; CHECK-LABEL: @lshr_ne_first_zero( 180; CHECK-NEXT: ret i1 true 181; 182 %shr = lshr i8 0, %a 183 %cmp = icmp ne i8 %shr, 2 184 ret i1 %cmp 185} 186 187define i1 @ashr_ne_first_zero(i8 %a) { 188; CHECK-LABEL: @ashr_ne_first_zero( 189; CHECK-NEXT: ret i1 true 190; 191 %shr = ashr i8 0, %a 192 %cmp = icmp ne i8 %shr, 2 193 ret i1 %cmp 194} 195 196define i1 @ashr_eq_both_minus1(i8 %a) { 197; CHECK-LABEL: @ashr_eq_both_minus1( 198; CHECK-NEXT: ret i1 true 199; 200 %shr = ashr i8 -1, %a 201 %cmp = icmp eq i8 %shr, -1 202 ret i1 %cmp 203} 204 205define i1 @ashr_ne_both_minus1(i8 %a) { 206; CHECK-LABEL: @ashr_ne_both_minus1( 207; CHECK-NEXT: ret i1 false 208; 209 %shr = ashr i8 -1, %a 210 %cmp = icmp ne i8 %shr, -1 211 ret i1 %cmp 212} 213 214define i1 @exact_ashr_eq_both_minus1(i8 %a) { 215; CHECK-LABEL: @exact_ashr_eq_both_minus1( 216; CHECK-NEXT: ret i1 true 217; 218 %shr = ashr exact i8 -1, %a 219 %cmp = icmp eq i8 %shr, -1 220 ret i1 %cmp 221} 222 223define i1 @exact_ashr_ne_both_minus1(i8 %a) { 224; CHECK-LABEL: @exact_ashr_ne_both_minus1( 225; CHECK-NEXT: ret i1 false 226; 227 %shr = ashr exact i8 -1, %a 228 %cmp = icmp ne i8 %shr, -1 229 ret i1 %cmp 230} 231 232define i1 @exact_ashr_eq_opposite_msb(i8 %a) { 233; CHECK-LABEL: @exact_ashr_eq_opposite_msb( 234; CHECK-NEXT: ret i1 false 235; 236 %shr = ashr exact i8 -128, %a 237 %cmp = icmp eq i8 %shr, 1 238 ret i1 %cmp 239} 240 241define i1 @exact_ashr_eq_noexactlog(i8 %a) { 242; CHECK-LABEL: @exact_ashr_eq_noexactlog( 243; CHECK-NEXT: ret i1 false 244; 245 %shr = ashr exact i8 -90, %a 246 %cmp = icmp eq i8 %shr, -30 247 ret i1 %cmp 248} 249 250define i1 @exact_ashr_ne_opposite_msb(i8 %a) { 251; CHECK-LABEL: @exact_ashr_ne_opposite_msb( 252; CHECK-NEXT: ret i1 true 253; 254 %shr = ashr exact i8 -128, %a 255 %cmp = icmp ne i8 %shr, 1 256 ret i1 %cmp 257} 258 259define i1 @ashr_eq_opposite_msb(i8 %a) { 260; CHECK-LABEL: @ashr_eq_opposite_msb( 261; CHECK-NEXT: ret i1 false 262; 263 %shr = ashr i8 -128, %a 264 %cmp = icmp eq i8 %shr, 1 265 ret i1 %cmp 266} 267 268define i1 @ashr_ne_opposite_msb(i8 %a) { 269; CHECK-LABEL: @ashr_ne_opposite_msb( 270; CHECK-NEXT: ret i1 true 271; 272 %shr = ashr i8 -128, %a 273 %cmp = icmp ne i8 %shr, 1 274 ret i1 %cmp 275} 276 277define i1 @exact_ashr_eq_shift_gt(i8 %a) { 278; CHECK-LABEL: @exact_ashr_eq_shift_gt( 279; CHECK-NEXT: ret i1 false 280; 281 %shr = ashr exact i8 -2, %a 282 %cmp = icmp eq i8 %shr, -8 283 ret i1 %cmp 284} 285 286define i1 @exact_ashr_ne_shift_gt(i8 %a) { 287; CHECK-LABEL: @exact_ashr_ne_shift_gt( 288; CHECK-NEXT: ret i1 true 289; 290 %shr = ashr exact i8 -2, %a 291 %cmp = icmp ne i8 %shr, -8 292 ret i1 %cmp 293} 294 295define i1 @nonexact_ashr_eq_shift_gt(i8 %a) { 296; CHECK-LABEL: @nonexact_ashr_eq_shift_gt( 297; CHECK-NEXT: ret i1 false 298; 299 %shr = ashr i8 -2, %a 300 %cmp = icmp eq i8 %shr, -8 301 ret i1 %cmp 302} 303 304define i1 @nonexact_ashr_ne_shift_gt(i8 %a) { 305; CHECK-LABEL: @nonexact_ashr_ne_shift_gt( 306; CHECK-NEXT: ret i1 true 307; 308 %shr = ashr i8 -2, %a 309 %cmp = icmp ne i8 %shr, -8 310 ret i1 %cmp 311} 312 313define i1 @exact_lshr_eq_shift_gt(i8 %a) { 314; CHECK-LABEL: @exact_lshr_eq_shift_gt( 315; CHECK-NEXT: ret i1 false 316; 317 %shr = lshr exact i8 2, %a 318 %cmp = icmp eq i8 %shr, 8 319 ret i1 %cmp 320} 321 322define i1 @exact_lshr_ne_shift_gt(i8 %a) { 323; CHECK-LABEL: @exact_lshr_ne_shift_gt( 324; CHECK-NEXT: ret i1 true 325; 326 %shr = lshr exact i8 2, %a 327 %cmp = icmp ne i8 %shr, 8 328 ret i1 %cmp 329} 330 331define i1 @nonexact_lshr_eq_shift_gt(i8 %a) { 332; CHECK-LABEL: @nonexact_lshr_eq_shift_gt( 333; CHECK-NEXT: ret i1 false 334; 335 %shr = lshr i8 2, %a 336 %cmp = icmp eq i8 %shr, 8 337 ret i1 %cmp 338} 339 340define i1 @nonexact_lshr_ne_shift_gt(i8 %a) { 341; CHECK-LABEL: @nonexact_lshr_ne_shift_gt( 342; CHECK-NEXT: ret i1 true 343; 344 %shr = ashr i8 2, %a 345 %cmp = icmp ne i8 %shr, 8 346 ret i1 %cmp 347} 348 349define i1 @exact_ashr_ne_noexactlog(i8 %a) { 350; CHECK-LABEL: @exact_ashr_ne_noexactlog( 351; CHECK-NEXT: ret i1 true 352; 353 %shr = ashr exact i8 -90, %a 354 %cmp = icmp ne i8 %shr, -30 355 ret i1 %cmp 356} 357 358define i1 @exact_lshr_eq_noexactlog(i8 %a) { 359; CHECK-LABEL: @exact_lshr_eq_noexactlog( 360; CHECK-NEXT: ret i1 false 361; 362 %shr = lshr exact i8 90, %a 363 %cmp = icmp eq i8 %shr, 30 364 ret i1 %cmp 365} 366 367define i1 @exact_lshr_ne_noexactlog(i8 %a) { 368; CHECK-LABEL: @exact_lshr_ne_noexactlog( 369; CHECK-NEXT: ret i1 true 370; 371 %shr = lshr exact i8 90, %a 372 %cmp = icmp ne i8 %shr, 30 373 ret i1 %cmp 374} 375 376define i32 @exact_lshr_lowbit(i32 %shiftval) { 377; CHECK-LABEL: @exact_lshr_lowbit( 378; CHECK-NEXT: ret i32 7 379; 380 %shr = lshr exact i32 7, %shiftval 381 ret i32 %shr 382} 383 384define i32 @exact_ashr_lowbit(i32 %shiftval) { 385; CHECK-LABEL: @exact_ashr_lowbit( 386; CHECK-NEXT: ret i32 7 387; 388 %shr = ashr exact i32 7, %shiftval 389 ret i32 %shr 390} 391 392define i32 @ashr_zero(i32 %shiftval) { 393; CHECK-LABEL: @ashr_zero( 394; CHECK-NEXT: ret i32 0 395; 396 %shr = ashr i32 0, %shiftval 397 ret i32 %shr 398} 399 400define i257 @ashr_minus1(i257 %shiftval) { 401; CHECK-LABEL: @ashr_minus1( 402; CHECK-NEXT: ret i257 -1 403; 404 %shr = ashr i257 -1, %shiftval 405 ret i257 %shr 406} 407 408define <2 x i4097> @ashr_zero_vec(<2 x i4097> %shiftval) { 409; CHECK-LABEL: @ashr_zero_vec( 410; CHECK-NEXT: ret <2 x i4097> zeroinitializer 411; 412 %shr = ashr <2 x i4097> zeroinitializer, %shiftval 413 ret <2 x i4097> %shr 414} 415 416define <2 x i64> @ashr_minus1_vec(<2 x i64> %shiftval) { 417; CHECK-LABEL: @ashr_minus1_vec( 418; CHECK-NEXT: ret <2 x i64> <i64 -1, i64 -1> 419; 420 %shr = ashr <2 x i64> <i64 -1, i64 -1>, %shiftval 421 ret <2 x i64> %shr 422} 423 424define <2 x i4> @ashr_zero_minus1_vec(<2 x i4> %shiftval) { 425; CHECK-LABEL: @ashr_zero_minus1_vec( 426; CHECK-NEXT: ret <2 x i4> <i4 0, i4 -1> 427; 428 %shr = ashr <2 x i4> <i4 0, i4 -1>, %shiftval 429 ret <2 x i4> %shr 430} 431 432