| /external/llvm/test/CodeGen/SPARC/ |
| D | LeonFixFSMULDPassUT.ll | 5 ; CHECK: fstod %f21, %f3
16 …%mul = tail call double asm sideeffect "fsmuld $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* …
23 ; CHECK: fstod %f21, %f3
28 …%mul = tail call double asm sideeffect "fsmuld $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* …
|
| D | LeonReplaceFMULSPassUT.ll | 5 ; CHECK: fstod %f21, %f3
16 …%mul = tail call double asm sideeffect "fmuls $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* %…
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
| D | fpu_asm.h | 21 stfd f21,(stack_size + STACK_FRAME_MIN_SIZE - 80)(%r1); \
41 lfd f21,(stack_size + STACK_FRAME_MIN_SIZE - 80)(%r1); \
62 lfd f21,56(r3)
|
| /external/llvm-project/llvm/test/CodeGen/SPARC/ |
| D | inlineasm-bad.ll | 5 ; CHECK: error: couldn't allocate input reg for constraint '{f21}'
10 …tail call void asm sideeffect "faddd $0,$1,$2", "{f21},{f0},{f0}"(double 9.0, double 10.0, double …
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32/ |
| D | valid-xfail-mips32.txt | 5 0x46 0x35 0x5c 0x30 # CHECK: c.f.d $fcc4, $f11, $f21
11 0x46 0x30 0xad 0x3d # CHECK: c.nge.d $fcc5, $f21, $f16
26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30
|
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| D | valid-xfail-mips32.txt | 5 0x46 0x35 0x5c 0x30 # CHECK: c.f.d $fcc4, $f11, $f21
11 0x46 0x30 0xad 0x3d # CHECK: c.nge.d $fcc5, $f21, $f16
26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30
|
| /external/google-breakpad/src/common/android/include/asm-mips/ |
| D | fpregdef.h | 56 #define fs0f $f21
97 #define ft9 $f21
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | vsx-spill.ll | 10 …0},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f2…
31 …0},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f2…
51 …0},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f2…
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64/ |
| D | valid-mips64-xfail.txt | 5 0x46 0x35 0x5c 0x30 # CHECK: c.f.d $fcc4, $f11, $f21
11 0x46 0x30 0xad 0x3d # CHECK: c.nge.d $fcc5, $f21, $f16
26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30
39 0x46 0xde 0xa8 0x3b # CHECK: c.ngl.ps $f21, $f30
42 0x46 0xc8 0xaf 0x36 # CHECK: c.ole.ps $fcc7, $f21, $f8
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| D | valid-mips64-xfail.txt | 5 0x46 0x35 0x5c 0x30 # CHECK: c.f.d $fcc4, $f11, $f21
11 0x46 0x30 0xad 0x3d # CHECK: c.nge.d $fcc5, $f21, $f16
26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30
39 0x46 0xde 0xa8 0x3b # CHECK: c.ngl.ps $f21, $f30
42 0x46 0xc8 0xaf 0x36 # CHECK: c.ole.ps $fcc7, $f21, $f8
|
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | aix-csr.ll | 100 call void asm sideeffect "", "~{r13},~{r14},~{r25},~{r31},~{f14},~{f19},~{f21},~{f31}"()
111 ; MIR64-NEXT: callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variabl…
136 ; MIR32-NEXT: callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variabl…
159 ; MIR64: liveins: $x3, $x14, $x25, $x31, $f14, $f19, $f21, $f31
169 ; MIR64-DAG: STFD killed $f21, 312, $x1 :: (store 8 into %fixed-stack.1)
176 ; MIR64-DAG: $f21 = LFD 312, $x1 :: (load 8 from %fixed-stack.1)
188 ; MIR32: liveins: $r3, $r13, $r14, $r25, $r31, $f14, $f19, $f21, $f31
199 ; MIR32-DAG: STFD killed $f21, 200, $r1 :: (store 8 into %fixed-stack.1)
206 ; MIR32-DAG: $f21 = LFD 200, $r1 :: (load 8 from %fixed-stack.1)
|
| D | aix-csr-vector.ll | 114 call void asm sideeffect "", "~{r14},~{r25},~{r31},~{f14},~{f21},~{f31},~{v20},~{v26},~{v31}"()
134 ; MIR32-NEXT: callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variabl…
150 ; MIR32: liveins: $r14, $r25, $r31, $f14, $f21, $f31, $v20, $v26, $v31
156 ; MIR32-DAG: STFD killed $f21, 360, $r1 :: (store 8 into %fixed-stack.4)
172 ; MIR32-DAG: $f21 = LFD 360, $r1 :: (load 8 from %fixed-stack.4)
199 ; MIR64-NEXT: callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variabl…
215 ; MIR64: liveins: $x14, $x25, $x31, $f14, $f21, $f31, $v20, $v26, $v31
222 ; MIR64-DAG: STFD killed $f21, 456, $x1 :: (store 8 into %fixed-stack.4)
237 ; MIR64-DAG: $f21 = LFD 456, $x1 :: (load 8 from %fixed-stack.4)
|
| D | vsx-spill.ll | 21 …0},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f2…
54 …0},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f2…
85 …0},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f2…
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| D | valid-xfail-mips4.txt | 5 0x46 0x35 0x5c 0x30 # CHECK: c.f.d $fcc4, $f11, $f21
11 0x46 0x30 0xad 0x3d # CHECK: c.nge.d $fcc5, $f21, $f16
26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30
|
| /external/llvm/test/CodeGen/Mips/ |
| D | no-odd-spreg-msa.ll | 26 …~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
60 …~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
90 …~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
118 …~{$f11},~{$f12},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
|
| D | no-odd-spreg.ll | 24 …~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
48 …~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
|
| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | no-odd-spreg-msa.ll | 26 …~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
60 …~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
90 …~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
118 …~{$f11},~{$f12},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{…
|
| /external/llvm/test/MC/ARM/ |
| D | symbol-variants.s | 71 .word f21(tlsldo)
73 @CHECK: 54 R_ARM_TLS_LDO32 f21
|
| /external/testng/src/test/java/test/thread/ |
| D | Test2Test.java | 8 public void f21() { in f21() method in Test2Test
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | symbol-variants.s | 71 .word f21(tlsldo)
73 @CHECK: 54 R_ARM_TLS_LDO32 f21
|
| /external/llvm-project/llvm/test/MC/Mips/mips2/ |
| D | invalid-mips5-wrong-error.s | 16 c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
19 c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm-project/llvm/test/MC/Mips/mips3/ |
| D | invalid-mips5-wrong-error.s | 16 c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
19 c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm-project/llvm/test/MC/Mips/mips4/ |
| D | invalid-mips5-wrong-error.s | 16 c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
19 c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/libffi/src/alpha/ |
| D | osf.S | 82 ldt $f21, 40($30)
195 stt $f21, 9*8($30)
|
| /external/llvm-project/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips5-wrong-error.s | 19 … c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
22 … c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|