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Searched refs:flush_bits (Results 1 – 17 of 17) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dsi_cmd_buffer.c904 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VGT_FLUSH; in si_get_ia_multi_vgt_param()
1044 enum radv_cmd_flush_bits flush_bits, in gfx10_cs_emit_cache_flush() argument
1052 assert(!(flush_bits & (RADV_CMD_FLAG_VGT_STREAMOUT_SYNC))); in gfx10_cs_emit_cache_flush()
1054 if (flush_bits & RADV_CMD_FLAG_INV_ICACHE) { in gfx10_cs_emit_cache_flush()
1059 if (flush_bits & RADV_CMD_FLAG_INV_SCACHE) { in gfx10_cs_emit_cache_flush()
1067 if (flush_bits & RADV_CMD_FLAG_INV_VCACHE) { in gfx10_cs_emit_cache_flush()
1072 if (flush_bits & RADV_CMD_FLAG_INV_L2) { in gfx10_cs_emit_cache_flush()
1078 } else if (flush_bits & RADV_CMD_FLAG_WB_L2) { in gfx10_cs_emit_cache_flush()
1093 if (flush_bits & (RADV_CMD_FLAG_FLUSH_AND_INV_CB | RADV_CMD_FLAG_FLUSH_AND_INV_DB)) { in gfx10_cs_emit_cache_flush()
1095 if (flush_bits & RADV_CMD_FLAG_FLUSH_AND_INV_CB) { in gfx10_cs_emit_cache_flush()
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Dradv_meta_clear.c1130 uint32_t clear_word, flush_bits; in radv_fast_clear_depth() local
1135 cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_DB | in radv_fast_clear_depth()
1137 *pre_flush |= cmd_buffer->state.flush_bits; in radv_fast_clear_depth()
1148 flush_bits = radv_clear_htile(cmd_buffer, iview->image, &range, clear_word); in radv_fast_clear_depth()
1157 cmd_buffer->state.flush_bits |= flush_bits; in radv_fast_clear_depth()
1162 *post_flush |= flush_bits; in radv_fast_clear_depth()
1526 uint32_t flush_bits = 0; in radv_clear_dcc() local
1555 flush_bits |= radv_fill_buffer(cmd_buffer, image->bo, offset, in radv_clear_dcc()
1559 return flush_bits; in radv_clear_dcc()
1572 uint32_t htile_mask, flush_bits; in radv_clear_htile() local
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Dradv_cmd_buffer.c2274 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | in radv_emit_fb_mip_change_flush()
2299 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | in radv_emit_mip_change_flush_default()
3162 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH; in radv_stage_flush()
3173 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH; in radv_stage_flush()
3181 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH; in radv_stage_flush()
3191 enum radv_cmd_flush_bits flush_bits = 0; in radv_src_access_flush() local
3206 flush_bits |= RADV_CMD_FLAG_WB_L2; in radv_src_access_flush()
3209 flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; in radv_src_access_flush()
3211 flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; in radv_src_access_flush()
3214 flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB; in radv_src_access_flush()
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Dradv_query.c1111 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_L2 | in radv_query_shader()
1115 cmd_buffer->state.flush_bits |= RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER; in radv_query_shader()
1560 uint32_t flush_bits = 0; in radv_CmdResetQueryPool() local
1566 cmd_buffer->state.flush_bits |= cmd_buffer->active_query_flush_bits; in radv_CmdResetQueryPool()
1568 flush_bits |= radv_fill_buffer(cmd_buffer, pool->bo, in radv_CmdResetQueryPool()
1573 flush_bits |= radv_fill_buffer(cmd_buffer, pool->bo, in radv_CmdResetQueryPool()
1578 if (flush_bits) { in radv_CmdResetQueryPool()
1581 cmd_buffer->state.flush_bits |= flush_bits; in radv_CmdResetQueryPool()
1663 cmd_buffer->state.flush_bits &= ~RADV_CMD_FLAG_STOP_PIPELINE_STATS; in emit_begin_query()
1664 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_START_PIPELINE_STATS; in emit_begin_query()
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Dradv_meta_fast_clear.c642 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | in radv_process_color_image_layer()
648 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | in radv_process_color_image_layer()
737 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | in radv_process_color_image()
834 state->flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | in radv_decompress_dcc_compute()
942 state->flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | in radv_decompress_dcc_compute()
Dradv_meta_buffer.c391 uint32_t flush_bits = 0; in radv_fill_buffer() local
398 flush_bits = RADV_CMD_FLAG_CS_PARTIAL_FLUSH | in radv_fill_buffer()
408 return flush_bits; in radv_fill_buffer()
Dradv_meta_resolve.c324 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; in emit_resolve()
344 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; in emit_resolve()
810 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB; in radv_cmd_buffer_resolve_subpass()
812 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; in radv_cmd_buffer_resolve_subpass()
Dradv_meta_fmask_expand.c175 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | in radv_expand_fmask_image_inplace()
Dradv_meta_resolve_cs.c952 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | in radv_cmd_buffer_resolve_subpass_cs()
1037 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | in radv_depth_stencil_resolve_subpass_cs()
1060 cmd_buffer->state.flush_bits |= in radv_depth_stencil_resolve_subpass_cs()
Dradv_meta_resolve_fs.c886 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; in emit_resolve()
917 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; in emit_resolve()
Dradv_private.h1358 enum radv_cmd_flush_bits flush_bits; member
1511 enum radv_cmd_flush_bits flush_bits,
/external/mesa3d/src/gallium/drivers/iris/
Diris_pipe_control.c190 const uint32_t flush_bits[NUM_IRIS_DOMAINS] = { in iris_emit_buffer_barrier_for() local
223 bits |= flush_bits[i]; in iris_emit_buffer_barrier_for()
242 bits |= flush_bits[i]; in iris_emit_buffer_barrier_for()
263 bits |= flush_bits[i]; in iris_emit_buffer_barrier_for()
/external/mesa3d/src/freedreno/vulkan/
Dtu_cmd_buffer.c103 tu6_emit_flushes(cmd_buffer, cs, cmd_buffer->state.cache.flush_bits); in tu_emit_cache_flush()
104 cmd_buffer->state.cache.flush_bits = 0; in tu_emit_cache_flush()
113 tu6_emit_flushes(cmd_buffer, cs, cmd_buffer->state.renderpass_cache.flush_bits); in tu_emit_cache_flush_renderpass()
114 cmd_buffer->state.renderpass_cache.flush_bits = 0; in tu_emit_cache_flush_renderpass()
127 enum tu_cmd_flush_bits flushes = cmd_buffer->state.cache.flush_bits; in tu_emit_cache_flush_ccu()
156 cmd_buffer->state.cache.flush_bits = 0; in tu_emit_cache_flush_ccu()
1483 cache->flush_bits = 0; in tu_cache_init()
2005 cache->flush_bits |= cache->pending_flush_bits & TU_CMD_FLAG_ALL_FLUSH; in tu_flush_all_pending()
2031 cmd_buffer->state.cache.flush_bits |= in tu_EndCommandBuffer()
2454 enum tu_cmd_flush_bits flush_bits = 0; in tu_flush_for_access() local
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Dtu_private.h828 enum tu_cmd_flush_bits flush_bits; member
/external/libjpeg-turbo/
Djchuff.c496 flush_bits(working_state *state) in flush_bits() function
664 if (!flush_bits(state)) in emit_restart()
770 if (!flush_bits(&state)) in finish_pass_huff()
Djcphuff.c374 flush_bits(phuff_entropy_ptr entropy) in flush_bits() function
458 flush_bits(entropy); in emit_restart()
1034 flush_bits(entropy); in finish_pass_phuff()
/external/dng_sdk/source/
Ddng_lossless_jpeg.cpp469 void flush_bits (int32 nbits);
1561 inline void dng_lossless_decoder::flush_bits (int32 nbits) in flush_bits() function in dng_lossless_decoder
1628 flush_bits (htbl->numbits [code]); in HuffDecode()
1637 flush_bits (8); in HuffDecode()