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Searched refs:getSpillSize (Results 1 – 25 of 74) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreMachineFunctionInfo.cpp43 LRSpillSlot = MFI.CreateFixedObject(TRI.getSpillSize(RC), 0, true); in createLRSpillSlot()
45 LRSpillSlot = MFI.CreateStackObject(TRI.getSpillSize(RC), in createLRSpillSlot()
59 FPSpillSlot = MFI.CreateStackObject(TRI.getSpillSize(RC), in createFPSpillSlot()
72 unsigned Size = TRI.getSpillSize(RC); in createEHSpillSlot()
/external/llvm-project/llvm/lib/Target/XCore/
DXCoreMachineFunctionInfo.cpp43 LRSpillSlot = MFI.CreateFixedObject(TRI.getSpillSize(RC), 0, true); in createLRSpillSlot()
45 LRSpillSlot = MFI.CreateStackObject(TRI.getSpillSize(RC), in createLRSpillSlot()
60 MFI.CreateStackObject(TRI.getSpillSize(RC), TRI.getSpillAlign(RC), true); in createFPSpillSlot()
72 unsigned Size = TRI.getSpillSize(RC); in createEHSpillSlot()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMachineFunction.cpp158 EhDataRegFI[I] = MF.getFrameInfo().CreateStackObject(TRI.getSpillSize(RC), in createEhDataRegsFI()
173 TRI.getSpillSize(RC), TRI.getSpillAlignment(RC), false); in createISRRegFI()
196 TRI.getSpillSize(*RC), TRI.getSpillAlignment(*RC), false); in getMoveF64ViaSpillFI()
DMipsFrameLowering.cpp127 unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); in estimateStackSize()
DMipsSEFrameLowering.cpp897 int FI = MF.getFrameInfo().CreateStackObject(TRI->getSpillSize(RC), in determineCalleeSaves()
914 int FI = MF.getFrameInfo().CreateStackObject(TRI->getSpillSize(RC), in determineCalleeSaves()
/external/llvm-project/llvm/lib/Target/Mips/
DMipsMachineFunction.cpp158 TRI.getSpillSize(RC), TRI.getSpillAlign(RC), false); in createEhDataRegsFI()
172 TRI.getSpillSize(RC), TRI.getSpillAlign(RC), false); in createISRRegFI()
198 TRI.getSpillSize(*RC), TRI.getSpillAlign(*RC), false); in getMoveF64ViaSpillFI()
DMipsFrameLowering.cpp127 unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); in estimateStackSize()
DMipsSEFrameLowering.cpp896 int FI = MF.getFrameInfo().CreateStackObject(TRI->getSpillSize(RC), in determineCalleeSaves()
912 int FI = MF.getFrameInfo().CreateStackObject(TRI->getSpillSize(RC), in determineCalleeSaves()
/external/llvm-project/llvm/lib/Target/ARC/
DARCInstrInfo.cpp309 assert(TRI->getSpillSize(*RC) == 4 && in storeRegToStackSlot()
336 assert(TRI->getSpillSize(*RC) == 4 && in loadRegFromStackSlot()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCInstrInfo.cpp309 assert(TRI->getSpillSize(*RC) == 4 && in storeRegToStackSlot()
336 assert(TRI->getSpillSize(*RC) == 4 && in loadRegFromStackSlot()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonVExtract.cpp146 int FI = MFI.CreateStackObject(HRI.getSpillSize(VecRC), Align, in runOnMachineFunction()
DHexagonFrameLowering.cpp1551 int FI = MFI.CreateFixedSpillStackObject(TRI->getSpillSize(*RC), S->Offset); in assignCalleeSavedSpillSlots()
1563 unsigned Size = TRI->getSpillSize(*RC); in assignCalleeSavedSpillSlots()
1789 unsigned Size = HRI.getSpillSize(Hexagon::HvxVRRegClass); in expandStoreVec2()
1841 unsigned Size = HRI.getSpillSize(Hexagon::HvxVRRegClass); in expandLoadVec2()
2019 unsigned S = HRI.getSpillSize(*RC), A = HRI.getSpillAlignment(*RC); in determineCalleeSaves()
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonVExtract.cpp146 int FI = MFI.CreateStackObject(HRI.getSpillSize(VecRC), Alignment, in runOnMachineFunction()
DHexagonFrameLowering.cpp1701 int FI = MFI.CreateFixedSpillStackObject(TRI->getSpillSize(*RC), S->Offset); in assignCalleeSavedSpillSlots()
1713 unsigned Size = TRI->getSpillSize(*RC); in assignCalleeSavedSpillSlots()
1938 unsigned Size = HRI.getSpillSize(Hexagon::HvxVRRegClass); in expandStoreVec2()
1990 unsigned Size = HRI.getSpillSize(Hexagon::HvxVRRegClass); in expandLoadVec2()
2168 unsigned S = HRI.getSpillSize(*RC); in determineCalleeSaves()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DStackMaps.cpp163 Locs.emplace_back(Location::Register, TRI->getSpillSize(*RC), in parseOperand()
249 unsigned Size = TRI->getSpillSize(*TRI->getMinimalPhysRegClass(Reg)); in createLiveOutReg()
DTargetInstrInfo.cpp385 Size = TRI->getSpillSize(*RC); in getStackSlotRange()
401 assert(TRI->getSpillSize(*RC) >= (Offset + Size) && "bad subregister range"); in getStackSlotRange()
404 Offset = TRI->getSpillSize(*RC) - (Offset + Size); in getStackSlotRange()
DVirtRegMap.cpp94 unsigned Size = TRI->getSpillSize(*RC); in createSpillSlot()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSILowerSGPRSpills.cpp210 int JunkFI = MFI.CreateStackObject(TRI->getSpillSize(*RC), in spillCalleeSavedRegs()
/external/llvm-project/llvm/lib/CodeGen/
DStackMaps.cpp238 Locs.emplace_back(Location::Register, TRI->getSpillSize(*RC), in parseOperand()
324 unsigned Size = TRI->getSpillSize(*TRI->getMinimalPhysRegClass(Reg)); in createLiveOutReg()
DTargetInstrInfo.cpp395 Size = TRI->getSpillSize(*RC); in getStackSlotRange()
411 assert(TRI->getSpillSize(*RC) >= (Offset + Size) && "bad subregister range"); in getStackSlotRange()
414 Offset = TRI->getSpillSize(*RC) - (Offset + Size); in getStackSlotRange()
DVirtRegMap.cpp94 unsigned Size = TRI->getSpillSize(*RC); in createSpillSlot()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSILowerSGPRSpills.cpp214 int JunkFI = MFI.CreateStackObject(TRI->getSpillSize(*RC), in spillCalleeSavedRegs()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h277 unsigned getSpillSize(const TargetRegisterClass &RC) const { in getSpillSize() function
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVFrameLowering.cpp411 RegInfo->getSpillSize(*RC), RegInfo->getSpillAlignment(*RC), false); in processFunctionBeforeFrameFinalized()
/external/llvm-project/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h277 unsigned getSpillSize(const TargetRegisterClass &RC) const { in getSpillSize() function

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