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/external/llvm-project/polly/lib/External/isl/test_inputs/codegen/cloog/
Dequality2.st5 …i11, i12, i13, i14] -> [(i0)] }, { S1[i0, i1, i2, i3, i4, i5, i6, i7, i8, i9, i10] -> [(i1)]; S2[i…
10 - filter: "{ S2[i0, i1, i2, i3, i4, i5, i6, i7, i8, i9, i10, i11, i12, i13, i14] }"
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dshuffle-cast.ll58 declare void @use_v12i11(<12 x i11>)
62 define <4 x i11> @trunc_big_endian_extra_use(<4 x i33> %x) {
64 ; LE-NEXT: [[B:%.*]] = bitcast <4 x i33> [[X:%.*]] to <12 x i11>
65 ; LE-NEXT: call void @use_v12i11(<12 x i11> [[B]])
66 ; LE-NEXT: [[R:%.*]] = shufflevector <12 x i11> [[B]], <12 x i11> undef, <4 x i32> <i32 2, i32 5…
67 ; LE-NEXT: ret <4 x i11> [[R]]
70 ; BE-NEXT: [[B:%.*]] = bitcast <4 x i33> [[X:%.*]] to <12 x i11>
71 ; BE-NEXT: call void @use_v12i11(<12 x i11> [[B]])
72 ; BE-NEXT: [[R:%.*]] = trunc <4 x i33> [[X]] to <4 x i11>
73 ; BE-NEXT: ret <4 x i11> [[R]]
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
D2010-01-07-ISelBug.ll6 br label %if.end.i11
8 if.end.i11: ; preds = %lor.lhs.false.i10, %lor.lhs.false.i10,…
11 for.body161: ; preds = %if.end.i11
14 for.end197: ; preds = %for.body161, %if.end.i11
15 %mlucEntry.4 = phi i96 [ undef, %for.body161 ], [ undef, %if.end.i11 ] ; <i96> [#uses=2]
/external/llvm/test/CodeGen/X86/
D2010-01-07-ISelBug.ll6 br label %if.end.i11
8 if.end.i11: ; preds = %lor.lhs.false.i10, %lor.lhs.false.i10,…
11 for.body161: ; preds = %if.end.i11
14 for.end197: ; preds = %for.body161, %if.end.i11
15 %mlucEntry.4 = phi i96 [ undef, %for.body161 ], [ undef, %if.end.i11 ] ; <i96> [#uses=2]
D2007-02-16-BranchFold.ll65 %tmp8.i11.i = load i32, i32* %tmp7.i10.i ; <i32> [#uses=7]
69 icmp slt i32 %tmp8.i11.i, 1 ; <i1>:0 [#uses=1]
73 icmp slt i32 %tmp8.i11.i, 2 ; <i1>:1 [#uses=1]
77 icmp eq i32 %tmp8.i11.i, 2 ; <i1>:2 [#uses=1]
81 icmp eq i32 %tmp8.i11.i, 1 ; <i1>:3 [#uses=1]
85 icmp slt i32 %tmp8.i11.i, 0 ; <i1>:4 [#uses=1]
89 icmp eq i32 %tmp8.i11.i, 0 ; <i1>:5 [#uses=1]
93 icmp eq i32 %tmp8.i11.i, -1 ; <i1>:6 [#uses=1]
/external/llvm-project/llvm/test/CodeGen/Thumb2/
D2010-06-19-ITBlockCrash.ll12 br i1 undef, label %bb.i.i10, label %bb1.i.i11
17 bb1.i.i11: ; preds = %bb11
24 isupper144.exit12: ; preds = %bb1.i.i11, %bb.i.i10
25 %4 = phi i8 [ %.pre, %bb1.i.i11 ], [ 0, %bb.i.i10 ] ; <i8> [#uses=1]
26 %5 = phi i32 [ %3, %bb1.i.i11 ], [ undef, %bb.i.i10 ] ; <i32> [#uses=1]
Dbfx.ll7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
/external/llvm/test/CodeGen/Thumb2/
D2010-06-19-ITBlockCrash.ll12 br i1 undef, label %bb.i.i10, label %bb1.i.i11
17 bb1.i.i11: ; preds = %bb11
24 isupper144.exit12: ; preds = %bb1.i.i11, %bb.i.i10
25 %4 = phi i8 [ %.pre, %bb1.i.i11 ], [ 0, %bb.i.i10 ] ; <i8> [#uses=1]
26 %5 = phi i32 [ %3, %bb1.i.i11 ], [ undef, %bb.i.i10 ] ; <i32> [#uses=1]
Dbfx.ll7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
/external/llvm/test/Transforms/SimplifyCFG/
Dbranch-fold.ll27 %and.i11.i = and i64 %i1, 281474976710655
28 %or.cond = icmp eq i64 %and.i.i, %and.i11.i
44 %shr.i.i11 = lshr i64 %i0, 48
45 %and.i11.i12 = and i64 %shr.i.i11, 32767
46 %phitmp = icmp uge i64 %and.i14.i10, %and.i11.i12
/external/llvm-project/llvm/test/Transforms/SimplifyCFG/
Dbranch-fold.ll27 %and.i11.i = and i64 %i1, 281474976710655
28 %or.cond = icmp eq i64 %and.i.i, %and.i11.i
44 %shr.i.i11 = lshr i64 %i0, 48
45 %and.i11.i12 = and i64 %shr.i.i11, 32767
46 %phitmp = icmp uge i64 %and.i14.i10, %and.i11.i12
/external/llvm-project/polly/test/ScopInfo/
Drun-time-check-many-piecewise-aliasing.ll30 %cond.i11.i.i = select i1 %cmp.i8.i.i, i64 %add2.i.i, i64 0
31 %mul4.i.i = mul nsw i64 %cond.i11.i.i, 7
41 %cond.i11.i126.i = select i1 %cmp.i8.i122.i, i64 %add2.i121.i, i64 0
42 %mul4.i127.i = mul nsw i64 %cond.i11.i126.i, 9
53 %cond.i11.i102.i = select i1 %cmp.i8.i98.i, i64 %add2.i97.i, i64 0
54 %mul4.i103.i = mul nsw i64 %cond.i11.i102.i, 11
65 %cond.i11.i78.i = select i1 %cmp.i8.i74.i, i64 %add2.i73.i, i64 0
66 %mul4.i79.i = mul nsw i64 %cond.i11.i78.i, 13
77 %cond.i11.i54.i = select i1 %cmp.i8.i50.i, i64 %add2.i49.i, i64 0
78 %mul4.i55.i = mul nsw i64 %cond.i11.i54.i, 17
[all …]
/external/llvm/test/Transforms/InstCombine/
Dapint-zext1.ll5 define i47 @test_sext_zext(i11 %A) {
6 %c1 = zext i11 %A to i39
9 ; CHECK: %c2 = zext i11 %A to i47
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dexpand-condsets-undefvni.ll11 %v4 = trunc i64 %v3 to i11
12 switch i11 %v4, label %b15 [
13 i11 -1, label %b5
14 i11 0, label %b14
/external/llvm/test/tools/llvm-nm/X86/
Dradix.s88 .type i11,@object # @i11
89 .globl i11 symbol
91 i11: label
93 .size i11, 4
/external/llvm-project/llvm/test/tools/llvm-nm/X86/
Dradix.s88 .type i11,@object # @i11
89 .globl i11 symbol
91 i11: label
93 .size i11, 4
/external/llvm-project/openmp/runtime/test/misc_bugs/
Dmany-microtask-args.c18 int i11 = 11; in main() local
26 …#pragma omp parallel for firstprivate(i1, i2, i3, i4, i5, i6, i7, i8, i9, i10, i11, i12, i13, i14,… in main()
28 r += i + i1 + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + i10 + i11 + i12 + i13 + i14 + i15 + i16; in main()
/external/deqp-deps/glslang/Test/baseResults/
Dhlsl.struct.split.call.vert.out4 0:17 Function Definition: Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11; ( temp void)
18 0:22 Function Definition: @main(struct-VS_INPUT-i1-vf4-i11; ( temp structure{ temp int x0_out, te…
49 0:29 Function Call: Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11; ( temp void)
79 0:22 Function Call: @main(struct-VS_INPUT-i1-vf4-i11; ( temp structure{ temp int x0_out, …
113 0:17 Function Definition: Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11; ( temp void)
127 0:22 Function Definition: @main(struct-VS_INPUT-i1-vf4-i11; ( temp structure{ temp int x0_out, te…
158 0:29 Function Call: Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11; ( temp void)
188 0:22 Function Call: @main(struct-VS_INPUT-i1-vf4-i11; ( temp structure{ temp int x0_out, …
234 Name 16 "Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11;"
237 Name 20 "@main(struct-VS_INPUT-i1-vf4-i11;"
[all …]
/external/angle/third_party/vulkan-deps/glslang/src/Test/baseResults/
Dhlsl.struct.split.call.vert.out4 0:17 Function Definition: Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11; ( temp void)
18 0:22 Function Definition: @main(struct-VS_INPUT-i1-vf4-i11; ( temp structure{ temp int x0_out, te…
49 0:29 Function Call: Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11; ( temp void)
79 0:22 Function Call: @main(struct-VS_INPUT-i1-vf4-i11; ( temp structure{ temp int x0_out, …
113 0:17 Function Definition: Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11; ( temp void)
127 0:22 Function Definition: @main(struct-VS_INPUT-i1-vf4-i11; ( temp structure{ temp int x0_out, te…
158 0:29 Function Call: Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11; ( temp void)
188 0:22 Function Call: @main(struct-VS_INPUT-i1-vf4-i11; ( temp structure{ temp int x0_out, …
234 Name 16 "Fn1(struct-VS_INPUT-i1-vf4-i11;struct-VS_OUTPUT-i1-vf4-i11;"
237 Name 20 "@main(struct-VS_INPUT-i1-vf4-i11;"
[all …]
/external/llvm/test/CodeGen/ARM/
D2009-06-02-ISelCrash.ll45 br i1 undef, label %bb4.i11.i, label %bb1.outer2.i.i
47 bb4.i11.i: ; preds = %bb4.i11.i, %bb2.i9.i
48 br i1 undef, label %bb5.i12.i, label %bb4.i11.i
50 bb5.i12.i: ; preds = %bb4.i11.i
Dbfx.ll7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
/external/llvm-project/llvm/test/CodeGen/ARM/
D2009-06-02-ISelCrash.ll45 br i1 undef, label %bb4.i11.i, label %bb1.outer2.i.i
47 bb4.i11.i: ; preds = %bb4.i11.i, %bb2.i9.i
48 br i1 undef, label %bb5.i12.i, label %bb4.i11.i
50 bb5.i12.i: ; preds = %bb4.i11.i
Dbfx.ll7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
/external/XNNPACK/src/f32-dwconv/gen/
Dup2x25-scalar.c87 const float* i11 = input[11]; in xnn_f32_dwconv_ukernel_up2x25__scalar() local
88 assert(i11 != NULL); in xnn_f32_dwconv_ukernel_up2x25__scalar()
89 if XNN_UNPREDICTABLE(i11 != zero) { in xnn_f32_dwconv_ukernel_up2x25__scalar()
90 i11 = (const float*) ((uintptr_t) i11 + input_offset); in xnn_f32_dwconv_ukernel_up2x25__scalar()
265 const float vi11x0 = i11[0]; in xnn_f32_dwconv_ukernel_up2x25__scalar()
266 const float vi11x1 = i11[1]; in xnn_f32_dwconv_ukernel_up2x25__scalar()
267 i11 += 2; in xnn_f32_dwconv_ukernel_up2x25__scalar()
434 const float vi11 = *i11++; in xnn_f32_dwconv_ukernel_up2x25__scalar()
Dup2x25-wasm-acc2.c87 const float* i11 = input[11]; in xnn_f32_dwconv_ukernel_up2x25__wasm_acc2() local
88 assert(i11 != NULL); in xnn_f32_dwconv_ukernel_up2x25__wasm_acc2()
89 if XNN_UNPREDICTABLE(i11 != zero) { in xnn_f32_dwconv_ukernel_up2x25__wasm_acc2()
90 i11 = (const float*) ((uintptr_t) i11 + input_offset); in xnn_f32_dwconv_ukernel_up2x25__wasm_acc2()
265 const float vi11x0 = i11[0]; in xnn_f32_dwconv_ukernel_up2x25__wasm_acc2()
266 const float vi11x1 = i11[1]; in xnn_f32_dwconv_ukernel_up2x25__wasm_acc2()
267 i11 += 2; in xnn_f32_dwconv_ukernel_up2x25__wasm_acc2()
437 const float vi11 = *i11++; in xnn_f32_dwconv_ukernel_up2x25__wasm_acc2()

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