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/external/llvm-project/llvm/test/Transforms/InstCombine/
Dapint-mul1.ll7 define i17 @test1(i17 %X) {
9 ; CHECK-NEXT: [[Y:%.*]] = shl i17 [[X:%.*]], 10
10 ; CHECK-NEXT: ret i17 [[Y]]
12 %Y = mul i17 %X, 1024
13 ret i17 %Y
16 define <2 x i17> @test2(<2 x i17> %X) {
18 ; CHECK-NEXT: [[Y:%.*]] = shl <2 x i17> [[X:%.*]], <i17 10, i17 10>
19 ; CHECK-NEXT: ret <2 x i17> [[Y]]
21 %Y = mul <2 x i17> %X, <i17 1024, i17 1024>
22 ret <2 x i17> %Y
[all …]
Dfunnel.ll70 define <2 x i17> @fshr_v2i17_constant_splat(<2 x i17> %x, <2 x i17> %y) {
72 …CK-NEXT: [[R:%.*]] = call <2 x i17> @llvm.fshl.v2i17(<2 x i17> [[Y:%.*]], <2 x i17> [[X:%.*]], …
73 ; CHECK-NEXT: ret <2 x i17> [[R]]
75 %shr = lshr <2 x i17> %x, <i17 12, i17 12>
76 %shl = shl <2 x i17> %y, <i17 5, i17 5>
77 %r = or <2 x i17> %shr, %shl
78 ret <2 x i17> %r
81 define <2 x i17> @fshr_v2i17_constant_splat_undef0(<2 x i17> %x, <2 x i17> %y) {
83 …CK-NEXT: [[R:%.*]] = call <2 x i17> @llvm.fshl.v2i17(<2 x i17> [[Y:%.*]], <2 x i17> [[X:%.*]], …
84 ; CHECK-NEXT: ret <2 x i17> [[R]]
[all …]
Dapint-cast.ll8 define i17 @test1(i17 %a) {
10 ; CHECK-NEXT: [[C:%.*]] = lshr i17 [[A:%.*]], 8
11 ; CHECK-NEXT: [[D:%.*]] = shl i17 [[A]], 8
12 ; CHECK-NEXT: [[E:%.*]] = or i17 [[C]], [[D]]
13 ; CHECK-NEXT: ret i17 [[E]]
15 %b = zext i17 %a to i37 ; <i37> [#uses=2]
19 %f = trunc i37 %e to i17 ; <i17> [#uses=1]
20 ret i17 %f
Dapint-and-or-and.ll17 define i17 @test1(i17 %X, i17 %Y) {
18 %A = and i17 %X, 7
19 %B = and i17 %Y, 8
20 %C = or i17 %A, %B
21 %D = and i17 %C, 7 ;; This cannot include any bits from %Y!
22 ret i17 %D
Drotate.ll92 define <2 x i17> @rotr_v2i17_constant_splat(<2 x i17> %x) {
94 …ECK-NEXT: [[R:%.*]] = call <2 x i17> @llvm.fshl.v2i17(<2 x i17> [[X:%.*]], <2 x i17> [[X]], <2 …
95 ; CHECK-NEXT: ret <2 x i17> [[R]]
97 %shl = shl <2 x i17> %x, <i17 12, i17 12>
98 %shr = lshr <2 x i17> %x, <i17 5, i17 5>
99 %r = or <2 x i17> %shr, %shl
100 ret <2 x i17> %r
103 define <2 x i17> @rotr_v2i17_constant_splat_undef0(<2 x i17> %x) {
105 …ECK-NEXT: [[R:%.*]] = call <2 x i17> @llvm.fshl.v2i17(<2 x i17> [[X:%.*]], <2 x i17> [[X]], <2 …
106 ; CHECK-NEXT: ret <2 x i17> [[R]]
[all …]
/external/llvm/test/Integer/
Dnewcasts_bt.ll5 define void @"NewCasts" (i17 %x) {
6 %a = zext i17 %x to i32
7 %b = sext i17 %x to i32
8 %c = trunc i17 %x to i8
9 %d = uitofp i17 %x to float
10 %e = sitofp i17 %x to double
11 %f = fptoui float %d to i17
12 %g = fptosi double %e to i17
16 %l = inttoptr i17 %x to i32*
22 define i17 @"ZExtConst" () {
[all …]
D2007-01-19-TruncSext.ll7 @ARRAY = global [ 20 x i17 ] zeroinitializer
14 %P = getelementptr [20 x i17], [20 x i17]* @ARRAY, i32 0, i32 %index
15 %Result = trunc i32 %Z to i17
16 store i17 %Result, i17* %P
23 %P = getelementptr [20 x i17], [20 x i17]* @ARRAY, i32 0, i32 0
24 %X = load i17, i17* %P
25 %result = sext i17 %X to i32
/external/llvm-project/llvm/test/Integer/
Dnewcasts_bt.ll5 define void @"NewCasts" (i17 %x) {
6 %a = zext i17 %x to i32
7 %b = sext i17 %x to i32
8 %c = trunc i17 %x to i8
9 %d = uitofp i17 %x to float
10 %e = sitofp i17 %x to double
11 %f = fptoui float %d to i17
12 %g = fptosi double %e to i17
16 %l = inttoptr i17 %x to i32*
22 define i17 @"ZExtConst" () {
[all …]
D2007-01-19-TruncSext.ll7 @ARRAY = global [ 20 x i17 ] zeroinitializer
14 %P = getelementptr [20 x i17], [20 x i17]* @ARRAY, i32 0, i32 %index
15 %Result = trunc i32 %Z to i17
16 store i17 %Result, i17* %P
23 %P = getelementptr [20 x i17], [20 x i17]* @ARRAY, i32 0, i32 0
24 %X = load i17, i17* %P
25 %result = sext i17 %X to i32
/external/llvm/test/Transforms/InstCombine/
Dapint-cast.ll6 define i17 @test1(i17 %a) {
7 %tmp = zext i17 %a to i37 ; <i37> [#uses=2]
9 ; CHECK: %tmp21 = lshr i17 %a, 8
11 ; CHECK: %tmp5 = shl i17 %a, 8
13 ; CHECK: %tmp.upgrd.32 = or i17 %tmp21, %tmp5
14 %tmp.upgrd.3 = trunc i37 %tmp.upgrd.32 to i17 ; <i17> [#uses=1]
15 ret i17 %tmp.upgrd.3
16 ; CHECK: ret i17 %tmp.upgrd.32
Dapint-and-or-and.ll17 define i17 @test1(i17 %X, i17 %Y) {
18 %A = and i17 %X, 7
19 %B = and i17 %Y, 8
20 %C = or i17 %A, %B
21 %D = and i17 %C, 7 ;; This cannot include any bits from %Y!
22 ret i17 %D
Dapint-mul1.ll8 define i17 @test1(i17 %X) {
9 %Y = mul i17 %X, 1024
10 ret i17 %Y
/external/llvm-project/llvm/test/Transforms/InstSimplify/
Dor.ll164 define i17 @test3_apint(i17 %X) {
166 ; CHECK-NEXT: ret i17 -1
168 %Y = or i17 %X, -1
169 ret i17 %Y
273 define <3 x i17> @or_with_not_op_commute3(<3 x i17> %a, <3 x i17> %b) {
275 ; CHECK-NEXT: ret <3 x i17> <i17 -1, i17 -1, i17 -1>
277 %ab = and <3 x i17> %a, %b
278 %not = xor <3 x i17> %ab, <i17 -1, i17 -1, i17 -1>
279 %r = or <3 x i17> %not, %a
280 ret <3 x i17> %r
/external/llvm/test/CodeGen/X86/
D2009-07-20-DAGCombineBug.ll12 br label %bb3.i17
14 bb3.i9: ; preds = %bb3.i17
21 br label %bb3.i17
23 bb3.i17: ; preds = %bb2.i16, %entry
26 bsR.exit18: ; preds = %bb3.i17
D2011-01-07-LegalizeTypesCrash.ll7 %i17 = icmp eq <4 x i8> undef, zeroinitializer
8 %cond = extractelement <4 x i1> %i17, i32 0
11 %cond3 = extractelement <4 x i1> %i17, i32 1
14 %cond8 = extractelement <4 x i1> %i17, i32 2
/external/llvm-project/llvm/test/CodeGen/X86/
D2009-07-20-DAGCombineBug.ll12 br label %bb3.i17
14 bb3.i9: ; preds = %bb3.i17
21 br label %bb3.i17
23 bb3.i17: ; preds = %bb2.i16, %entry
26 bsR.exit18: ; preds = %bb3.i17
D2011-01-07-LegalizeTypesCrash.ll7 %i17 = icmp eq <4 x i8> undef, zeroinitializer
8 %cond = extractelement <4 x i1> %i17, i32 0
11 %cond3 = extractelement <4 x i1> %i17, i32 1
14 %cond8 = extractelement <4 x i1> %i17, i32 2
/external/llvm-project/llvm/test/CodeGen/ARM/
Dparity.ll46 define i17 @parity_17(i17 %x) {
57 %1 = tail call i17 @llvm.ctpop.i17(i17 %x)
58 %2 = and i17 %1, 1
59 ret i17 %2
160 declare i17 @llvm.ctpop.i17(i17 %x)
/external/llvm/test/tools/llvm-nm/X86/
Dradix.s130 .type i17,@object # @i17
131 .globl i17 symbol
133 i17: label
135 .size i17, 4
/external/llvm-project/llvm/test/tools/llvm-nm/X86/
Dradix.s130 .type i17,@object # @i17
131 .globl i17 symbol
133 i17: label
135 .size i17, 4
/external/llvm/test/Transforms/InstSimplify/
Dapint-or.ll31 define i17 @test3(i17 %X) {
33 ; CHECK: ret i17 -1
35 %Y = or i17 %X, -1
36 ret i17 %Y
/external/llvm-project/llvm/test/Transforms/CodeGenPrepare/X86/
Dwiden_switch.ll40 %trunc = trunc i32 %a to i17
41 switch i17 %trunc, label %sw.default [
42 i17 10, label %sw.bb0
43 i17 -1, label %sw.bb1
60 ; X86: %0 = zext i17 %trunc to i32
66 ; DEBUG: zext i17 %trunc to i32, !dbg [[switch_loc:![0-9]+]]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dparity.ll46 define i17 @parity_17(i17 %x) {
57 %1 = tail call i17 @llvm.ctpop.i17(i17 %x)
58 %2 = and i17 %1, 1
59 ret i17 %2
159 declare i17 @llvm.ctpop.i17(i17 %x)
/external/llvm-project/llvm/test/Transforms/CodeGenPrepare/AArch64/
Dwiden_switch.ll39 %trunc = trunc i32 %a to i17
40 switch i17 %trunc, label %sw.default [
41 i17 10, label %sw.bb0
42 i17 -1, label %sw.bb1
59 ; ARM64: %0 = zext i17 %trunc to i32
/external/llvm/test/Transforms/CodeGenPrepare/X86/
Dwiden_switch.ll39 %trunc = trunc i32 %a to i17
40 switch i17 %trunc, label %sw.default [
41 i17 10, label %sw.bb0
42 i17 -1, label %sw.bb1
59 ; X86: %0 = zext i17 %trunc to i32

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