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Searched refs:isExtractSubreg (Results 1 – 23 of 23) sorted by relevance

/external/llvm-project/llvm/utils/TableGen/
DInstrDocsEmitter.cpp136 FLAG(isExtractSubreg) in EmitInstrDocs()
DCodeGenInstruction.h274 bool isExtractSubreg : 1; variable
DInstrInfoEmitter.cpp781 if (Inst.isExtractSubreg) OS << "|(1ULL<<MCID::ExtractSubreg)"; in emitRecord()
DCodeGenInstruction.cpp400 isExtractSubreg = R->getValueAsBit("isExtractSubreg"); in CodeGenInstruction()
/external/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp199 MI.isExtractSubreg())); in isCoalescableCopy()
1022 assert(MI.isExtractSubreg() && "Invalid instruction"); in ExtractSubregRewriter()
1818 assert((Def->isExtractSubreg() || in getNextSourceFromExtractSubreg()
1906 if (Def->isExtractSubreg() || Def->isExtractSubregLike()) in getNextSourceImpl()
DTargetInstrInfo.cpp1151 assert((MI.isExtractSubreg() || in getExtractSubregInputs()
1154 if (!MI.isExtractSubreg()) in getExtractSubregInputs()
/external/llvm/utils/TableGen/
DCodeGenInstruction.h256 bool isExtractSubreg : 1; variable
DInstrInfoEmitter.cpp507 if (Inst.isExtractSubreg) OS << "|(1ULL<<MCID::ExtractSubreg)"; in emitRecord()
DCodeGenInstruction.cpp324 isExtractSubreg = R->getValueAsBit("isExtractSubreg"); in CodeGenInstruction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp242 MI.isExtractSubreg())); in isCoalescableCopy()
960 assert(MI.isExtractSubreg() && "Invalid instruction"); in ExtractSubregRewriter()
1977 assert((Def->isExtractSubreg() || in getNextSourceFromExtractSubreg()
2069 if (Def->isExtractSubreg() || Def->isExtractSubregLike()) in getNextSourceImpl()
DTargetInstrInfo.cpp1243 assert((MI.isExtractSubreg() || in getExtractSubregInputs()
1246 if (!MI.isExtractSubreg()) in getExtractSubregInputs()
/external/llvm-project/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp245 MI.isExtractSubreg())); in isCoalescableCopy()
965 assert(MI.isExtractSubreg() && "Invalid instruction"); in ExtractSubregRewriter()
1977 assert((Def->isExtractSubreg() || in getNextSourceFromExtractSubreg()
2069 if (Def->isExtractSubreg() || Def->isExtractSubregLike()) in getNextSourceImpl()
DTargetInstrInfo.cpp1316 assert((MI.isExtractSubreg() || in getExtractSubregInputs()
1319 if (!MI.isExtractSubreg()) in getExtractSubregInputs()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineInstr.h465 if (isExtractSubreg() && OpIdx == 2)
1123 bool isExtractSubreg() const {
/external/llvm-project/llvm/include/llvm/CodeGen/
DMachineInstr.h551 if (isExtractSubreg() && OpIdx == 2)
1232 bool isExtractSubreg() const {
/external/llvm/include/llvm/CodeGen/
DMachineInstr.h823 bool isExtractSubreg() const {
/external/llvm/include/llvm/Target/
DTarget.td394 bit isExtractSubreg = 0; // Is this instruction a kind of extract subreg?
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTarget.td543 bit isExtractSubreg = 0; // Is this instruction a kind of extract subreg?
/external/llvm-project/llvm/include/llvm/Target/
DTarget.td555 bit isExtractSubreg = false; // Is this instruction a kind of extract subreg?
/external/llvm-project/llvm/docs/TableGen/
DProgRef.rst1850 bit isExtractSubreg = 0;
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td1056 let isExtractSubreg = 1;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td1147 let isExtractSubreg = 1;
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrVFP.td1216 let isExtractSubreg = 1;