| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetCallingConv.h | 74 bool isInReg() const { return IsInReg; } in isInReg() function
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| /external/llvm/include/llvm/Target/ |
| D | TargetCallingConv.h | 76 bool isInReg() const { return Flags & InReg; } in isInReg() function
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| D | TargetCallingConv.td | 66 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
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| D | TargetLowering.h | 2466 bool isInReg : 1; member
2476 ArgListEntry() : isSExt(false), isZExt(false), isInReg(false), in ArgListEntry()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetCallingConv.h | 82 bool isInReg() const { return IsInReg; } in isInReg() function
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenCallingConv.inc | 118 if (ArgFlags.isInReg()) {
274 if (ArgFlags.isInReg()) {
640 if (ArgFlags.isInReg()) {
715 if (ArgFlags.isInReg()) {
732 if (ArgFlags.isInReg()) {
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallingConv.td | 15 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
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| D | SIISelLowering.cpp | 619 if (CallConv == CallingConv::AMDGPU_PS && !Arg.Flags.isInReg() && in LowerFormalArguments()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallingConv.td | 14 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetCallingConv.td | 70 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
|
| /external/llvm-project/llvm/include/llvm/Target/ |
| D | TargetCallingConv.td | 75 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallingConv.td | 14 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenCallingConv.inc | 403 if (ArgFlags.isInReg()) {
433 if (ArgFlags.isInReg()) {
647 if (ArgFlags.isInReg()) {
659 if (ArgFlags.isInReg()) {
671 if (ArgFlags.isInReg()) {
2894 if (ArgFlags.isInReg()) {
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1282 if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal()) in fastLowerCall()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1523 if (Flags.isInReg() || Flags.isSRet() || Flags.isNest() || Flags.isByVal()) in fastLowerCall()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1522 if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal()) in fastLowerCall()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenCallingConv.inc | 85 if (ArgFlags.isInReg()) {
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1520 if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal()) in fastLowerCall()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1620 if (Flags.isInReg() || Flags.isSRet() || Flags.isNest() || Flags.isByVal()) in fastLowerCall()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1613 if (Flags.isInReg() || Flags.isSRet() || Flags.isNest() || Flags.isByVal()) in fastLowerCall()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 2066 Entry.isInReg = true; in visitSPDescriptorParent()
7516 Entry.isInReg = false; in LowerCallTo()
7589 if (Args[i].isInReg) in LowerCallTo()
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| D | TargetLowering.cpp | 103 isInReg = CS->paramHasAttr(AttrIdx, Attribute::InReg); in setAttributes()
|
| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3360 ((Is64Bit || Ins[i].Flags.isInReg()) && !Subtarget->hasSSE1())) { in fastLowerCall()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3578 ((Is64Bit || Ins[i].Flags.isInReg()) && !Subtarget->hasSSE1())) { in fastLowerCall()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3561 ((Is64Bit || Ins[i].Flags.isInReg()) && !Subtarget->hasSSE1())) { in fastLowerCall()
|