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Searched refs:isPre (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelDAGToDAG.cpp135 bool isPre = (AM == ISD::PRE_DEC); in selectIndexedLoad() local
140 if ((!isPre && Offs != 1) || (isPre && Offs != -1)) { in selectIndexedLoad()
144 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad()
148 if ((!isPre && Offs != 2) || (isPre && Offs != -2)) { in selectIndexedLoad()
152 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad()
/external/llvm-project/llvm/lib/Target/AVR/
DAVRISelDAGToDAG.cpp135 bool isPre = (AM == ISD::PRE_DEC); in selectIndexedLoad() local
140 if ((!isPre && Offs != 1) || (isPre && Offs != -1)) { in selectIndexedLoad()
144 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad()
148 if ((!isPre && Offs != 2) || (isPre && Offs != -2)) { in selectIndexedLoad()
152 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1529 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryARMIndexedLoad() local
1532 if (LoadedVT == MVT::i32 && isPre && in tryARMIndexedLoad()
1536 } else if (LoadedVT == MVT::i32 && !isPre && in tryARMIndexedLoad()
1542 Opcode = isPre ? ARM::LDR_PRE_REG : ARM::LDR_POST_REG; in tryARMIndexedLoad()
1549 ? (isPre ? ARM::LDRSH_PRE : ARM::LDRSH_POST) in tryARMIndexedLoad()
1550 : (isPre ? ARM::LDRH_PRE : ARM::LDRH_POST); in tryARMIndexedLoad()
1555 Opcode = isPre ? ARM::LDRSB_PRE : ARM::LDRSB_POST; in tryARMIndexedLoad()
1558 if (isPre && in tryARMIndexedLoad()
1562 } else if (!isPre && in tryARMIndexedLoad()
1568 Opcode = isPre ? ARM::LDRB_PRE_REG : ARM::LDRB_POST_REG; in tryARMIndexedLoad()
[all …]
DARMInstrFormats.td772 class AI2ldstidx<bit isLd, bit isByte, bit isPre, dag oops, dag iops,
779 let Inst{24} = isPre; // P bit
781 let Inst{21} = isPre; // W bit
785 class AI2stridx_reg<bit isByte, bit isPre, dag oops, dag iops,
788 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
803 class AI2stridx_imm<bit isByte, bit isPre, dag oops, dag iops,
806 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
822 class AI2stridxT<bit isByte, bit isPre, dag oops, dag iops,
825 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
861 class AI3ldstidx<bits<4> op, bit op20, bit isPre, dag oops, dag iops,
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DARMBaseInstrInfo.cpp150 bool isPre = false; in convertToThreeAddress() local
154 isPre = true; in convertToThreeAddress()
239 if (isPre) { in convertToThreeAddress()
/external/llvm-project/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1576 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryARMIndexedLoad() local
1579 if (LoadedVT == MVT::i32 && isPre && in tryARMIndexedLoad()
1583 } else if (LoadedVT == MVT::i32 && !isPre && in tryARMIndexedLoad()
1589 Opcode = isPre ? ARM::LDR_PRE_REG : ARM::LDR_POST_REG; in tryARMIndexedLoad()
1596 ? (isPre ? ARM::LDRSH_PRE : ARM::LDRSH_POST) in tryARMIndexedLoad()
1597 : (isPre ? ARM::LDRH_PRE : ARM::LDRH_POST); in tryARMIndexedLoad()
1602 Opcode = isPre ? ARM::LDRSB_PRE : ARM::LDRSB_POST; in tryARMIndexedLoad()
1605 if (isPre && in tryARMIndexedLoad()
1609 } else if (!isPre && in tryARMIndexedLoad()
1615 Opcode = isPre ? ARM::LDRB_PRE_REG : ARM::LDRB_POST_REG; in tryARMIndexedLoad()
[all …]
DARMInstrFormats.td778 class AI2ldstidx<bit isLd, bit isByte, bit isPre, dag oops, dag iops,
785 let Inst{24} = isPre; // P bit
787 let Inst{21} = isPre; // W bit
791 class AI2stridx_reg<bit isByte, bit isPre, dag oops, dag iops,
794 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
809 class AI2stridx_imm<bit isByte, bit isPre, dag oops, dag iops,
812 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
828 class AI2stridxT<bit isByte, bit isPre, dag oops, dag iops,
831 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
867 class AI3ldstidx<bits<4> op, bit op20, bit isPre, dag oops, dag iops,
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DARMBaseInstrInfo.cpp160 bool isPre = false; in convertToThreeAddress() local
164 isPre = true; in convertToThreeAddress()
249 if (isPre) { in convertToThreeAddress()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1479 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryARMIndexedLoad() local
1482 if (LoadedVT == MVT::i32 && isPre && in tryARMIndexedLoad()
1486 } else if (LoadedVT == MVT::i32 && !isPre && in tryARMIndexedLoad()
1492 Opcode = isPre ? ARM::LDR_PRE_REG : ARM::LDR_POST_REG; in tryARMIndexedLoad()
1499 ? (isPre ? ARM::LDRSH_PRE : ARM::LDRSH_POST) in tryARMIndexedLoad()
1500 : (isPre ? ARM::LDRH_PRE : ARM::LDRH_POST); in tryARMIndexedLoad()
1505 Opcode = isPre ? ARM::LDRSB_PRE : ARM::LDRSB_POST; in tryARMIndexedLoad()
1508 if (isPre && in tryARMIndexedLoad()
1512 } else if (!isPre && in tryARMIndexedLoad()
1518 Opcode = isPre ? ARM::LDRB_PRE_REG : ARM::LDRB_POST_REG; in tryARMIndexedLoad()
[all …]
DARMInstrFormats.td654 class AI2ldstidx<bit isLd, bit isByte, bit isPre, dag oops, dag iops,
661 let Inst{24} = isPre; // P bit
663 let Inst{21} = isPre; // W bit
667 class AI2stridx_reg<bit isByte, bit isPre, dag oops, dag iops,
670 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
685 class AI2stridx_imm<bit isByte, bit isPre, dag oops, dag iops,
688 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
704 class AI2stridxT<bit isByte, bit isPre, dag oops, dag iops,
707 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
743 class AI3ldstidx<bits<4> op, bit op20, bit isPre, dag oops, dag iops,
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DARMBaseInstrInfo.cpp127 bool isPre = false; in convertToThreeAddress() local
131 isPre = true; in convertToThreeAddress()
221 if (isPre) { in convertToThreeAddress()
/external/clang/lib/CodeGen/
DCGExprScalar.cpp357 bool isInc, bool isPre);
1627 bool isInc, bool isPre) { in EmitScalarPrePostIncDec() argument
1640 if (isPre) { in EmitScalarPrePostIncDec()
1667 return isPre ? Builder.CreateBinOp(op, old, amt) : old; in EmitScalarPrePostIncDec()
1838 return isPre ? value : input; in EmitScalarPrePostIncDec()
1849 return isPre ? value : input; in EmitScalarPrePostIncDec()
3475 bool isInc, bool isPre) { in EmitScalarPrePostIncDec() argument
3476 return ScalarExprEmitter(*this).EmitScalarPrePostIncDec(E, LV, isInc, isPre); in EmitScalarPrePostIncDec()
DCGExprComplex.cpp166 bool isInc, bool isPre) { in VisitPrePostIncDec() argument
168 return CGF.EmitComplexPrePostIncDec(E, LV, isInc, isPre); in VisitPrePostIncDec()
DCodeGenFunction.h2084 bool isInc, bool isPre);
2086 bool isInc, bool isPre);
DCGExpr.cpp773 bool isInc, bool isPre) { in EmitComplexPrePostIncDec() argument
801 return isPre ? IncVal : InVal; in EmitComplexPrePostIncDec()
/external/llvm-project/clang/lib/CodeGen/
DCGExprScalar.cpp602 bool isInc, bool isPre);
2369 bool isInc, bool isPre) { in EmitScalarPrePostIncDec() argument
2383 if (isPre) { in EmitScalarPrePostIncDec()
2411 return isPre ? Builder.CreateBinOp(op, old, amt) : old; in EmitScalarPrePostIncDec()
2656 return isPre ? value : input; in EmitScalarPrePostIncDec()
2667 return isPre ? value : input; in EmitScalarPrePostIncDec()
4670 bool isInc, bool isPre) { in EmitScalarPrePostIncDec() argument
4671 return ScalarExprEmitter(*this).EmitScalarPrePostIncDec(E, LV, isInc, isPre); in EmitScalarPrePostIncDec()
DCGExprComplex.cpp192 bool isInc, bool isPre) { in VisitPrePostIncDec() argument
194 return CGF.EmitComplexPrePostIncDec(E, LV, isInc, isPre); in VisitPrePostIncDec()
DCodeGenFunction.h2907 bool isInc, bool isPre);
2909 bool isInc, bool isPre);
DCGExpr.cpp1022 bool isInc, bool isPre) { in EmitComplexPrePostIncDec() argument
1053 return isPre ? IncVal : InVal; in EmitComplexPrePostIncDec()