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/external/llvm-project/lld/test/ELF/
Dppc64-toc-addis-nop-lqsq.s4 # RUN: llvm-readelf -relocations --wide %p/Inputs/ppc64le-quadword-ldst.o | FileCheck --check-pref…
9 # RUN: ld.lld %t2.so %p/Inputs/ppc64le-quadword-ldst.o -o %t
12 # RUN: ld.lld --no-toc-optimize %t2.so %p/Inputs/ppc64le-quadword-ldst.o -o %t
/external/icu/icu4j/main/classes/localespi/src/com/ibm/icu/impl/javaspi/util/
DTimeZoneNameProviderICU.java33 String ldst = tznames.getDisplayName(canonicalID, NameType.LONG_DAYLIGHT, date); in getDisplayName() local
37 if (lstd != null && ldst != null && sstd != null && sdst != null) { in getDisplayName()
40 dispName = daylight ? ldst : lstd; in getDisplayName()
/external/llvm-project/llvm/test/CodeGen/ARM/
Dprera-ldst-insertpt.mir1 # RUN: llc -run-pass arm-prera-ldst-opt %s -o - | FileCheck %s
2 # RUN: llc -run-pass arm-prera-ldst-opt -arm-prera-ldst-opt-reorder-limit=3 %s -o - | FileCheck %s
3 # RUN: llc -run-pass arm-prera-ldst-opt -arm-prera-ldst-opt-reorder-limit=2 %s -o - | FileCheck %s …
Dldrd-memoper.ll1 ; RUN: llc %s -o /dev/null -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -debug-only=arm-ldst-opt 2> %t
Dload_store_opt_kill.mir2 # RUN: llc -mtriple=armv7-none-eabi -verify-machineinstrs -run-pass arm-ldst-opt %s -o - | FileChec…
Dprera-ldst-aliasing.mir1 # RUN: llc -run-pass arm-prera-ldst-opt %s -o - | FileCheck %s
Dload_store_opt_clobber_cpsr.mir1 # RUN: llc -mtriple=thumbv6m--eabi -verify-machineinstrs -run-pass=arm-ldst-opt %s -o - | FileCheck…
/external/mesa3d/src/panfrost/midgard/
Dmidgard_emit.c494 midgard_load_store_word ldst = ins->load_store; in load_store_from_instr() local
495 ldst.op = ins->op; in load_store_from_instr()
497 if (OP_IS_STORE(ldst.op)) { in load_store_from_instr()
498 ldst.reg = SSA_REG_FROM_FIXED(ins->src[0]) & 1; in load_store_from_instr()
500 ldst.reg = SSA_REG_FROM_FIXED(ins->dest); in load_store_from_instr()
507 ldst.swizzle = 0; in load_store_from_instr()
508 ldst.swizzle |= ins->swizzle[3][0] & 3; in load_store_from_instr()
509 ldst.swizzle |= (SSA_REG_FROM_FIXED(ins->src[3]) & 1 ? 1 : 0) << 2; in load_store_from_instr()
515 ldst.arg_1 |= midgard_ldst_reg(src, ins->swizzle[1][0], sz); in load_store_from_instr()
521 ldst.arg_2 |= midgard_ldst_reg(src, ins->swizzle[2][0], sz); in load_store_from_instr()
[all …]
Dmidgard_ra.c182 unsigned *ldst = calloc(sz, 1); in mir_lower_special_reads() local
203 mark_node_class(ldst, ins->src[0]); in mir_lower_special_reads()
204 mark_node_class(ldst, ins->src[1]); in mir_lower_special_reads()
205 mark_node_class(ldst, ins->src[2]); in mir_lower_special_reads()
206 mark_node_class(ldst, ins->src[3]); in mir_lower_special_reads()
232 bool is_ldst = BITSET_TEST(ldst, i); in mir_lower_special_reads()
309 free(ldst); in mir_lower_special_reads()
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_peephole.cpp2667 updateLdStOffset(Instruction *ldst, int32_t offset, Function *fn) in updateLdStOffset() argument
2669 if (offset != ldst->getSrc(0)->reg.data.offset) { in updateLdStOffset()
2670 if (ldst->getSrc(0)->refCount() > 1) in updateLdStOffset()
2671 ldst->setSrc(0, cloneShallow(fn, ldst->getSrc(0))); in updateLdStOffset()
2672 ldst->getSrc(0)->reg.data.offset = offset; in updateLdStOffset()
2693 bool overlaps(const Instruction *ldst) const;
2697 inline void set(const Instruction *ldst);
2724 void addRecord(Instruction *ldst);
2895 MemoryOpt::Record::set(const Instruction *ldst) in set() argument
2897 const Symbol *mem = ldst->getSrc(0)->asSym(); in set()
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dx86-64-mem.ll9 @ldst = internal global [500 x i32] zeroinitializer, align 32 ; <[500 x i32]*> [#uses=1]
62 ; LINUX-NEXT: movq $ldst, {{.*}}(%rip)
64 store i32* getelementptr ([500 x i32], [500 x i32]* @ldst, i32 0, i32 0), i32** @lptr
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dtiny_model.ll132 @ldst = internal global i8 0, align 4
140 ; CHECK-NEXT: adr x9, ldst
148 ; CHECK-GLOBISEL-NEXT: adr x9, ldst
156 ; CHECK-PIC-NEXT: adr x9, ldst
164 ; CHECK-PIC-GLOBISEL-NEXT: adr x9, ldst
169 store i8 %0, i8* @ldst, align 4
177 ; CHECK-NEXT: adr x9, ldst
184 ; CHECK-GLOBISEL-NEXT: adr x9, ldst
191 ; CHECK-PIC-NEXT: adr x9, ldst
198 ; CHECK-PIC-GLOBISEL-NEXT: adr x9, ldst
[all …]
Dldst-opt-mte-with-dbg.mir1 # Strip out debug info, then run ldst-opt with limit=1.
2 …limit=1 -mtriple=aarch64-none-linux-gnu -run-pass mir-strip-debug,aarch64-ldst-opt -mir-strip-debu…
4 # Run ldst-opt with limit=1, then strip out debug info.
5 # RUN: llc -aarch64-load-store-scan-limit=1 -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-…
Dstp-opt-with-renaming-reserved-regs.mir1 # RUN: llc -run-pass=aarch64-ldst-opt -aarch64-load-store-renaming=true -mattr=+reserve-x10 \
5 # RUN: llc -run-pass=aarch64-ldst-opt -aarch64-load-store-renaming=true -mtriple=arm64-apple-iphone…
Dldst-opt-non-imm-offset.mir1 # RUN: llc -mtriple=aarch64 -run-pass=aarch64-ldst-opt %s -verify-machineinstrs -o - | FileCheck %s
Dldst-opt-zr-clobber.mir2 # RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-opt -verify-machineinstrs -o - …
Dldst-opt-aa.mir1 # RUN: llc -mtriple=aarch64--linux-gnu -run-pass=aarch64-ldst-opt %s -verify-machineinstrs -o - | F…
Daarch64-ldst-subsuperReg-no-ldp.mir1 # RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -run-pass=aarch64-ldst-opt %s -o - | Fi…
Dtailcall-implicit-sret.ll1 ; RUN: llc < %s -mtriple arm64-apple-darwin -aarch64-enable-ldst-opt=false -disable-post-ra -asm-ve…
Dstp-opt-with-renaming-ld3.mir1 # RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -aarch64-load-store-renaming=tr…
Dirg-nomem.mir1 # RUN: llc -mtriple=aarch64-none-linux-android -run-pass aarch64-ldst-opt -o - %s | FileCheck %s
/external/llvm/test/CodeGen/X86/
Dx86-64-mem.ll14 @ldst = internal global [500 x i32] zeroinitializer, align 32 ; <[500 x i32]*> [#uses=1]
31 store i32* getelementptr ([500 x i32], [500 x i32]* @ldst, i32 0, i32 0), i32** @lptr
/external/llvm/test/CodeGen/ARM/
Dldrd-memoper.ll1 ; RUN: llc %s -o /dev/null -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -debug-only=arm-ldst-opt 2> %t
/external/llvm/test/CodeGen/AArch64/
Dno-quad-ldp-stp.ll1 ; RUN: llc < %s -march=aarch64 -mattr=+no-quad-ldst-pairs -verify-machineinstrs -asm-verbose=false …
/external/toybox/tests/
Dcp.test132 rm file fdst lnk ldst ldst2

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