/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | free-zext.ll | 23 %load16 = and i32 %load, 65535 24 %load64 = zext i32 %load16 to i64 25 store i32 %load16, i32* %dst1, align 4
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/external/llvm/test/CodeGen/AArch64/ |
D | free-zext.ll | 23 %load16 = and i32 %load, 65535 24 %load64 = zext i32 %load16 to i64 25 store i32 %load16, i32* %dst1, align 4
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/external/llvm-project/llvm/test/CodeGen/XCore/ |
D | load.ll | 21 define i32 @load16(i16* %p, i32 %offset) nounwind { 23 ; CHECK-LABEL: load16:
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/external/llvm-project/libc/AOR_v20.02/networking/ |
D | chksum_common.h | 71 uint16_t load16(const void *ptr) in load16() function 95 sum += load16(cptr); in slurp_small()
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D | chksum.c | 72 sum += load16(cptr); in __chksum()
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/external/llvm/test/CodeGen/XCore/ |
D | load.ll | 21 define i32 @load16(i16* %p, i32 %offset) nounwind { 23 ; CHECK-LABEL: load16:
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/external/arm-optimized-routines/networking/ |
D | chksum_common.h | 70 uint16_t load16(const void *ptr) in load16() function 94 sum += load16(cptr); in slurp_small()
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D | chksum.c | 71 sum += load16(cptr); in __chksum()
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/external/llvm-project/llvm/test/Instrumentation/DataFlowSanitizer/ |
D | load.ll | 46 define i16 @load16(i16* %p) { 47 ; COMBINE_PTR_LABEL: @"dfs$load16" 63 ; NO_COMBINE_PTR_LABEL: @"dfs$load16"
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D | fast16labels.ll | 36 define i16 @load16(i16* %p) { 37 ; CHECK-LABEL: define i16 @"dfs$load16"
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/external/llvm/test/Instrumentation/DataFlowSanitizer/ |
D | load.ll | 46 define i16 @load16(i16* %p) { 47 ; COMBINE_PTR_LABEL: @"dfs$load16" 63 ; NO_COMBINE_PTR_LABEL: @"dfs$load16"
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/external/llvm-project/clang/test/CodeGenCXX/ |
D | atomic-inline.cpp | 42 AM16 load16() { in load16() function
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/external/llvm/test/Instrumentation/AddressSanitizer/ |
D | experiment-call.ll | 43 define void @load16(i128* %p) sanitize_address { 47 ; CHECK-LABEL: define void @load16
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D | experiment.ll | 43 define void @load16(i128* %p) sanitize_address { 47 ; CHECK-LABEL: define void @load16
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/external/llvm-project/llvm/test/Instrumentation/AddressSanitizer/ |
D | experiment.ll | 44 define void @load16(i128* %p) sanitize_address { 48 ; CHECK-LABEL: define void @load16
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D | experiment-call.ll | 44 define void @load16(i128* %p) sanitize_address { 48 ; CHECK-LABEL: define void @load16
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/external/llvm-project/llvm/test/CodeGen/AVR/ |
D | load.ll | 10 define i16 @load16(i16* %x) { 11 ; CHECK-LABEL: load16:
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/external/llvm-project/llvm/test/CodeGen/WebAssembly/ |
D | simd-load-lane-offset.ll | 13 declare <8 x i16> @llvm.wasm.load16.lane(i16*, <8 x i16>, i32) 271 %t = tail call <8 x i16> @llvm.wasm.load16.lane(i16* %p, <8 x i16> %v, i32 0) 288 %t = tail call <8 x i16> @llvm.wasm.load16.lane(i16* %s, <8 x i16> %v, i32 0) 303 %t = tail call <8 x i16> @llvm.wasm.load16.lane(i16* %s, <8 x i16> %v, i32 0) 318 %t = tail call <8 x i16> @llvm.wasm.load16.lane(i16* %s, <8 x i16> %v, i32 0) 335 %t = tail call <8 x i16> @llvm.wasm.load16.lane(i16* %s, <8 x i16> %v, i32 0) 350 %t = tail call <8 x i16> @llvm.wasm.load16.lane(i16* %s, <8 x i16> %v, i32 0) 363 %t = tail call <8 x i16> @llvm.wasm.load16.lane(i16* %s, <8 x i16> %v, i32 0) 376 %t = tail call <8 x i16> @llvm.wasm.load16.lane(i16* @gv_i16, <8 x i16> %v, i32 0)
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/external/llvm-project/llvm/test/CodeGen/ARC/ |
D | ldst.ll | 13 ; CHECK-LABEL: load16 16 define i16 @load16(i16* %bp) nounwind {
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/external/skia/src/opts/ |
D | SkVM_opts.h | 119 STRIDE_1(Op::load16): r[d].i32 = 0; memcpy(&r[d].i32, args[immA], 2); break; in interpret_skvm() 125 STRIDE_K(Op::load16): r[d].i32= skvx::cast<int>(U16::Load(args[immA])); break; in interpret_skvm()
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/external/llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/ |
D | non-masked-load.mir | 33 %wide.load16 = load <16 x i8>, <16 x i8>* %lsr.iv2022 35 %13 = add <16 x i8> %12, %wide.load16
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D | vctp16-reduce.mir | 34 …%wide.masked.load16 = call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %lsr.iv2022, i32 1, <8… 35 %13 = zext <8 x i8> %wide.masked.load16 to <8 x i16>
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D | wrong-liveout-lsr-shift.mir | 34 …%wide.masked.load16 = call <8 x i8> @llvm.masked.load.v8i8.p0v8i8(<8 x i8>* %lsr.iv2022, i32 1, <8… 35 %13 = zext <8 x i8> %wide.masked.load16 to <8 x i16>
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/external/llvm-project/llvm/test/Analysis/CostModel/AArch64/ |
D | mem-op-cost-model.ll | 10 define <16 x i8> @load16(<16 x i8>* %ptr) { 11 ; CHECK: 'Cost Model Analysis' for function 'load16':
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/external/llvm-project/llvm/test/CodeGen/X86/ |
D | masked_load.ll | 501 ; SSE-NEXT: LBB5_13: ## %cond.load16 654 ; SSE2-NEXT: LBB6_13: ## %cond.load16 728 ; SSE42-NEXT: LBB6_13: ## %cond.load16 1169 ; SSE2-NEXT: LBB10_13: ## %cond.load16 1239 ; SSE42-NEXT: LBB10_13: ## %cond.load16 1375 ; SSE2-NEXT: LBB11_13: ## %cond.load16 1446 ; SSE42-NEXT: LBB11_13: ## %cond.load16 1835 ; SSE2-NEXT: LBB15_13: ## %cond.load16 1902 ; SSE42-NEXT: LBB15_13: ## %cond.load16 2059 ; SSE2-NEXT: LBB16_13: ## %cond.load16 [all …]
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